Copy stable/10@r272459 to releng/10.1 as part of
the 10.1-RELEASE process.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

MFC r269646: Use a SYSINIT to init the array of interrupt names on arm.

MFC 265913, 265914:

Interrupts need to be disabled on entry to cpu_sleep() for ARM. Given
that and the need to be in a critical section when switching to idleclock
mode for event timers, use spinlock_enter()/exit() to achieve both needs.

Clean up some style nits.

MFC 263910, 263913, 263914, 263933, 263934, 263935, 263936, 263981, 263982,

Add more flags for the fpexc register from the ARM1176JZF-S Manual

Initialise fpscr to a sane value when we create the pcb. This sets NaNs to
be the default NaN and for denormalised numbers to be flushed to zero.

VFP fixes/cleanups for ARM11:
* Save the required VFP registers on context switch. If the exception bit
is set we need to save and restore the FPINST register, and if the fp2v
bit is also set we need to save and restore FPINST2.
* Move saving and restoring the floating point control registers to C.
* Clear the fpexc exception and fp2v flags on a floating-point exception.
* Signal a SIGFPE if the fpexc exception flag is set on an undefined
instruction. This is how the ARM core signals to software there is a
floating-point exception.

Add Cortex-A15 cpu id revisions.

Exynos/Arndale...
- Merge SoC-common parts
- Enable iicbus device
- Directly call kmem_alloc_contig to allocate framebuffer memory
and pass VM_MEMATTR_UNCACHEABLE (no-cache, no-buffer).
This fixes screen refreshing problem when data is updated too slowly.
- Add support for keyboard used in Samsung Chromebook (ARM machine)
Support covers device drivers for:
- Interrupt Combiner
- gpio/pad, External Interrupts Controller (pad)
- I2C Interface
- Chrome Embedded Controller
- Chrome Keyboard
- Use new gpio dev class in EHCI driver
- Expand device tree information
- Release i2c bus on detach.

MFC 262952, 262958, 262966, 262979, 262980, 262986, 262987, 262995, 262997,
263030, 263033, 263034, 263056, 263057,

Remove all the redundant external declarations of exception vectors and
runtime setting of the pointers that's scattered around various places.

Remove all traces of support for ARM chips prior to the arm9 series.

Make the default exception handler vectors point to where I thought they
were already pointing: the default handlers (not a panic that says there
is no default handler).

Eliminate irq_dispatch.S. Move the data items it contained into
arm/intr.c and the functionality it provided into arm/exception.S.

Move the exception vector table (so-called "page0" data) into exception.S
and eliminate vectors.S.

Change the way the asm GET_CURTHREAD_PTR() macro is defined so that code
using it doesn't have to have an "AST_LOCALS" macro somewhere in the file.

Arrange for arm fork_trampoline() to return to userland via the standard
swi_exit code in exception.S instead of having its own inline expansion
of the DO_AST and PULLFRAME macros.

Now that the PUSHFRAME and PULLFRAME macros are used only in the swi
entry/exit code, they don't need to be macros. Except that didn't work
and the whole change was reverted.

Remove some unnecessary indirection and jump right to the handler functions.

Use panic rather than printf to "handle" an arm26 address exception
(should never happen on arm32).

Remove the unreferenced DATA() macro.

Remove #include <machine/asmacros.h> from files that don't need it.

MFC 257774, 256760, 262916, 262905, 262918, 262919, 262920, 262921, 262924,
262925, 262929, 262932, 262935, 262940, 262941, 262942, 262948, 262949,
262950

Strip arm/conf/DEFAULTS down to just items that are mandatory for running
the architecture.

Move all the files named foo/common.c to foo/foo_common.c

Initial cut for DTS on the hl201 board.

Add commented out dts for sam9260ek as well as early printf support.

Make clock optional on uart nodes, then back it out ("I don't know what I
was thinking, but it is lame.")

Set the baud rate if it isn't 0

Make at91_soc_id() public.

Properly round at91 resource on unmapping.

Move AT91 AIC related stuff to own file.

Fix another bug in multicast filtering. i.MX uses 6 bits from MSB in
LE CRC32 for the hash value, not the lowest 6 bits in BE CRC32.

Follow r262916 with one more config file that references a renamed common.c

Remove bogus AT91 define that causes compile errors. Most of the defines
for SAM9X are going away soonish anyway (once FDT works), but until
then...

Remove all dregs of a per-thread undefined-exception-mode stack.

Rework the VFP code that handles demand-based save and restore of state.

Always call vfp_discard() on thread death.

When a thread begins life it doesn't own the VFP hardware state on any cpu.

Make undefined exception entry MP-safe.

MFC 262695, 262708, 262709, 262710, 262711, 262728, 262870, 262877, 262880,
262885, 262891, 262903,

imx6: Add a tunable to set the number of active cores, enable SMP by default.

ffec: Fix multicast filtering.

Allwinner a10/a20...
- Add gpio and clock bits for A10/A20's EMAC ethernet controller driver
- EMAC gpio configuration
- EMAC clock activation
- Add Static Random Access Memory controller driver for A10/A20.
A10/A20's SRAM is used by devices, such as CPU, EMAC,
for extra fast memory or as cache.
- Add EMAC 10/100 Ethernet controller driver for A10/A20.
It is available mostly in A10 devices like Hackberry, Marsboard,
Mele A1000, A2000, A100 HTPC, cubieboard1 and A20 device
like cubieboard2.
TX performance can be improved using both channels 0 and 1.
RX performance is poor and needs improvement with the assistance of
external DMA controller in case there
- Add EMAC and SRAM controller entries to FDT.
- Add EMAC device to kernel config files and enable EMAC, SRAM drivers.

OMAP: When calculating the MPU freq, make sure not to overflow.

Vybrid:
- Add driver for Port control and interrupts (PORT).
- Export panel info to DTS
- Reset all the layers before setup first one
- Enable display

nandfs: Slight code reordering to make error branch last.

Add option TMPFS to arm/conf/DEFAULTS, remove it from the few configs
that have it individually. Concensus on freebsd-arm@ is that it should
be included in all ARM kernels.

Fix the arm sys_sigreturn(): its argument is a struct ucontext, not a
struct sigframe containing the struct ucontext.

MFC r262534, r262548, r262549, r262552, r262568, r262581, r262583, r262584,
r262585, r262587, r262696, r262712

Replace many pasted identical definitions of cpu_initclocks() with a common
implementation in arm/machdep.c.

aicasm: Don't complain about missing prototypes to ease bootstrap issues.

Vybrid: Add driver for Inter-Integrated Circuit (I2C).

imx6: Initialize the Low Power Mode bits to keep the ARM cores running
during WFI.

All our current ARM multi-core systems have all cores in one package with
a shared L2 cache, reflect that in the common cpu_topo() routine.

mpcore timer: Supply a DELAY() implementation via weak linkage, so that
SoC-specific code can supply a better implementation.

imx6: Add some rudimentary voltage control.

Add an armv7 implementation of cpu_sleep().

Add __used attribute so that the DELAY implementation doesn't get
optimized away as unreferenced, causing linker errors when trying to
resolve the weak reference to the missing function.

MFC r262409, r262411, r262413, r262420, r262426, r262427, r262440, r262456,
r262482, r262483, r262531,

Move the declaration for mpentry() into a header file instead of pasting
it into a bunch of different .c files.

If the L2 cache type is PIPT, pass a physical address for a flush.

Actually set the proper bit to indicate TTB shared memory.

Add a new cache maintenance function, idcache_inv_all, to the table, and
implementations for each of the chips we support.

Invalidate caches immediately upon entry to init_secondary(). Also set
the Bufferable bit in the PDE entries of the secondary processor startup
pagetables.

Add the bits needed to run SMP on imx6.

Invalidate the SCU cache tag ram on all 4 cores, not just 1-3.

Minor tweaks to the imx GPT timer

Vybrid enhancements...
- Pin configuration is a complete iomux register now and includes
drive strength, pull mode, mux mode, speed, etc.
- Add i2c devices to the tree
- Add IPG clock
- Add support for Quartz Module.
- Pin configuration is a complete iomux register now and includes
drive strength, pull mode, mux mode, speed, etc.
- Add i2c devices to the tree
- Add IPG clock

MFC r261982, r261987, r262123, r262244, r262278, r262280, r262353, r262354,
r262355, r262419,

Add Vybrid driver for Synchronous Audio Interface (SAI).

Decrease SAI buffer size. Handle eDMA interrupt on running channel only.

Give the physmem fdt helper routines static linkage since no global
definition of them is provided anywhere.

Add imx6 early printf support, wrapped in #if 0 because it's rarely needed.

Add basic cpu frequency control and temperature monitoring to imx6_anatop.

Add the FREEBSD_BOOT_LOADER option so that a loaded DTB passed in from
ubldr will actually get used.

Create a generic IMX6 kernel config, then fix it to have an ident line.

Don't force imx6 bootverbose on anymore, it can be set from ubldr now.

MFC r261786, r261789

Rework the EARLY_PRINTF mechanism. Instead of defining a special eprintf()
routine, now a platform can provide a pointer to an early_putc() routine
which is used instead of cn_putc(). Control can be handed off from early
printf support to standard console support by NULLing out the pointer
during standard console init.

Convert two while(1); statements into proper panics.

MFC r261643, r261646, r261648, r261649, r261651, r261656, r261657, r261663,
r261676, r261677, r261698, r261778

Consolidate code related to setting up physical memory configuration into
a new physmem.c file.

Replace compile-time constant KERNPHYSADDR with abp_physaddr

Calculate the kernel's load address from the PC in the elf / gzip
trampoline instead of relying on KERNPHYSADDR as a compile-time constant.

It turns out a global variable is the only straightforward way to
communicate the kernel's physical load address from where it's known in
initarm() into cpu_mp_start() which is called from non-arm code and
takes no parameters.

Remove the now unused MMU_INIT macro.

Use vm_paddr_t, not vm_offset_t, when dealing with physical addresses.

No need to set physmem in each initarm() instance anymore, it's handled
in common code now.

Pass the pagetable used from locore.S to initarm to allow it to map data
in as required.

Fix the physmem exclude-region clipping logic for the edge-trim case.

Add some extra debugging output when DEBUG is defined.

Update legacy platforms to use new arm_physmem helper routines.

MFC r256672

If we avoid to use the page at addr 0, we should adjust the size to reflect it.

MFC r257549, r261642

Don't create a distinct free page pool for segregating allocations that are
accessed through the direct map unless the kernel configuration actually
includes a direct map. Only a few configurations do, and for the rest the
unnecessary free page pool is a small pessimization.

Remove the ARM_USE_SMALL_ALLOC option and code related to it.

MFC r261423, r261424, r261516, r261513, r261562, r261563, r261564, r261565,
r261596, r261606

Add the imx sdhci controller.

Move Open Firmware device root on PowerPC, ARM, and MIPS systems to
a sub-node of nexus (ofwbus) rather than direct attach under nexus. This
fixes FDT on x86 and will make coexistence with ACPI on ARM systems easier.
SPARC is unchanged.

Add the missing ')' at end of sentence. Reword it to use a more common idiom.

Pass the kernel physical address to initarm through the boot param struct.

Make functions only used in vfp.c static, and remove vfp_enable.

Fix __syscall on armeb EABI. As it returns a 64-bit value it needs to
place 32-bit data in r1, not r0. 64-bit data is already packed correctly.

Use abp_physaddr for the physical address over KERNPHYSADDR. This helps us
remove the need to load the kernel at a fixed address.

Remove references to PHYSADDR where it's used only in debugging output.

Dynamically generate the page table. This will allow us to detect the
physical address we are loaded at to change the mapping.

MFC r261414, r261415, r261417, r261418, r261419

Don't call device_set_ivars() for the mmchs

Change the way pcpu and curthread are stored per-core

Invalidate cachelines for bounce pages on PREREAD too, there may still be
stale entries from a previous transfer.

Only use the CPU ID register if SMP is defined. Some non-MPCore armv6 cpu,
such as the one found in the RPi, don't have it, and just hang when we try
to access it.

MFC r260440, r260441, r260447, r260490, r260493

Add option USB_HOST_ALIGN to configs that contain 'device usb'.

Update dts files of Cubieboard1,2 to use 1GB memory.

Add a function to print the contents of the static device mapping table,

MFC r257738, r259202, r258410, r260288, r260292, r260294, r260320, r260323,
r260326, r260327, r260331, r260333, r260340, r260371, r260372, r260373,
r260374, r260375

Add common bus_space tag definition shared for most supported ARMv6/v7 SoCs.
Correct license statements to reflect the fact that these files were all
derived from sys/arm/mv/bus_space.c.

In pmap_unmapdev(), remember the size, and use that as an argument to
kva_free(), or we'd end up always passing it a size of 0

In pmap_mapdev(), first check whether a static mapping exists,

Convert TI static device mapping to use the new arm_devmap_add_entry(),

Use the common armv6 fdt_bus_tag defintion for tegra instead of a local copy.

Eliminate use of fdt_immr_addr(), it's not needed for tegra

Convert lpc from using fdt_immr style to arm_devmap_add_entry() to make
static device mappings.

Retire machine/fdt.h as a header used by MI code, as its function is now
obsolete. This involves the following pieces:
- Remove it entirely on PowerPC, where it is not used by MD code either
- Remove all references to machine/fdt.h in non-architecture-specific code
(aside from uart_cpu_fdt.c, shared by ARM and MIPS, and so is somewhat
non-arch-specific).
- Fix code relying on header pollution from machine/fdt.h includes
- Legacy fdtbus.c (still used on x86 FDT systems) now passes resource
requests to its parent (nexus). This allows x86 FDT devices to allocate
both memory and IO requests and removes the last notionally MI use of
fdtbus_bs_tag.
- On those architectures that retain a machine/fdt.h, unused bits like
FDT_MAP_IRQ and FDT_INTR_MAX have been removed.

Add #include <machine/fdt.h> to a few files that used to get it via pollution

Enable the mv cesa security/crypto device by providing the required property
in the dts source, and adding the right devices to the kernel config.

Remove dev/fdt/fdt_pci.c, which was code specific to Marvell ARM SoCs,
related to setting up static device mappings. Since it was only used by
arm/mv/mv_pci.c, it's now just static functions within that file, plus
one public function that gets called only from arm/mv/mv_machdep.c.

Switch RPi to using arm_devmap_add_entry() to set up static device mapping.

Allow 'no static device mappings' to potentially work.

Don't try to find a static mapping before calling pmap_mapdev(), that logic
is now part of pmap_mapdev() and doesn't need to be duplicated here.

Switch a10 to using arm_devmap_add_entry() to set up static device mapping.

MFC r258392, r258412:

Call cpu_setup() immediately after the page tables are installed. This
enables data cache and other chip-specific features. It was previously
done via an early SYSINIT, but it was being done after pmap and vm setup,
and those setups need to use mutexes. On some modern ARM platforms,
the ldrex/strex instructions that implement mutexes require the data cache
to be enabled.

Call cpu_setup() from the initarm() routine on platforms that don't use
the common FDT-aware initarm() in arm/machdep.c.

MFC r257669, r257672, r257673, r257676, r257678:

Call initarm_lastaddr() later in the init sequence, after establishing
static device mappings, rather than as the first of the initializations
that a platform can hook into. This allows a platform to allocate KVA
from the top of the address space downwards for things like static device
mapping, and return the final "last usable address" result after that and
other early init work is done.

Because some platforms were doing work in initarm_lastaddr() that needs to
be done early, add a new initarm_early_init() routine and move the early
init code to that routine on those platforms.

Make PTE_DEVICE a synonym for PTE_NOCACHE on armv4, to make it easier to
share the same code on both architectures.

Add new helper routines for arm static device mapping. The new code
allocates kva space from the top down for the device mappings and builds
entries in an internal table which is automatically used later by
arm_devmap_bootstrap(). The platform code just calls the new
arm_devmap_add_entry() function as many times as it needs to (up to 32
entries allowed; most platforms use 2 or 3 at most).

Remove imx local devmap code and use the essentially identical common
code that got moved from imx_machdep.c to arm/devmap.c.

MFC r257648, r257649, r257660:

Begin reducing code duplication in arm pmap.c and pmap-v6.c by factoring
out common code related to mapping device memory into a new devmap.c file.

Remove the growing duplication of code that used pmap_devmap_find_pa() and
then did some math with the returned results to generate a virtual address,
and likewise in reverse to get a physical address. Now there are a pair
of functions, arm_devmap_vtop() and arm_devmap_ptov(), to do that. The
bus_space_map() implementations are rewritten in terms of these.

Move remaining code and data related to static device mapping into the
new devmap.[ch] files. Emphasize the MD nature of these things by using
the prefix arm_devmap_ on the function and type names (already a few of
these things found their way into MI code, hopefully it will be harder to
do by accident in the future).

MFC r257199, r257200, r257217:

Remove all #include <machine/pmap.h> from arm code. It's already
included by vm/pmap.h, which is a prerequisite for arm/machine/pmap.h
so there's no reason to ever include it directly.

Remove #include <machine/frame.h> from all the arm code that doesn't
really need it. That would be almost everywhere it was included. Add
it in a couple files that really do need it and were previously getting
it by accident via another header.

Remove the last dregs of trapframe_t. It turns out only arm was using
this type, so remove it to make arm code more consistant with other
platforms.

Copy head (r256279) to stable/10 as part of the 10.0-RELEASE cycle.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

Fix a typo in a comment.

Rename device vfp to option VFP and retire the ARM_VFP_SUPPORT option. This
simplifies enabling as previously both options were required to be enabled,
now we only need a single option.

While here enable VFP on the PandaBoard.

Add the hw.floatingpoint sysctl to ARM to tell us if we have vfp support
in the kernel and the hardware includes a vfp unit.

Switch the vm_object mutex to be a rwlock. This will enable in the
future further optimizations where the vm_object lock will be held
in read mode most of the time the page cache resident pool of pages
are accessed for reading purposes.

The change is mostly mechanical but few notes are reported:
* The KPI changes as follow:
- VM_OBJECT_LOCK() -> VM_OBJECT_WLOCK()
- VM_OBJECT_TRYLOCK() -> VM_OBJECT_TRYWLOCK()
- VM_OBJECT_UNLOCK() -> VM_OBJECT_WUNLOCK()
- VM_OBJECT_LOCK_ASSERT(MA_OWNED) -> VM_OBJECT_ASSERT_WLOCKED()
(in order to avoid visibility of implementation details)
- The read-mode operations are added:
VM_OBJECT_RLOCK(), VM_OBJECT_TRYRLOCK(), VM_OBJECT_RUNLOCK(),
VM_OBJECT_ASSERT_RLOCKED(), VM_OBJECT_ASSERT_LOCKED()
* The vm/vm_pager.h namespace pollution avoidance (forcing requiring
sys/mutex.h in consumers directly to cater its inlining functions
using VM_OBJECT_LOCK()) imposes that all the vm/vm_pager.h
consumers now must include also sys/rwlock.h.
* zfs requires a quite convoluted fix to include FreeBSD rwlocks into
the compat layer because the name clash between FreeBSD and solaris
versions must be avoided.
At this purpose zfs redefines the vm_object locking functions
directly, isolating the FreeBSD components in specific compat stubs.

The KPI results heavilly broken by this commit. Thirdy part ports must
be updated accordingly (I can think off-hand of VirtualBox, for example).

Sponsored by: EMC / Isilon storage division
Reviewed by: jeff
Reviewed by: pjd (ZFS specific review)
Discussed with: alc
Tested by: pho

Add basic and not very reliable protection against going to sleep with
thread scheduled by interrupt fired after we entered critical section.
None of cpu_sleep() implementations on ARM check sched_runnable() now, so
put the first line of defence here. This mostly fixes unexpectedly long
sleeps in synthetic tests of calloutng code and probably other situations.

Initialize vm_max_kernel_address on non-FDT platforms. (This should have
been included in r246926.)

The second parameter to pmap_bootstrap() is redundant. Eliminate it.

Reviewed by: andrew

On arm, like sparc64, the end of the kernel map varies from one type of
machine to another. Therefore, VM_MAX_KERNEL_ADDRESS can't be a constant.
Instead, #define it to be a variable, vm_max_kernel_address, just like we
do on sparc64.

Reviewed by: kib
Tested by: ian

Eliminate the need for an intermediate array of indices into the arrays of
interrupt counts and names, by making the names into an array of fixed-length
strings that can be directly indexed. This eliminates extra memory accesses
on every interrupt to increment the counts.

As a side effect, it also fixes a bug that would corrupt the names data
if a name was longer than MAXCOMLEN, which led to incorrect vmstat -i output.

Approved by: cognet (mentor)

Add hw.board.serial and hw.board.revision for exporting board-specific info

Get reserved memory regions and exclude them from available memory map

Remove print_kernel_section_addr(). All statements in that function
expand to uncompilable code when the kernel configuration contains
"options DEBUG", such as it is for LINT. The toolchain is often a
better approach to figure this out, as it doesn't require one to
boot the kernel.

Reduce differences between these two initarms a bit more.

Minor cosmetic changes to bring atmel's initarm and the default
initarm for FDT closer together. More to follow.

Merge the FDT versions of initarm.

The copies of initarm used on platforms with FDT support were almost
identical. The differences were pulled out into separate functions that
were called by initarm.

This change merges the, now identical, copies of initarm and a few of it's
support functions. This is a step towards a common kernel on ARMv6.

Create a common set_stackptrs in sys/arm/machdep.c.

On single core devices set_stackptrs is only ever called with cpu = 0 in
initarm and will be identical to the existing function. On SMP this needs
to be implemented for sys/arm/mp_machdep.c, but the implementations are
identical for each SoC.

Call set_pcpu for ARMv6 architecture too

Merging projects/armv6, part 1

Cummulative patch of changes that are not vendor-specific:
- ARMv6 and ARMv7 architecture support
- ARM SMP support
- VFP/Neon support
- ARM Generic Interrupt Controller driver
- Simplification of startup code for all platforms

Fix a global shadowing problem when LINUX_BOOT_ABI was defined.

More Linux boot support. Create arm_dump_avail_init() to initialize
this array either from Linux boot data, when enabled, or in the
typical way that most ports do it. arm_pyhs_avail_init is coming
soon since it must be a separate function.

Add support for parsing Linux ATAGs such as you'd see from uboot or
redboot. Support is very preiminary and likely needs some work. Also,
do some minor code shuffling of the FreeBSD /boot/loader metadata
parsing code. This code is preliminary and should be used with
caution.

Create default_parse_boot_param which, if FreeBSD /boot/loader support
is enabled, sets values based on the metadata passed in. Otherwise
fake_preload_metadata is called. Change the default parse_boot_param
to default_parse_boot_param. Enable this functionality only on the mv
platform, which is where most of the code is from.

Reviewed by: cognet, Ian Lapore

Modify all the arm platform files to call parse_boot_param passing in
the boot parameters from initarm first thing. parse_boot_param parses
the boot arguments and converts them to the /boot/loader metadata the
rest of the kernel uses. parse_boot_param is a weak alias to
fake_preload_metadata, which all the platforms use now, but may become
more extensive in the future.

Since it is a weak symbol, specific boards may define their own
parse_boot_param to interface to custom boot loaders.

Reviewed by: cognet@, Ian Lapore

Final whitespace trim.

Pull out the common code to initialise proc0 & thread0 from initarm to a
common function.

Reviewed by: imp

Soft PMC support for ARM.
Callgraph is not captured, only current location.

Sample system wide profiling: "pmcstat -Sclock.hard -T"

TDF_* flags should be used with td_flags field and TDP_* flags should be used
with td_pflags field. Correct two places where it was not the case.

Discussed with: kib
MFC after: 1 week

Explicitely set ARM_RAS_START and ARM_RAS_END once the cacheline or the
page has been allocated, or we could end up using random values, and bad things
could happen.

PR: arm/161492
Submitted by: Ian Lepore <freebsd AT damnhippie dot dyndns DOT org>
MFC after: 1 week

In order to maximize the re-usability of kernel code in user space this
patch modifies makesyscalls.sh to prefix all of the non-compatibility
calls (e.g. not linux_, freebsd32_) with sys_ and updates the kernel
entry points and all places in the code that use them. It also
fixes an additional name space collision between the kernel function
psignal and the libc function of the same name by renaming the kernel
psignal kern_psignal(). By introducing this change now we will ease future
MFCs that change syscalls.

Reviewed by: rwatson
Approved by: re (bz)

Adjust the order of operations in spinlock_enter() and spinlock_exit() to
work properly with single-stepping in a kernel debugger. Specifically,
these routines have always disabled interrupts before increasing the nesting
count and restored the prior state of interrupts after decreasing the nesting
count to avoid problems with a nested interrupt not disabling interrupts
when acquiring a spin lock. However, trap interrupts for single-stepping
can still occur even when interrupts are disabled. Now the saved state of
interrupts is not saved in the thread until after interrupts have been
disabled and the nesting count has been increased. Similarly, the saved
state from the thread cannot be read once the nesting count has been
decreased to zero. To fix this, use temporary variables to store interrupt
state and shuffle it between the thread's MD area and the appropriate
registers.

In cooperation with: bde
MFC after: 1 month

Move prototypes for kern_sigtimedwait() and kern_sigprocmask() to
<sys/syscallsubr.h> where all other kern_<syscall> prototypes live.

Change the arguments of exec_setregs() so that it receives a pointer
to the image_params struct instead of several members of that struct
individually. This makes it easier to expand its arguments in the future
without touching all platforms.

Reviewed by: jhb

Eliminate an unnecessary vm include file.

In r197963, a race with thread being selected for signal delivery
while in kernel mode, and later changing signal mask to block the
signal, was fixed for sigprocmask(2) and ptread_exit(3). The same race
exists for sigreturn(2), setcontext(2) and swapcontext(2) syscalls.

Use kern_sigprocmask() instead of direct manipulation of td_sigmask to
reschedule newly blocked signals, closing the race.

Reviewed by: davidxu
Tested by: pho
MFC after: 1 month

Add cpu_flush_dcache() for use after non-DMA based I/O so that a
possible future I-cache coherency operation can succeed. On ARM
for example the L1 cache can be (is) virtually mapped, which
means that any I/O that uses temporary mappings will not see the
I-cache made coherent. On ia64 a similar behaviour has been
observed. By flushing the D-cache, execution of binaries backed
by md(4) and/or NFS work reliably.
For Book-E (powerpc), execution over NFS exhibits SIGILL once in
a while as well, though cpu_flush_dcache() hasn't been implemented
yet.

Doing an explicit D-cache flush as part of the non-DMA based I/O
read operation eliminates the need to do it as part of the
I-cache coherency operation itself and as such avoids pessimizing
the DMA-based I/O read operations for which D-cache are already
flushed/invalidated. It also allows future optimizations whereby
the bcopy() followed by the D-cache flush can be integrated in a
single operation, which could be implemented using on-chips DMA
engines, by-passing the D-cache altogether.

Do not set thread0.td_frame to a bogus value, as it's going to overwrite the
thread0 pcb, while the board-dependant code already set a good trapframe.

Reported by: Mark Tinguely <tinguely at casselton d0t net>

MFC after: 1 week

- Add an integer argument to idle to indicate how likely we are to wake
from idle over the next tick.
- Add a new MD routine, cpu_wake_idle() to wakeup idle threads who are
suspended in cpu specific states. This function can fail and cause the
scheduler to fall back to another mechanism (ipi).
- Implement support for mwait in cpu_idle() on i386/amd64 machines that
support it. mwait is a higher performance way to synchronize cpus
as compared to hlt & ipis.
- Allow selecting the idle routine by name via sysctl machdep.idle. This
replaces machdep.cpu_idle_hlt. Only idle routines supported by the
current machine are permitted.

Sponsored by: Nokia

Take the first baby step towards unifying and cleaning up arminit():
- Pull all the code to deal with the trampoline stuff into one
centeralized place and use it from everywhere.
- Some minor style tidiness

Reviewed by: tinguely

In keeping with style(9)'s recommendations on macros, use a ';'
after each SYSINIT() macro invocation. This makes a number of
lightweight C parsers much happier with the FreeBSD kernel
source, including cflow's prcc and lxr.

MFC after: 1 month
Discussed with: imp, rink

Revert VMCNT_* operations introduction.
Probabilly, a general approach is not the better solution here, so we should
solve the sched_lock protection problems separately.

Requested by: alc
Approved by: jeff (mentor)

Constify to please gcc 4.2.

- define and use VMCNT_{GET,SET,ADD,SUB,PTR} macros for manipulating
vmcnts. This can be used to abstract away pcpu details but also changes
to use atomics for all counters now. This means sched lock is no longer
responsible for protecting counts in the switch routines.

Contributed by: Attilio Rao <attilio@FreeBSD.org>

Add KTR tracing

In sendsig:

- Add sigacts locking.
- Add a mutex to struct sigacts that protects all the members of the struct.
- Create and log events via the CTRx macros.

Reviewed by: cognet

Display real/avail memory as per other platforms.

Approved by: cognet

Move the call to cpu_setup() before the call to vm_ksubmap_init().
vm_ksubmap_init() calls pmap_copy_page(), which uses the mini data cache
to do the copy, but we're running uncaching before cpu_setup().
For some reason it hasn't been a problem so far, but it is for the
PXA255.

Spotted out by: benno

Close some races between procfs/ptrace and exit(2):
- Reorder the events in exit(2) slightly so that we trigger the S_EXIT
stop event earlier. After we have signalled that, we set P_WEXIT and
then wait for any processes with a hold on the vmspace via PHOLD to
release it. PHOLD now KASSERT()'s that P_WEXIT is clear when it is
invoked, and PRELE now does a wakeup if P_WEXIT is set and p_lock drops
to zero.
- Change proc_rwmem() to require that the processing read from has its
vmspace held via PHOLD by the caller and get rid of all the junk to
screw around with the vmspace reference count as we no longer need it.
- In ptrace() and pseudofs(), treat a process with P_WEXIT set as if it
doesn't exist.
- Only do one PHOLD in kern_ptrace() now, and do it earlier so it covers
FIX_SSTEP() (since on alpha at least this can end up calling proc_rwmem()
to clear an earlier single-step simualted via a breakpoint). We only
do one to avoid races. Also, by making the EINVAL error for unknown
requests be part of the default: case in the switch, the various
switch cases can now just break out to return which removes a _lot_ of
duplicated PRELE and proc unlocks, etc. Also, it fixes at least one bug
where a LWP ptrace command could return EINVAL with the proc lock still
held.
- Changed the locking for ptrace_single_step(), ptrace_set_pc(), and
ptrace_clear_single_step() to always be called with the proc lock
held (it was a mixed bag previously). Alpha and arm have to drop
the lock while the mess around with breakpoints, but other archs
avoid extra lock release/acquires in ptrace(). I did have to fix a
couple of other consumers in kern_kse and a few other places to
hold the proc lock and PHOLD.

Tested by: ps (1 mostly, but some bits of 2-4 as well)
MFC after: 1 week

Add missing "struct" in i386/i386/machdep.c,v 1.497 by deischen@.

MFi386 rev 1.536 (sort of)
Move what can be moved (UMA zones creation, pv_entry_* initialization) from
pmap_init2() to pmap_init().
Create a new function, pmap_postinit(), called from cpu_startup(), to do the
L1 tables allocation.
pmap_init2() is now empty for arm as well.

1. Change prototype of trapsignal and sendsig to use ksiginfo_t *, most
changes in MD code are trivial, before this change, trapsignal and
sendsig use discrete parameters, now they uses member fields of
ksiginfo_t structure. For sendsig, this change allows us to pass
POSIX realtime signal value to user code.

2. Remove cpu_thread_siginfo, it is no longer needed because we now always
generate ksiginfo_t data and feed it to libpthread.

3. Add p_sigqueue to proc structure to hold shared signals which were
blocked by all threads in the proc.

4. Add td_sigqueue to thread structure to hold all signals delivered to
thread.

5. i386 and amd64 now return POSIX standard si_code, other arches will
be fixed.

6. In this sigqueue implementation, pending signal set is kept as before,
an extra siginfo list holds additional siginfo_t data for signals.
kernel code uses psignal() still behavior as before, it won't be failed
even under memory pressure, only exception is when deleting a signal,
we should call sigqueue_delete to remove signal from sigqueue but
not SIGDELSET. Current there is no kernel code will deliver a signal
with additional data, so kernel should be as stable as before,
a ksiginfo can carry more information, for example, allow signal to
be delivered but throw away siginfo data if memory is not enough.
SIGKILL and SIGSTOP have fast path in sigqueue_add, because they can
not be caught or masked.
The sigqueue() syscall allows user code to queue a signal to target
process, if resource is unavailable, EAGAIN will be returned as
specification said.
Just before thread exits, signal queue memory will be freed by
sigqueue_flush.
Current, all signals are allowed to be queued, not only realtime signals.

Earlier patch reviewed by: jhb, deischen
Tested on: i386, amd64

Export the variables needed for the copy/zero API.

Divorce critical sections from spinlocks. Critical sections as denoted by
critical_enter() and critical_exit() are now solely a mechanism for
deferring kernel preemptions. They no longer have any affect on
interrupts. This means that standalone critical sections are now very
cheap as they are simply unlocked integer increments and decrements for the
common case.

Spin mutexes now use a separate KPI implemented in MD code: spinlock_enter()
and spinlock_exit(). This KPI is responsible for providing whatever MD
guarantees are needed to ensure that a thread holding a spin lock won't
be preempted by any other code that will try to lock the same lock. For
now all archs continue to block interrupts in a "spinlock section" as they
did formerly in all critical sections. Note that I've also taken this
opportunity to push a few things into MD code rather than MI. For example,
critical_fork_exit() no longer exists. Instead, MD code ensures that new
threads have the correct state when they are created. Also, we no longer
try to fixup the idlethreads for APs in MI code. Instead, each arch sets
the initial curthread and adjusts the state of the idle thread it borrows
in order to perform the initial context switch.

This change is largely a big NOP, but the cleaner separation it provides
will allow for more efficient alternative locking schemes in other parts
of the kernel (bare critical sections rather than per-CPU spin mutexes
for per-CPU data for example).

Reviewed by: grehan, cognet, arch@, others
Tested on: i386, alpha, sparc64, powerpc, arm, possibly more

Introduce realmem.

Instead of using sysarch() to store-retrieve the tp, add a magic address,
ARM_TP_ADDRESS, where the tp will be stored. On CPUs that support it, a cache
line will be allocated and locked for this address, so that it will never go
to RAM. On CPUs that does not, a page is allocated for it (it will be a bit
slower, and is wrong for SMP, but should be fine for UP).
The tp is still stored in the mdthread struct, and at each context switch,
ARM_TP_ADDRESS gets updated.

Suggested by: davidxu

move pmap.h after vm.h include... some of the headers from pmap.h depend
upon vm.h

Finish the job of sorting all includes and fix the build by including
malloc.h before proc.h on sparc64. Noticed by das@

Compiled on: alpha, amd64, i386, pc98, sparc64

Sort includes a little so that bus.h comes before cpu.h (for device_t).

Add an implementation of cpu_est_clockrate(9). This function estimates the
current clock frequency for the given CPU id in units of Hz.

Add support for ptrace() and gdb breakpoints.

Start all license statements with /*-

Implement cpu_thread_siginfo() and set_mcontext().
Nuke getframe(), and choose which stack to use directly in sendsig().

Implement sigreturn().

Don't use cast as lvalue.

Implement ptrace_set_pc().
Add a stub for ptrace_clear_single_step().

Remove astpending, it has not been used for a long time.

Implement makectx().

Import FreeBSD/arm kernel bits.
It only supports sa1110 (on simics) right now, but xscale support should come
soon.
Some of the initial work has been provided by :
Stephane Potvin <sepotvin at videotron.ca>
Most of this comes from NetBSD.