machdep.c revision 247046
1/* $NetBSD: arm32_machdep.c,v 1.44 2004/03/24 15:34:47 atatat Exp $ */ 2 3/*- 4 * Copyright (c) 2004 Olivier Houchard 5 * Copyright (c) 1994-1998 Mark Brinicombe. 6 * Copyright (c) 1994 Brini. 7 * All rights reserved. 8 * 9 * This code is derived from software written for Brini by Mark Brinicombe 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Mark Brinicombe 22 * for the NetBSD Project. 23 * 4. The name of the company nor the name of the author may be used to 24 * endorse or promote products derived from this software without specific 25 * prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 28 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 29 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 30 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 31 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 32 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 33 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 37 * SUCH DAMAGE. 38 * 39 * Machine dependant functions for kernel setup 40 * 41 * Created : 17/09/94 42 * Updated : 18/04/01 updated for new wscons 43 */ 44 45#include "opt_compat.h" 46#include "opt_ddb.h" 47#include "opt_platform.h" 48#include "opt_timer.h" 49 50#include <sys/cdefs.h> 51__FBSDID("$FreeBSD: head/sys/arm/arm/machdep.c 247046 2013-02-20 16:48:52Z alc $"); 52 53#include <sys/param.h> 54#include <sys/proc.h> 55#include <sys/systm.h> 56#include <sys/bio.h> 57#include <sys/buf.h> 58#include <sys/bus.h> 59#include <sys/cons.h> 60#include <sys/cpu.h> 61#include <sys/exec.h> 62#include <sys/imgact.h> 63#include <sys/kdb.h> 64#include <sys/kernel.h> 65#include <sys/ktr.h> 66#include <sys/linker.h> 67#include <sys/lock.h> 68#include <sys/malloc.h> 69#include <sys/msgbuf.h> 70#include <sys/mutex.h> 71#include <sys/pcpu.h> 72#include <sys/ptrace.h> 73#include <sys/signalvar.h> 74#include <sys/syscallsubr.h> 75#include <sys/sysctl.h> 76#include <sys/sysent.h> 77#include <sys/sysproto.h> 78#include <sys/uio.h> 79 80#include <vm/vm.h> 81#include <vm/pmap.h> 82#include <vm/vm_map.h> 83#include <vm/vm_object.h> 84#include <vm/vm_page.h> 85#include <vm/vm_pager.h> 86 87#include <machine/armreg.h> 88#include <machine/atags.h> 89#include <machine/cpu.h> 90#include <machine/machdep.h> 91#include <machine/md_var.h> 92#include <machine/metadata.h> 93#include <machine/pcb.h> 94#include <machine/pmap.h> 95#include <machine/reg.h> 96#include <machine/trap.h> 97#include <machine/undefined.h> 98#include <machine/vmparam.h> 99#include <machine/sysarch.h> 100 101#ifdef FDT 102#include <dev/fdt/fdt_common.h> 103#include <dev/ofw/openfirm.h> 104#endif 105 106#ifdef DEBUG 107#define debugf(fmt, args...) printf(fmt, ##args) 108#else 109#define debugf(fmt, args...) 110#endif 111 112struct pcpu __pcpu[MAXCPU]; 113struct pcpu *pcpup = &__pcpu[0]; 114 115static struct trapframe proc0_tf; 116uint32_t cpu_reset_address = 0; 117int cold = 1; 118vm_offset_t vector_page; 119 120long realmem = 0; 121 122int (*_arm_memcpy)(void *, void *, int, int) = NULL; 123int (*_arm_bzero)(void *, int, int) = NULL; 124int _min_memcpy_size = 0; 125int _min_bzero_size = 0; 126 127extern int *end; 128#ifdef DDB 129extern vm_offset_t ksym_start, ksym_end; 130#endif 131 132#ifdef FDT 133/* 134 * This is the number of L2 page tables required for covering max 135 * (hypothetical) memsize of 4GB and all kernel mappings (vectors, msgbuf, 136 * stacks etc.), uprounded to be divisible by 4. 137 */ 138#define KERNEL_PT_MAX 78 139 140static struct pv_addr kernel_pt_table[KERNEL_PT_MAX]; 141 142vm_paddr_t phys_avail[10]; 143vm_paddr_t dump_avail[4]; 144 145extern u_int data_abort_handler_address; 146extern u_int prefetch_abort_handler_address; 147extern u_int undefined_handler_address; 148 149vm_paddr_t pmap_pa; 150 151struct pv_addr systempage; 152static struct pv_addr msgbufpv; 153struct pv_addr irqstack; 154struct pv_addr undstack; 155struct pv_addr abtstack; 156static struct pv_addr kernelstack; 157 158const struct pmap_devmap *pmap_devmap_bootstrap_table; 159#endif 160 161#if defined(LINUX_BOOT_ABI) 162#define LBABI_MAX_BANKS 10 163 164uint32_t board_id; 165struct arm_lbabi_tag *atag_list; 166char linux_command_line[LBABI_MAX_COMMAND_LINE + 1]; 167char atags[LBABI_MAX_COMMAND_LINE * 2]; 168uint32_t memstart[LBABI_MAX_BANKS]; 169uint32_t memsize[LBABI_MAX_BANKS]; 170uint32_t membanks; 171#endif 172 173static uint32_t board_revision; 174/* hex representation of uint64_t */ 175static char board_serial[32]; 176 177SYSCTL_NODE(_hw, OID_AUTO, board, CTLFLAG_RD, 0, "Board attributes"); 178SYSCTL_UINT(_hw_board, OID_AUTO, revision, CTLFLAG_RD, 179 &board_revision, 0, "Board revision"); 180SYSCTL_STRING(_hw_board, OID_AUTO, serial, CTLFLAG_RD, 181 board_serial, 0, "Board serial"); 182 183void 184board_set_serial(uint64_t serial) 185{ 186 187 snprintf(board_serial, sizeof(board_serial)-1, 188 "%016jx", serial); 189} 190 191void 192board_set_revision(uint32_t revision) 193{ 194 195 board_revision = revision; 196} 197 198void 199sendsig(catcher, ksi, mask) 200 sig_t catcher; 201 ksiginfo_t *ksi; 202 sigset_t *mask; 203{ 204 struct thread *td; 205 struct proc *p; 206 struct trapframe *tf; 207 struct sigframe *fp, frame; 208 struct sigacts *psp; 209 int onstack; 210 int sig; 211 int code; 212 213 td = curthread; 214 p = td->td_proc; 215 PROC_LOCK_ASSERT(p, MA_OWNED); 216 sig = ksi->ksi_signo; 217 code = ksi->ksi_code; 218 psp = p->p_sigacts; 219 mtx_assert(&psp->ps_mtx, MA_OWNED); 220 tf = td->td_frame; 221 onstack = sigonstack(tf->tf_usr_sp); 222 223 CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm, 224 catcher, sig); 225 226 /* Allocate and validate space for the signal handler context. */ 227 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !(onstack) && 228 SIGISMEMBER(psp->ps_sigonstack, sig)) { 229 fp = (struct sigframe *)(td->td_sigstk.ss_sp + 230 td->td_sigstk.ss_size); 231#if defined(COMPAT_43) 232 td->td_sigstk.ss_flags |= SS_ONSTACK; 233#endif 234 } else 235 fp = (struct sigframe *)td->td_frame->tf_usr_sp; 236 237 /* make room on the stack */ 238 fp--; 239 240 /* make the stack aligned */ 241 fp = (struct sigframe *)STACKALIGN(fp); 242 /* Populate the siginfo frame. */ 243 get_mcontext(td, &frame.sf_uc.uc_mcontext, 0); 244 frame.sf_si = ksi->ksi_info; 245 frame.sf_uc.uc_sigmask = *mask; 246 frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK ) 247 ? ((onstack) ? SS_ONSTACK : 0) : SS_DISABLE; 248 frame.sf_uc.uc_stack = td->td_sigstk; 249 mtx_unlock(&psp->ps_mtx); 250 PROC_UNLOCK(td->td_proc); 251 252 /* Copy the sigframe out to the user's stack. */ 253 if (copyout(&frame, fp, sizeof(*fp)) != 0) { 254 /* Process has trashed its stack. Kill it. */ 255 CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp); 256 PROC_LOCK(p); 257 sigexit(td, SIGILL); 258 } 259 260 /* Translate the signal if appropriate. */ 261 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 262 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 263 264 /* 265 * Build context to run handler in. We invoke the handler 266 * directly, only returning via the trampoline. Note the 267 * trampoline version numbers are coordinated with machine- 268 * dependent code in libc. 269 */ 270 271 tf->tf_r0 = sig; 272 tf->tf_r1 = (register_t)&fp->sf_si; 273 tf->tf_r2 = (register_t)&fp->sf_uc; 274 275 /* the trampoline uses r5 as the uc address */ 276 tf->tf_r5 = (register_t)&fp->sf_uc; 277 tf->tf_pc = (register_t)catcher; 278 tf->tf_usr_sp = (register_t)fp; 279 tf->tf_usr_lr = (register_t)(PS_STRINGS - *(p->p_sysent->sv_szsigcode)); 280 281 CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_usr_lr, 282 tf->tf_usr_sp); 283 284 PROC_LOCK(p); 285 mtx_lock(&psp->ps_mtx); 286} 287 288struct kva_md_info kmi; 289 290/* 291 * arm32_vector_init: 292 * 293 * Initialize the vector page, and select whether or not to 294 * relocate the vectors. 295 * 296 * NOTE: We expect the vector page to be mapped at its expected 297 * destination. 298 */ 299 300extern unsigned int page0[], page0_data[]; 301void 302arm_vector_init(vm_offset_t va, int which) 303{ 304 unsigned int *vectors = (int *) va; 305 unsigned int *vectors_data = vectors + (page0_data - page0); 306 int vec; 307 308 /* 309 * Loop through the vectors we're taking over, and copy the 310 * vector's insn and data word. 311 */ 312 for (vec = 0; vec < ARM_NVEC; vec++) { 313 if ((which & (1 << vec)) == 0) { 314 /* Don't want to take over this vector. */ 315 continue; 316 } 317 vectors[vec] = page0[vec]; 318 vectors_data[vec] = page0_data[vec]; 319 } 320 321 /* Now sync the vectors. */ 322 cpu_icache_sync_range(va, (ARM_NVEC * 2) * sizeof(u_int)); 323 324 vector_page = va; 325 326 if (va == ARM_VECTORS_HIGH) { 327 /* 328 * Assume the MD caller knows what it's doing here, and 329 * really does want the vector page relocated. 330 * 331 * Note: This has to be done here (and not just in 332 * cpu_setup()) because the vector page needs to be 333 * accessible *before* cpu_startup() is called. 334 * Think ddb(9) ... 335 * 336 * NOTE: If the CPU control register is not readable, 337 * this will totally fail! We'll just assume that 338 * any system that has high vector support has a 339 * readable CPU control register, for now. If we 340 * ever encounter one that does not, we'll have to 341 * rethink this. 342 */ 343 cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC); 344 } 345} 346 347static void 348cpu_startup(void *dummy) 349{ 350 struct pcb *pcb = thread0.td_pcb; 351#ifdef ARM_TP_ADDRESS 352#ifndef ARM_CACHE_LOCK_ENABLE 353 vm_page_t m; 354#endif 355#endif 356 357 cpu_setup(""); 358 identify_arm_cpu(); 359 360 printf("real memory = %ju (%ju MB)\n", (uintmax_t)ptoa(physmem), 361 (uintmax_t)ptoa(physmem) / 1048576); 362 realmem = physmem; 363 364 /* 365 * Display the RAM layout. 366 */ 367 if (bootverbose) { 368 int indx; 369 370 printf("Physical memory chunk(s):\n"); 371 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 372 vm_paddr_t size; 373 374 size = phys_avail[indx + 1] - phys_avail[indx]; 375 printf("%#08jx - %#08jx, %ju bytes (%ju pages)\n", 376 (uintmax_t)phys_avail[indx], 377 (uintmax_t)phys_avail[indx + 1] - 1, 378 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE); 379 } 380 } 381 382 vm_ksubmap_init(&kmi); 383 384 printf("avail memory = %ju (%ju MB)\n", 385 (uintmax_t)ptoa(cnt.v_free_count), 386 (uintmax_t)ptoa(cnt.v_free_count) / 1048576); 387 388 bufinit(); 389 vm_pager_bufferinit(); 390 pcb->un_32.pcb32_und_sp = (u_int)thread0.td_kstack + 391 USPACE_UNDEF_STACK_TOP; 392 pcb->un_32.pcb32_sp = (u_int)thread0.td_kstack + 393 USPACE_SVC_STACK_TOP; 394 vector_page_setprot(VM_PROT_READ); 395 pmap_set_pcb_pagedir(pmap_kernel(), pcb); 396 pmap_postinit(); 397#ifdef ARM_TP_ADDRESS 398#ifdef ARM_CACHE_LOCK_ENABLE 399 pmap_kenter_user(ARM_TP_ADDRESS, ARM_TP_ADDRESS); 400 arm_lock_cache_line(ARM_TP_ADDRESS); 401#else 402 m = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_ZERO); 403 pmap_kenter_user(ARM_TP_ADDRESS, VM_PAGE_TO_PHYS(m)); 404#endif 405 *(uint32_t *)ARM_RAS_START = 0; 406 *(uint32_t *)ARM_RAS_END = 0xffffffff; 407#endif 408} 409 410SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL); 411 412/* 413 * Flush the D-cache for non-DMA I/O so that the I-cache can 414 * be made coherent later. 415 */ 416void 417cpu_flush_dcache(void *ptr, size_t len) 418{ 419 420 cpu_dcache_wb_range((uintptr_t)ptr, len); 421 cpu_l2cache_wb_range((uintptr_t)ptr, len); 422} 423 424/* Get current clock frequency for the given cpu id. */ 425int 426cpu_est_clockrate(int cpu_id, uint64_t *rate) 427{ 428 429 return (ENXIO); 430} 431 432void 433cpu_idle(int busy) 434{ 435 436#ifndef NO_EVENTTIMERS 437 if (!busy) { 438 critical_enter(); 439 cpu_idleclock(); 440 } 441#endif 442 cpu_sleep(0); 443#ifndef NO_EVENTTIMERS 444 if (!busy) { 445 cpu_activeclock(); 446 critical_exit(); 447 } 448#endif 449} 450 451int 452cpu_idle_wakeup(int cpu) 453{ 454 455 return (0); 456} 457 458int 459fill_regs(struct thread *td, struct reg *regs) 460{ 461 struct trapframe *tf = td->td_frame; 462 bcopy(&tf->tf_r0, regs->r, sizeof(regs->r)); 463 regs->r_sp = tf->tf_usr_sp; 464 regs->r_lr = tf->tf_usr_lr; 465 regs->r_pc = tf->tf_pc; 466 regs->r_cpsr = tf->tf_spsr; 467 return (0); 468} 469int 470fill_fpregs(struct thread *td, struct fpreg *regs) 471{ 472 bzero(regs, sizeof(*regs)); 473 return (0); 474} 475 476int 477set_regs(struct thread *td, struct reg *regs) 478{ 479 struct trapframe *tf = td->td_frame; 480 481 bcopy(regs->r, &tf->tf_r0, sizeof(regs->r)); 482 tf->tf_usr_sp = regs->r_sp; 483 tf->tf_usr_lr = regs->r_lr; 484 tf->tf_pc = regs->r_pc; 485 tf->tf_spsr &= ~PSR_FLAGS; 486 tf->tf_spsr |= regs->r_cpsr & PSR_FLAGS; 487 return (0); 488} 489 490int 491set_fpregs(struct thread *td, struct fpreg *regs) 492{ 493 return (0); 494} 495 496int 497fill_dbregs(struct thread *td, struct dbreg *regs) 498{ 499 return (0); 500} 501int 502set_dbregs(struct thread *td, struct dbreg *regs) 503{ 504 return (0); 505} 506 507 508static int 509ptrace_read_int(struct thread *td, vm_offset_t addr, u_int32_t *v) 510{ 511 struct iovec iov; 512 struct uio uio; 513 514 PROC_LOCK_ASSERT(td->td_proc, MA_NOTOWNED); 515 iov.iov_base = (caddr_t) v; 516 iov.iov_len = sizeof(u_int32_t); 517 uio.uio_iov = &iov; 518 uio.uio_iovcnt = 1; 519 uio.uio_offset = (off_t)addr; 520 uio.uio_resid = sizeof(u_int32_t); 521 uio.uio_segflg = UIO_SYSSPACE; 522 uio.uio_rw = UIO_READ; 523 uio.uio_td = td; 524 return proc_rwmem(td->td_proc, &uio); 525} 526 527static int 528ptrace_write_int(struct thread *td, vm_offset_t addr, u_int32_t v) 529{ 530 struct iovec iov; 531 struct uio uio; 532 533 PROC_LOCK_ASSERT(td->td_proc, MA_NOTOWNED); 534 iov.iov_base = (caddr_t) &v; 535 iov.iov_len = sizeof(u_int32_t); 536 uio.uio_iov = &iov; 537 uio.uio_iovcnt = 1; 538 uio.uio_offset = (off_t)addr; 539 uio.uio_resid = sizeof(u_int32_t); 540 uio.uio_segflg = UIO_SYSSPACE; 541 uio.uio_rw = UIO_WRITE; 542 uio.uio_td = td; 543 return proc_rwmem(td->td_proc, &uio); 544} 545 546int 547ptrace_single_step(struct thread *td) 548{ 549 struct proc *p; 550 int error; 551 552 KASSERT(td->td_md.md_ptrace_instr == 0, 553 ("Didn't clear single step")); 554 p = td->td_proc; 555 PROC_UNLOCK(p); 556 error = ptrace_read_int(td, td->td_frame->tf_pc + 4, 557 &td->td_md.md_ptrace_instr); 558 if (error) 559 goto out; 560 error = ptrace_write_int(td, td->td_frame->tf_pc + 4, 561 PTRACE_BREAKPOINT); 562 if (error) 563 td->td_md.md_ptrace_instr = 0; 564 td->td_md.md_ptrace_addr = td->td_frame->tf_pc + 4; 565out: 566 PROC_LOCK(p); 567 return (error); 568} 569 570int 571ptrace_clear_single_step(struct thread *td) 572{ 573 struct proc *p; 574 575 if (td->td_md.md_ptrace_instr) { 576 p = td->td_proc; 577 PROC_UNLOCK(p); 578 ptrace_write_int(td, td->td_md.md_ptrace_addr, 579 td->td_md.md_ptrace_instr); 580 PROC_LOCK(p); 581 td->td_md.md_ptrace_instr = 0; 582 } 583 return (0); 584} 585 586int 587ptrace_set_pc(struct thread *td, unsigned long addr) 588{ 589 td->td_frame->tf_pc = addr; 590 return (0); 591} 592 593void 594cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 595{ 596} 597 598void 599spinlock_enter(void) 600{ 601 struct thread *td; 602 register_t cspr; 603 604 td = curthread; 605 if (td->td_md.md_spinlock_count == 0) { 606 cspr = disable_interrupts(I32_bit | F32_bit); 607 td->td_md.md_spinlock_count = 1; 608 td->td_md.md_saved_cspr = cspr; 609 } else 610 td->td_md.md_spinlock_count++; 611 critical_enter(); 612} 613 614void 615spinlock_exit(void) 616{ 617 struct thread *td; 618 register_t cspr; 619 620 td = curthread; 621 critical_exit(); 622 cspr = td->td_md.md_saved_cspr; 623 td->td_md.md_spinlock_count--; 624 if (td->td_md.md_spinlock_count == 0) 625 restore_interrupts(cspr); 626} 627 628/* 629 * Clear registers on exec 630 */ 631void 632exec_setregs(struct thread *td, struct image_params *imgp, u_long stack) 633{ 634 struct trapframe *tf = td->td_frame; 635 636 memset(tf, 0, sizeof(*tf)); 637 tf->tf_usr_sp = stack; 638 tf->tf_usr_lr = imgp->entry_addr; 639 tf->tf_svc_lr = 0x77777777; 640 tf->tf_pc = imgp->entry_addr; 641 tf->tf_spsr = PSR_USR32_MODE; 642} 643 644/* 645 * Get machine context. 646 */ 647int 648get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret) 649{ 650 struct trapframe *tf = td->td_frame; 651 __greg_t *gr = mcp->__gregs; 652 653 if (clear_ret & GET_MC_CLEAR_RET) 654 gr[_REG_R0] = 0; 655 else 656 gr[_REG_R0] = tf->tf_r0; 657 gr[_REG_R1] = tf->tf_r1; 658 gr[_REG_R2] = tf->tf_r2; 659 gr[_REG_R3] = tf->tf_r3; 660 gr[_REG_R4] = tf->tf_r4; 661 gr[_REG_R5] = tf->tf_r5; 662 gr[_REG_R6] = tf->tf_r6; 663 gr[_REG_R7] = tf->tf_r7; 664 gr[_REG_R8] = tf->tf_r8; 665 gr[_REG_R9] = tf->tf_r9; 666 gr[_REG_R10] = tf->tf_r10; 667 gr[_REG_R11] = tf->tf_r11; 668 gr[_REG_R12] = tf->tf_r12; 669 gr[_REG_SP] = tf->tf_usr_sp; 670 gr[_REG_LR] = tf->tf_usr_lr; 671 gr[_REG_PC] = tf->tf_pc; 672 gr[_REG_CPSR] = tf->tf_spsr; 673 674 return (0); 675} 676 677/* 678 * Set machine context. 679 * 680 * However, we don't set any but the user modifiable flags, and we won't 681 * touch the cs selector. 682 */ 683int 684set_mcontext(struct thread *td, const mcontext_t *mcp) 685{ 686 struct trapframe *tf = td->td_frame; 687 const __greg_t *gr = mcp->__gregs; 688 689 tf->tf_r0 = gr[_REG_R0]; 690 tf->tf_r1 = gr[_REG_R1]; 691 tf->tf_r2 = gr[_REG_R2]; 692 tf->tf_r3 = gr[_REG_R3]; 693 tf->tf_r4 = gr[_REG_R4]; 694 tf->tf_r5 = gr[_REG_R5]; 695 tf->tf_r6 = gr[_REG_R6]; 696 tf->tf_r7 = gr[_REG_R7]; 697 tf->tf_r8 = gr[_REG_R8]; 698 tf->tf_r9 = gr[_REG_R9]; 699 tf->tf_r10 = gr[_REG_R10]; 700 tf->tf_r11 = gr[_REG_R11]; 701 tf->tf_r12 = gr[_REG_R12]; 702 tf->tf_usr_sp = gr[_REG_SP]; 703 tf->tf_usr_lr = gr[_REG_LR]; 704 tf->tf_pc = gr[_REG_PC]; 705 tf->tf_spsr = gr[_REG_CPSR]; 706 707 return (0); 708} 709 710/* 711 * MPSAFE 712 */ 713int 714sys_sigreturn(td, uap) 715 struct thread *td; 716 struct sigreturn_args /* { 717 const struct __ucontext *sigcntxp; 718 } */ *uap; 719{ 720 struct sigframe sf; 721 struct trapframe *tf; 722 int spsr; 723 724 if (uap == NULL) 725 return (EFAULT); 726 if (copyin(uap->sigcntxp, &sf, sizeof(sf))) 727 return (EFAULT); 728 /* 729 * Make sure the processor mode has not been tampered with and 730 * interrupts have not been disabled. 731 */ 732 spsr = sf.sf_uc.uc_mcontext.__gregs[_REG_CPSR]; 733 if ((spsr & PSR_MODE) != PSR_USR32_MODE || 734 (spsr & (I32_bit | F32_bit)) != 0) 735 return (EINVAL); 736 /* Restore register context. */ 737 tf = td->td_frame; 738 set_mcontext(td, &sf.sf_uc.uc_mcontext); 739 740 /* Restore signal mask. */ 741 kern_sigprocmask(td, SIG_SETMASK, &sf.sf_uc.uc_sigmask, NULL, 0); 742 743 return (EJUSTRETURN); 744} 745 746 747/* 748 * Construct a PCB from a trapframe. This is called from kdb_trap() where 749 * we want to start a backtrace from the function that caused us to enter 750 * the debugger. We have the context in the trapframe, but base the trace 751 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 752 * enough for a backtrace. 753 */ 754void 755makectx(struct trapframe *tf, struct pcb *pcb) 756{ 757 pcb->un_32.pcb32_r8 = tf->tf_r8; 758 pcb->un_32.pcb32_r9 = tf->tf_r9; 759 pcb->un_32.pcb32_r10 = tf->tf_r10; 760 pcb->un_32.pcb32_r11 = tf->tf_r11; 761 pcb->un_32.pcb32_r12 = tf->tf_r12; 762 pcb->un_32.pcb32_pc = tf->tf_pc; 763 pcb->un_32.pcb32_lr = tf->tf_usr_lr; 764 pcb->un_32.pcb32_sp = tf->tf_usr_sp; 765} 766 767/* 768 * Make a standard dump_avail array. Can't make the phys_avail 769 * since we need to do that after we call pmap_bootstrap, but this 770 * is needed before pmap_boostrap. 771 * 772 * ARM_USE_SMALL_ALLOC uses dump_avail, so it must be filled before 773 * calling pmap_bootstrap. 774 */ 775void 776arm_dump_avail_init(vm_offset_t ramsize, size_t max) 777{ 778#ifdef LINUX_BOOT_ABI 779 /* 780 * Linux boot loader passes us the actual banks of memory, so use them 781 * to construct the dump_avail array. 782 */ 783 if (membanks > 0) 784 { 785 int i, j; 786 787 if (max < (membanks + 1) * 2) 788 panic("dump_avail[%d] too small for %d banks\n", 789 max, membanks); 790 for (j = 0, i = 0; i < membanks; i++) { 791 dump_avail[j++] = round_page(memstart[i]); 792 dump_avail[j++] = trunc_page(memstart[i] + memsize[i]); 793 } 794 dump_avail[j++] = 0; 795 dump_avail[j++] = 0; 796 return; 797 } 798#endif 799 if (max < 4) 800 panic("dump_avail too small\n"); 801 802 dump_avail[0] = round_page(PHYSADDR); 803 dump_avail[1] = trunc_page(PHYSADDR + ramsize); 804 dump_avail[2] = 0; 805 dump_avail[3] = 0; 806} 807 808/* 809 * Fake up a boot descriptor table 810 */ 811vm_offset_t 812fake_preload_metadata(struct arm_boot_params *abp __unused) 813{ 814#ifdef DDB 815 vm_offset_t zstart = 0, zend = 0; 816#endif 817 vm_offset_t lastaddr; 818 int i = 0; 819 static uint32_t fake_preload[35]; 820 821 fake_preload[i++] = MODINFO_NAME; 822 fake_preload[i++] = strlen("kernel") + 1; 823 strcpy((char*)&fake_preload[i++], "kernel"); 824 i += 1; 825 fake_preload[i++] = MODINFO_TYPE; 826 fake_preload[i++] = strlen("elf kernel") + 1; 827 strcpy((char*)&fake_preload[i++], "elf kernel"); 828 i += 2; 829 fake_preload[i++] = MODINFO_ADDR; 830 fake_preload[i++] = sizeof(vm_offset_t); 831 fake_preload[i++] = KERNVIRTADDR; 832 fake_preload[i++] = MODINFO_SIZE; 833 fake_preload[i++] = sizeof(uint32_t); 834 fake_preload[i++] = (uint32_t)&end - KERNVIRTADDR; 835#ifdef DDB 836 if (*(uint32_t *)KERNVIRTADDR == MAGIC_TRAMP_NUMBER) { 837 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_SSYM; 838 fake_preload[i++] = sizeof(vm_offset_t); 839 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 4); 840 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_ESYM; 841 fake_preload[i++] = sizeof(vm_offset_t); 842 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 8); 843 lastaddr = *(uint32_t *)(KERNVIRTADDR + 8); 844 zend = lastaddr; 845 zstart = *(uint32_t *)(KERNVIRTADDR + 4); 846 ksym_start = zstart; 847 ksym_end = zend; 848 } else 849#endif 850 lastaddr = (vm_offset_t)&end; 851 fake_preload[i++] = 0; 852 fake_preload[i] = 0; 853 preload_metadata = (void *)fake_preload; 854 855 return (lastaddr); 856} 857 858void 859pcpu0_init(void) 860{ 861#if ARM_ARCH_6 || ARM_ARCH_7A || defined(CPU_MV_PJ4B) 862 set_pcpu(pcpup); 863#endif 864 pcpu_init(pcpup, 0, sizeof(struct pcpu)); 865 PCPU_SET(curthread, &thread0); 866#ifdef ARM_VFP_SUPPORT 867 PCPU_SET(cpu, 0); 868#endif 869} 870 871#if defined(LINUX_BOOT_ABI) 872vm_offset_t 873linux_parse_boot_param(struct arm_boot_params *abp) 874{ 875 struct arm_lbabi_tag *walker; 876 uint32_t revision; 877 uint64_t serial; 878 879 /* 880 * Linux boot ABI: r0 = 0, r1 is the board type (!= 0) and r2 881 * is atags or dtb pointer. If all of these aren't satisfied, 882 * then punt. 883 */ 884 if (!(abp->abp_r0 == 0 && abp->abp_r1 != 0 && abp->abp_r2 != 0)) 885 return 0; 886 887 board_id = abp->abp_r1; 888 walker = (struct arm_lbabi_tag *) 889 (abp->abp_r2 + KERNVIRTADDR - KERNPHYSADDR); 890 891 /* xxx - Need to also look for binary device tree */ 892 if (ATAG_TAG(walker) != ATAG_CORE) 893 return 0; 894 895 atag_list = walker; 896 while (ATAG_TAG(walker) != ATAG_NONE) { 897 switch (ATAG_TAG(walker)) { 898 case ATAG_CORE: 899 break; 900 case ATAG_MEM: 901 if (membanks < LBABI_MAX_BANKS) { 902 memstart[membanks] = walker->u.tag_mem.start; 903 memsize[membanks] = walker->u.tag_mem.size; 904 } 905 membanks++; 906 break; 907 case ATAG_INITRD2: 908 break; 909 case ATAG_SERIAL: 910 serial = walker->u.tag_sn.low | 911 ((uint64_t)walker->u.tag_sn.high << 32); 912 board_set_serial(serial); 913 break; 914 case ATAG_REVISION: 915 revision = walker->u.tag_rev.rev; 916 board_set_revision(revision); 917 break; 918 case ATAG_CMDLINE: 919 /* XXX open question: Parse this for boothowto? */ 920 bcopy(walker->u.tag_cmd.command, linux_command_line, 921 ATAG_SIZE(walker)); 922 break; 923 default: 924 break; 925 } 926 walker = ATAG_NEXT(walker); 927 } 928 929 /* Save a copy for later */ 930 bcopy(atag_list, atags, 931 (char *)walker - (char *)atag_list + ATAG_SIZE(walker)); 932 933 return fake_preload_metadata(abp); 934} 935#endif 936 937#if defined(FREEBSD_BOOT_LOADER) 938vm_offset_t 939freebsd_parse_boot_param(struct arm_boot_params *abp) 940{ 941 vm_offset_t lastaddr = 0; 942 void *mdp; 943 void *kmdp; 944 945 /* 946 * Mask metadata pointer: it is supposed to be on page boundary. If 947 * the first argument (mdp) doesn't point to a valid address the 948 * bootloader must have passed us something else than the metadata 949 * ptr, so we give up. Also give up if we cannot find metadta section 950 * the loader creates that we get all this data out of. 951 */ 952 953 if ((mdp = (void *)(abp->abp_r0 & ~PAGE_MASK)) == NULL) 954 return 0; 955 preload_metadata = mdp; 956 kmdp = preload_search_by_type("elf kernel"); 957 if (kmdp == NULL) 958 return 0; 959 960 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int); 961 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *); 962 lastaddr = MD_FETCH(kmdp, MODINFOMD_KERNEND, vm_offset_t); 963#ifdef DDB 964 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t); 965 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t); 966#endif 967 preload_addr_relocate = KERNVIRTADDR - KERNPHYSADDR; 968 return lastaddr; 969} 970#endif 971 972vm_offset_t 973default_parse_boot_param(struct arm_boot_params *abp) 974{ 975 vm_offset_t lastaddr; 976 977#if defined(LINUX_BOOT_ABI) 978 if ((lastaddr = linux_parse_boot_param(abp)) != 0) 979 return lastaddr; 980#endif 981#if defined(FREEBSD_BOOT_LOADER) 982 if ((lastaddr = freebsd_parse_boot_param(abp)) != 0) 983 return lastaddr; 984#endif 985 /* Fall back to hardcoded metadata. */ 986 lastaddr = fake_preload_metadata(abp); 987 988 return lastaddr; 989} 990 991/* 992 * Stub version of the boot parameter parsing routine. We are 993 * called early in initarm, before even VM has been initialized. 994 * This routine needs to preserve any data that the boot loader 995 * has passed in before the kernel starts to grow past the end 996 * of the BSS, traditionally the place boot-loaders put this data. 997 * 998 * Since this is called so early, things that depend on the vm system 999 * being setup (including access to some SoC's serial ports), about 1000 * all that can be done in this routine is to copy the arguments. 1001 * 1002 * This is the default boot parameter parsing routine. Individual 1003 * kernels/boards can override this weak function with one of their 1004 * own. We just fake metadata... 1005 */ 1006__weak_reference(default_parse_boot_param, parse_boot_param); 1007 1008/* 1009 * Initialize proc0 1010 */ 1011void 1012init_proc0(vm_offset_t kstack) 1013{ 1014 proc_linkup0(&proc0, &thread0); 1015 thread0.td_kstack = kstack; 1016 thread0.td_pcb = (struct pcb *) 1017 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 1018 thread0.td_pcb->pcb_flags = 0; 1019 thread0.td_frame = &proc0_tf; 1020 pcpup->pc_curpcb = thread0.td_pcb; 1021} 1022 1023void 1024set_stackptrs(int cpu) 1025{ 1026 1027 set_stackptr(PSR_IRQ32_MODE, 1028 irqstack.pv_va + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 1029 set_stackptr(PSR_ABT32_MODE, 1030 abtstack.pv_va + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 1031 set_stackptr(PSR_UND32_MODE, 1032 undstack.pv_va + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 1033} 1034 1035#ifdef FDT 1036static char * 1037kenv_next(char *cp) 1038{ 1039 1040 if (cp != NULL) { 1041 while (*cp != 0) 1042 cp++; 1043 cp++; 1044 if (*cp == 0) 1045 cp = NULL; 1046 } 1047 return (cp); 1048} 1049 1050static void 1051print_kenv(void) 1052{ 1053 int len; 1054 char *cp; 1055 1056 debugf("loader passed (static) kenv:\n"); 1057 if (kern_envp == NULL) { 1058 debugf(" no env, null ptr\n"); 1059 return; 1060 } 1061 debugf(" kern_envp = 0x%08x\n", (uint32_t)kern_envp); 1062 1063 len = 0; 1064 for (cp = kern_envp; cp != NULL; cp = kenv_next(cp)) 1065 debugf(" %x %s\n", (uint32_t)cp, cp); 1066} 1067 1068static void 1069physmap_init(struct mem_region *availmem_regions, int availmem_regions_sz) 1070{ 1071 int i, j, cnt; 1072 vm_offset_t phys_kernelend, kernload; 1073 uint32_t s, e, sz; 1074 struct mem_region *mp, *mp1; 1075 1076 phys_kernelend = KERNPHYSADDR + (virtual_avail - KERNVIRTADDR); 1077 kernload = KERNPHYSADDR; 1078 1079 /* 1080 * Remove kernel physical address range from avail 1081 * regions list. Page align all regions. 1082 * Non-page aligned memory isn't very interesting to us. 1083 * Also, sort the entries for ascending addresses. 1084 */ 1085 sz = 0; 1086 cnt = availmem_regions_sz; 1087 debugf("processing avail regions:\n"); 1088 for (mp = availmem_regions; mp->mr_size; mp++) { 1089 s = mp->mr_start; 1090 e = mp->mr_start + mp->mr_size; 1091 debugf(" %08x-%08x -> ", s, e); 1092 /* Check whether this region holds all of the kernel. */ 1093 if (s < kernload && e > phys_kernelend) { 1094 availmem_regions[cnt].mr_start = phys_kernelend; 1095 availmem_regions[cnt++].mr_size = e - phys_kernelend; 1096 e = kernload; 1097 } 1098 /* Look whether this regions starts within the kernel. */ 1099 if (s >= kernload && s < phys_kernelend) { 1100 if (e <= phys_kernelend) 1101 goto empty; 1102 s = phys_kernelend; 1103 } 1104 /* Now look whether this region ends within the kernel. */ 1105 if (e > kernload && e <= phys_kernelend) { 1106 if (s >= kernload) { 1107 goto empty; 1108 } 1109 e = kernload; 1110 } 1111 /* Now page align the start and size of the region. */ 1112 s = round_page(s); 1113 e = trunc_page(e); 1114 if (e < s) 1115 e = s; 1116 sz = e - s; 1117 debugf("%08x-%08x = %x\n", s, e, sz); 1118 1119 /* Check whether some memory is left here. */ 1120 if (sz == 0) { 1121 empty: 1122 printf("skipping\n"); 1123 bcopy(mp + 1, mp, 1124 (cnt - (mp - availmem_regions)) * sizeof(*mp)); 1125 cnt--; 1126 mp--; 1127 continue; 1128 } 1129 1130 /* Do an insertion sort. */ 1131 for (mp1 = availmem_regions; mp1 < mp; mp1++) 1132 if (s < mp1->mr_start) 1133 break; 1134 if (mp1 < mp) { 1135 bcopy(mp1, mp1 + 1, (char *)mp - (char *)mp1); 1136 mp1->mr_start = s; 1137 mp1->mr_size = sz; 1138 } else { 1139 mp->mr_start = s; 1140 mp->mr_size = sz; 1141 } 1142 } 1143 availmem_regions_sz = cnt; 1144 1145 /* Fill in phys_avail table, based on availmem_regions */ 1146 debugf("fill in phys_avail:\n"); 1147 for (i = 0, j = 0; i < availmem_regions_sz; i++, j += 2) { 1148 1149 debugf(" region: 0x%08x - 0x%08x (0x%08x)\n", 1150 availmem_regions[i].mr_start, 1151 availmem_regions[i].mr_start + availmem_regions[i].mr_size, 1152 availmem_regions[i].mr_size); 1153 1154 /* 1155 * We should not map the page at PA 0x0000000, the VM can't 1156 * handle it, as pmap_extract() == 0 means failure. 1157 */ 1158 if (availmem_regions[i].mr_start > 0 || 1159 availmem_regions[i].mr_size > PAGE_SIZE) { 1160 phys_avail[j] = availmem_regions[i].mr_start; 1161 if (phys_avail[j] == 0) 1162 phys_avail[j] += PAGE_SIZE; 1163 phys_avail[j + 1] = availmem_regions[i].mr_start + 1164 availmem_regions[i].mr_size; 1165 } else 1166 j -= 2; 1167 } 1168 phys_avail[j] = 0; 1169 phys_avail[j + 1] = 0; 1170} 1171 1172void * 1173initarm(struct arm_boot_params *abp) 1174{ 1175 struct mem_region memory_regions[FDT_MEM_REGIONS]; 1176 struct mem_region availmem_regions[FDT_MEM_REGIONS]; 1177 struct mem_region reserved_regions[FDT_MEM_REGIONS]; 1178 struct pv_addr kernel_l1pt; 1179 struct pv_addr dpcpu; 1180 vm_offset_t dtbp, freemempos, l2_start, lastaddr; 1181 uint32_t memsize, l2size; 1182 char *env; 1183 void *kmdp; 1184 u_int l1pagetable; 1185 int i = 0, j = 0, err_devmap = 0; 1186 int memory_regions_sz; 1187 int availmem_regions_sz; 1188 int reserved_regions_sz; 1189 vm_offset_t start, end; 1190 vm_offset_t rstart, rend; 1191 int curr; 1192 1193 lastaddr = parse_boot_param(abp); 1194 memsize = 0; 1195 set_cpufuncs(); 1196 1197 /* 1198 * Find the dtb passed in by the boot loader. 1199 */ 1200 kmdp = preload_search_by_type("elf kernel"); 1201 if (kmdp != NULL) 1202 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t); 1203 else 1204 dtbp = (vm_offset_t)NULL; 1205 1206#if defined(FDT_DTB_STATIC) 1207 /* 1208 * In case the device tree blob was not retrieved (from metadata) try 1209 * to use the statically embedded one. 1210 */ 1211 if (dtbp == (vm_offset_t)NULL) 1212 dtbp = (vm_offset_t)&fdt_static_dtb; 1213#endif 1214 1215 if (OF_install(OFW_FDT, 0) == FALSE) 1216 while (1); 1217 1218 if (OF_init((void *)dtbp) != 0) 1219 while (1); 1220 1221 /* Grab physical memory regions information from device tree. */ 1222 if (fdt_get_mem_regions(memory_regions, &memory_regions_sz, 1223 &memsize) != 0) 1224 while(1); 1225 1226 /* Grab physical memory regions information from device tree. */ 1227 if (fdt_get_reserved_regions(reserved_regions, &reserved_regions_sz) != 0) 1228 reserved_regions_sz = 0; 1229 1230 /* 1231 * Now exclude all the reserved regions 1232 */ 1233 curr = 0; 1234 for (i = 0; i < memory_regions_sz; i++) { 1235 start = memory_regions[i].mr_start; 1236 end = start + memory_regions[i].mr_size; 1237 for (j = 0; j < reserved_regions_sz; j++) { 1238 rstart = reserved_regions[j].mr_start; 1239 rend = rstart + reserved_regions[j].mr_size; 1240 /* 1241 * Restricted region is before available 1242 * Skip restricted region 1243 */ 1244 if (rend <= start) 1245 continue; 1246 /* 1247 * Restricted region is behind available 1248 * No further processing required 1249 */ 1250 if (rstart >= end) 1251 break; 1252 /* 1253 * Restricted region includes memory region 1254 * skip availble region 1255 */ 1256 if ((start >= rstart) && (rend >= end)) { 1257 start = rend; 1258 end = rend; 1259 break; 1260 } 1261 /* 1262 * Memory region includes restricted region 1263 */ 1264 if ((rstart > start) && (end > rend)) { 1265 availmem_regions[curr].mr_start = start; 1266 availmem_regions[curr++].mr_size = rstart - start; 1267 start = rend; 1268 break; 1269 } 1270 /* 1271 * Memory region partially overlaps with restricted 1272 */ 1273 if ((rstart >= start) && (rstart <= end)) { 1274 end = rstart; 1275 } 1276 else if ((rend >= start) && (rend <= end)) { 1277 start = rend; 1278 } 1279 } 1280 1281 if (end > start) { 1282 availmem_regions[curr].mr_start = start; 1283 availmem_regions[curr++].mr_size = end - start; 1284 } 1285 } 1286 1287 availmem_regions_sz = curr; 1288 1289 /* Platform-specific initialisation */ 1290 vm_max_kernel_address = initarm_lastaddr(); 1291 1292 pcpu0_init(); 1293 1294 /* Do basic tuning, hz etc */ 1295 init_param1(); 1296 1297 /* Calculate number of L2 tables needed for mapping vm_page_array */ 1298 l2size = (memsize / PAGE_SIZE) * sizeof(struct vm_page); 1299 l2size = (l2size >> L1_S_SHIFT) + 1; 1300 1301 /* 1302 * Add one table for end of kernel map, one for stacks, msgbuf and 1303 * L1 and L2 tables map and one for vectors map. 1304 */ 1305 l2size += 3; 1306 1307 /* Make it divisible by 4 */ 1308 l2size = (l2size + 3) & ~3; 1309 1310 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK; 1311 1312 /* Define a macro to simplify memory allocation */ 1313#define valloc_pages(var, np) \ 1314 alloc_pages((var).pv_va, (np)); \ 1315 (var).pv_pa = (var).pv_va + (KERNPHYSADDR - KERNVIRTADDR); 1316 1317#define alloc_pages(var, np) \ 1318 (var) = freemempos; \ 1319 freemempos += (np * PAGE_SIZE); \ 1320 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 1321 1322 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0) 1323 freemempos += PAGE_SIZE; 1324 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 1325 1326 for (i = 0; i < l2size; ++i) { 1327 if (!(i % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) { 1328 valloc_pages(kernel_pt_table[i], 1329 L2_TABLE_SIZE / PAGE_SIZE); 1330 j = i; 1331 } else { 1332 kernel_pt_table[i].pv_va = kernel_pt_table[j].pv_va + 1333 L2_TABLE_SIZE_REAL * (i - j); 1334 kernel_pt_table[i].pv_pa = 1335 kernel_pt_table[i].pv_va - KERNVIRTADDR + 1336 KERNPHYSADDR; 1337 1338 } 1339 } 1340 /* 1341 * Allocate a page for the system page mapped to 0x00000000 1342 * or 0xffff0000. This page will just contain the system vectors 1343 * and can be shared by all processes. 1344 */ 1345 valloc_pages(systempage, 1); 1346 1347 /* Allocate dynamic per-cpu area. */ 1348 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE); 1349 dpcpu_init((void *)dpcpu.pv_va, 0); 1350 1351 /* Allocate stacks for all modes */ 1352 valloc_pages(irqstack, IRQ_STACK_SIZE * MAXCPU); 1353 valloc_pages(abtstack, ABT_STACK_SIZE * MAXCPU); 1354 valloc_pages(undstack, UND_STACK_SIZE * MAXCPU); 1355 valloc_pages(kernelstack, KSTACK_PAGES * MAXCPU); 1356 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE); 1357 1358 /* 1359 * Now we start construction of the L1 page table 1360 * We start by mapping the L2 page tables into the L1. 1361 * This means that we can replace L1 mappings later on if necessary 1362 */ 1363 l1pagetable = kernel_l1pt.pv_va; 1364 1365 /* 1366 * Try to map as much as possible of kernel text and data using 1367 * 1MB section mapping and for the rest of initial kernel address 1368 * space use L2 coarse tables. 1369 * 1370 * Link L2 tables for mapping remainder of kernel (modulo 1MB) 1371 * and kernel structures 1372 */ 1373 l2_start = lastaddr & ~(L1_S_OFFSET); 1374 for (i = 0 ; i < l2size - 1; i++) 1375 pmap_link_l2pt(l1pagetable, l2_start + i * L1_S_SIZE, 1376 &kernel_pt_table[i]); 1377 1378 pmap_curmaxkvaddr = l2_start + (l2size - 1) * L1_S_SIZE; 1379 1380 /* Map kernel code and data */ 1381 pmap_map_chunk(l1pagetable, KERNVIRTADDR, KERNPHYSADDR, 1382 (((uint32_t)(lastaddr) - KERNVIRTADDR) + PAGE_MASK) & ~PAGE_MASK, 1383 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 1384 1385 1386 /* Map L1 directory and allocated L2 page tables */ 1387 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 1388 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 1389 1390 pmap_map_chunk(l1pagetable, kernel_pt_table[0].pv_va, 1391 kernel_pt_table[0].pv_pa, 1392 L2_TABLE_SIZE_REAL * l2size, 1393 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 1394 1395 /* Map allocated DPCPU, stacks and msgbuf */ 1396 pmap_map_chunk(l1pagetable, dpcpu.pv_va, dpcpu.pv_pa, 1397 freemempos - dpcpu.pv_va, 1398 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 1399 1400 /* Link and map the vector page */ 1401 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH, 1402 &kernel_pt_table[l2size - 1]); 1403 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa, 1404 VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE, PTE_CACHE); 1405 1406 /* Map pmap_devmap[] entries */ 1407 err_devmap = platform_devmap_init(); 1408 pmap_devmap_bootstrap(l1pagetable, pmap_devmap_bootstrap_table); 1409 1410 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) | DOMAIN_CLIENT); 1411 pmap_pa = kernel_l1pt.pv_pa; 1412 setttb(kernel_l1pt.pv_pa); 1413 cpu_tlb_flushID(); 1414 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)); 1415 1416 /* 1417 * Only after the SOC registers block is mapped we can perform device 1418 * tree fixups, as they may attempt to read parameters from hardware. 1419 */ 1420 OF_interpret("perform-fixup", 0); 1421 1422 initarm_gpio_init(); 1423 1424 cninit(); 1425 1426 physmem = memsize / PAGE_SIZE; 1427 1428 debugf("initarm: console initialized\n"); 1429 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp); 1430 debugf(" boothowto = 0x%08x\n", boothowto); 1431 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp); 1432 print_kenv(); 1433 1434 env = getenv("kernelname"); 1435 if (env != NULL) 1436 strlcpy(kernelname, env, sizeof(kernelname)); 1437 1438 if (err_devmap != 0) 1439 printf("WARNING: could not fully configure devmap, error=%d\n", 1440 err_devmap); 1441 1442 initarm_late_init(); 1443 1444 /* 1445 * Pages were allocated during the secondary bootstrap for the 1446 * stacks for different CPU modes. 1447 * We must now set the r13 registers in the different CPU modes to 1448 * point to these stacks. 1449 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 1450 * of the stack memory. 1451 */ 1452 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE); 1453 1454 set_stackptrs(0); 1455 1456 /* 1457 * We must now clean the cache again.... 1458 * Cleaning may be done by reading new data to displace any 1459 * dirty data in the cache. This will have happened in setttb() 1460 * but since we are boot strapping the addresses used for the read 1461 * may have just been remapped and thus the cache could be out 1462 * of sync. A re-clean after the switch will cure this. 1463 * After booting there are no gross relocations of the kernel thus 1464 * this problem will not occur after initarm(). 1465 */ 1466 cpu_idcache_wbinv_all(); 1467 1468 /* Set stack for exception handlers */ 1469 data_abort_handler_address = (u_int)data_abort_handler; 1470 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 1471 undefined_handler_address = (u_int)undefinedinstruction_bounce; 1472 undefined_init(); 1473 1474 init_proc0(kernelstack.pv_va); 1475 1476 arm_intrnames_init(); 1477 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 1478 arm_dump_avail_init(memsize, sizeof(dump_avail) / sizeof(dump_avail[0])); 1479 pmap_bootstrap(freemempos, &kernel_l1pt); 1480 msgbufp = (void *)msgbufpv.pv_va; 1481 msgbufinit(msgbufp, msgbufsize); 1482 mutex_init(); 1483 1484 /* 1485 * Prepare map of physical memory regions available to vm subsystem. 1486 */ 1487 physmap_init(availmem_regions, availmem_regions_sz); 1488 1489 init_param2(physmem); 1490 kdb_init(); 1491 1492 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP - 1493 sizeof(struct pcb))); 1494} 1495#endif 1496