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if_ti.c (95673) if_ti.c (98849)
1/*
2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 15 unchanged lines hidden (view full) ---

24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
1/*
2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 15 unchanged lines hidden (view full) ---

24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * $FreeBSD: head/sys/dev/ti/if_ti.c 95673 2002-04-28 20:34:20Z phk $
32 * $FreeBSD: head/sys/dev/ti/if_ti.c 98849 2002-06-26 03:37:47Z ken $
33 */
34
35/*
36 * Alteon Networks Tigon PCI gigabit ethernet driver for FreeBSD.
37 * Manuals, sample driver and firmware source kits are available
38 * from http://www.alteon.com/support/openkits.
39 *
40 * Written by Bill Paul <wpaul@ctr.columbia.edu>

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73 * for testing
74 * - Raymond Lee of Netgear, for providing a pair of Netgear
75 * GA620 Tigon 2 boards for testing
76 * - Ulf Zimmermann, for bringing the GA260 to my attention and
77 * convincing me to write this driver.
78 * - Andrew Gallatin for providing FreeBSD/Alpha support.
79 */
80
33 */
34
35/*
36 * Alteon Networks Tigon PCI gigabit ethernet driver for FreeBSD.
37 * Manuals, sample driver and firmware source kits are available
38 * from http://www.alteon.com/support/openkits.
39 *
40 * Written by Bill Paul <wpaul@ctr.columbia.edu>

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73 * for testing
74 * - Raymond Lee of Netgear, for providing a pair of Netgear
75 * GA620 Tigon 2 boards for testing
76 * - Ulf Zimmermann, for bringing the GA260 to my attention and
77 * convincing me to write this driver.
78 * - Andrew Gallatin for providing FreeBSD/Alpha support.
79 */
80
81#include "opt_ti.h"
82
81#include <sys/param.h>
82#include <sys/systm.h>
83#include <sys/sockio.h>
84#include <sys/mbuf.h>
85#include <sys/malloc.h>
86#include <sys/kernel.h>
87#include <sys/socket.h>
88#include <sys/queue.h>
83#include <sys/param.h>
84#include <sys/systm.h>
85#include <sys/sockio.h>
86#include <sys/mbuf.h>
87#include <sys/malloc.h>
88#include <sys/kernel.h>
89#include <sys/socket.h>
90#include <sys/queue.h>
91#include <sys/conf.h>
89
90#include <net/if.h>
91#include <net/if_arp.h>
92#include <net/ethernet.h>
93#include <net/if_dl.h>
94#include <net/if_media.h>
95#include <net/if_types.h>
96#include <net/if_vlan_var.h>

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104#include <vm/vm.h> /* for vtophys */
105#include <vm/pmap.h> /* for vtophys */
106#include <machine/bus_memio.h>
107#include <machine/bus.h>
108#include <machine/resource.h>
109#include <sys/bus.h>
110#include <sys/rman.h>
111
92
93#include <net/if.h>
94#include <net/if_arp.h>
95#include <net/ethernet.h>
96#include <net/if_dl.h>
97#include <net/if_media.h>
98#include <net/if_types.h>
99#include <net/if_vlan_var.h>

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107#include <vm/vm.h> /* for vtophys */
108#include <vm/pmap.h> /* for vtophys */
109#include <machine/bus_memio.h>
110#include <machine/bus.h>
111#include <machine/resource.h>
112#include <sys/bus.h>
113#include <sys/rman.h>
114
115/* #define TI_PRIVATE_JUMBOS */
116
117#if !defined(TI_PRIVATE_JUMBOS)
118#include <sys/sockio.h>
119#include <sys/uio.h>
120#include <sys/lock.h>
121#include <vm/vm_extern.h>
122#include <vm/pmap.h>
123#include <vm/vm_map.h>
124#include <vm/vm_map.h>
125#include <vm/vm_param.h>
126#include <vm/vm_pageout.h>
127#include <sys/vmmeter.h>
128#include <vm/vm_page.h>
129#include <vm/vm_object.h>
130#include <vm/vm_kern.h>
131#include <sys/proc.h>
132#include <sys/jumbo.h>
133#endif /* !TI_PRIVATE_JUMBOS */
134#include <sys/vnode.h> /* for vfindev, vgone */
135
112#include <pci/pcireg.h>
113#include <pci/pcivar.h>
114
136#include <pci/pcireg.h>
137#include <pci/pcivar.h>
138
139#include <sys/tiio.h>
115#include <pci/if_tireg.h>
116#include <pci/ti_fw.h>
117#include <pci/ti_fw2.h>
118
119#define TI_CSUM_FEATURES (CSUM_IP | CSUM_TCP | CSUM_UDP | CSUM_IP_FRAGS)
140#include <pci/if_tireg.h>
141#include <pci/ti_fw.h>
142#include <pci/ti_fw2.h>
143
144#define TI_CSUM_FEATURES (CSUM_IP | CSUM_TCP | CSUM_UDP | CSUM_IP_FRAGS)
145/*
146 * We can only turn on header splitting if we're using extended receive
147 * BDs.
148 */
149#if defined(TI_JUMBO_HDRSPLIT) && defined(TI_PRIVATE_JUMBOS)
150#error "options TI_JUMBO_HDRSPLIT and TI_PRIVATE_JUMBOS are mutually exclusive"
151#endif /* TI_JUMBO_HDRSPLIT && TI_JUMBO_HDRSPLIT */
120
121#if !defined(lint)
122static const char rcsid[] =
152
153#if !defined(lint)
154static const char rcsid[] =
123 "$FreeBSD: head/sys/dev/ti/if_ti.c 95673 2002-04-28 20:34:20Z phk $";
155 "$FreeBSD: head/sys/dev/ti/if_ti.c 98849 2002-06-26 03:37:47Z ken $";
124#endif
125
156#endif
157
158struct ti_softc *tis[8];
159
160typedef enum {
161 TI_SWAP_HTON,
162 TI_SWAP_NTOH
163} ti_swap_type;
164
165
126/*
127 * Various supported device vendors/types and their names.
128 */
129
130static struct ti_type ti_devs[] = {
131 { ALT_VENDORID, ALT_DEVICEID_ACENIC,
132 "Alteon AceNIC 1000baseSX Gigabit Ethernet" },
133 { ALT_VENDORID, ALT_DEVICEID_ACENIC_COPPER,

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140 "Netgear GA620 1000baseT Gigabit Ethernet" },
141 { SGI_VENDORID, SGI_DEVICEID_TIGON,
142 "Silicon Graphics Gigabit Ethernet" },
143 { DEC_VENDORID, DEC_DEVICEID_FARALLON_PN9000SX,
144 "Farallon PN9000SX Gigabit Ethernet" },
145 { 0, 0, NULL }
146};
147
166/*
167 * Various supported device vendors/types and their names.
168 */
169
170static struct ti_type ti_devs[] = {
171 { ALT_VENDORID, ALT_DEVICEID_ACENIC,
172 "Alteon AceNIC 1000baseSX Gigabit Ethernet" },
173 { ALT_VENDORID, ALT_DEVICEID_ACENIC_COPPER,

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180 "Netgear GA620 1000baseT Gigabit Ethernet" },
181 { SGI_VENDORID, SGI_DEVICEID_TIGON,
182 "Silicon Graphics Gigabit Ethernet" },
183 { DEC_VENDORID, DEC_DEVICEID_FARALLON_PN9000SX,
184 "Farallon PN9000SX Gigabit Ethernet" },
185 { 0, 0, NULL }
186};
187
188#define TI_CDEV_MAJOR 153
189
190static d_open_t ti_open;
191static d_close_t ti_close;
192static d_ioctl_t ti_ioctl2;
193
194static struct cdevsw ti_cdevsw = {
195 /* open */ ti_open,
196 /* close */ ti_close,
197 /* read */ NULL,
198 /* write */ NULL,
199 /* ioctl */ ti_ioctl2,
200 /* poll */ seltrue,
201 /* mmap */ nommap,
202 /* strategy */ nostrategy,
203 /* name */ "ti",
204 /* maj */ TI_CDEV_MAJOR,
205 /* dump */ nodump,
206 /* psize */ nopsize,
207 /* flags */ 0,
208};
209
148static int ti_probe (device_t);
149static int ti_attach (device_t);
150static int ti_detach (device_t);
151static void ti_txeof (struct ti_softc *);
152static void ti_rxeof (struct ti_softc *);
153
154static void ti_stats_update (struct ti_softc *);
155static int ti_encap (struct ti_softc *, struct mbuf *, u_int32_t *);

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170static int ti_read_eeprom (struct ti_softc *, caddr_t, int, int);
171
172static void ti_add_mcast (struct ti_softc *, struct ether_addr *);
173static void ti_del_mcast (struct ti_softc *, struct ether_addr *);
174static void ti_setmulti (struct ti_softc *);
175
176static void ti_mem (struct ti_softc *, u_int32_t,
177 u_int32_t, caddr_t);
210static int ti_probe (device_t);
211static int ti_attach (device_t);
212static int ti_detach (device_t);
213static void ti_txeof (struct ti_softc *);
214static void ti_rxeof (struct ti_softc *);
215
216static void ti_stats_update (struct ti_softc *);
217static int ti_encap (struct ti_softc *, struct mbuf *, u_int32_t *);

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232static int ti_read_eeprom (struct ti_softc *, caddr_t, int, int);
233
234static void ti_add_mcast (struct ti_softc *, struct ether_addr *);
235static void ti_del_mcast (struct ti_softc *, struct ether_addr *);
236static void ti_setmulti (struct ti_softc *);
237
238static void ti_mem (struct ti_softc *, u_int32_t,
239 u_int32_t, caddr_t);
240static int ti_copy_mem (struct ti_softc *, u_int32_t,
241 u_int32_t, caddr_t, int, int);
242static int ti_copy_scratch (struct ti_softc *, u_int32_t,
243 u_int32_t, caddr_t, int, int, int);
244static int ti_bcopy_swap (const void *, void *, size_t,
245 ti_swap_type);
178static void ti_loadfw (struct ti_softc *);
179static void ti_cmd (struct ti_softc *, struct ti_cmd_desc *);
180static void ti_cmd_ext (struct ti_softc *, struct ti_cmd_desc *,
181 caddr_t, int);
182static void ti_handle_events (struct ti_softc *);
246static void ti_loadfw (struct ti_softc *);
247static void ti_cmd (struct ti_softc *, struct ti_cmd_desc *);
248static void ti_cmd_ext (struct ti_softc *, struct ti_cmd_desc *,
249 caddr_t, int);
250static void ti_handle_events (struct ti_softc *);
251#ifdef TI_PRIVATE_JUMBOS
183static int ti_alloc_jumbo_mem (struct ti_softc *);
184static void *ti_jalloc (struct ti_softc *);
185static void ti_jfree (caddr_t, void *);
252static int ti_alloc_jumbo_mem (struct ti_softc *);
253static void *ti_jalloc (struct ti_softc *);
254static void ti_jfree (caddr_t, void *);
255#endif /* TI_PRIVATE_JUMBOS */
186static int ti_newbuf_std (struct ti_softc *, int, struct mbuf *);
187static int ti_newbuf_mini (struct ti_softc *, int, struct mbuf *);
188static int ti_newbuf_jumbo (struct ti_softc *, int, struct mbuf *);
189static int ti_init_rx_ring_std (struct ti_softc *);
190static void ti_free_rx_ring_std (struct ti_softc *);
191static int ti_init_rx_ring_jumbo (struct ti_softc *);
192static void ti_free_rx_ring_jumbo (struct ti_softc *);
193static int ti_init_rx_ring_mini (struct ti_softc *);
194static void ti_free_rx_ring_mini (struct ti_softc *);
195static void ti_free_tx_ring (struct ti_softc *);
196static int ti_init_tx_ring (struct ti_softc *);
197
198static int ti_64bitslot_war (struct ti_softc *);
199static int ti_chipinit (struct ti_softc *);
200static int ti_gibinit (struct ti_softc *);
201
256static int ti_newbuf_std (struct ti_softc *, int, struct mbuf *);
257static int ti_newbuf_mini (struct ti_softc *, int, struct mbuf *);
258static int ti_newbuf_jumbo (struct ti_softc *, int, struct mbuf *);
259static int ti_init_rx_ring_std (struct ti_softc *);
260static void ti_free_rx_ring_std (struct ti_softc *);
261static int ti_init_rx_ring_jumbo (struct ti_softc *);
262static void ti_free_rx_ring_jumbo (struct ti_softc *);
263static int ti_init_rx_ring_mini (struct ti_softc *);
264static void ti_free_rx_ring_mini (struct ti_softc *);
265static void ti_free_tx_ring (struct ti_softc *);
266static int ti_init_tx_ring (struct ti_softc *);
267
268static int ti_64bitslot_war (struct ti_softc *);
269static int ti_chipinit (struct ti_softc *);
270static int ti_gibinit (struct ti_softc *);
271
272#ifdef TI_JUMBO_HDRSPLIT
273static __inline void ti_hdr_split __P((struct mbuf *top, int hdr_len,
274 int pkt_len, int idx));
275#endif /* TI_JUMBO_HDRSPLIT */
276
202static device_method_t ti_methods[] = {
203 /* Device interface */
204 DEVMETHOD(device_probe, ti_probe),
205 DEVMETHOD(device_attach, ti_attach),
206 DEVMETHOD(device_detach, ti_detach),
207 DEVMETHOD(device_shutdown, ti_shutdown),
208 { 0, 0 }
209};
210
211static driver_t ti_driver = {
212 "ti",
213 ti_methods,
214 sizeof(struct ti_softc)
215};
216
217static devclass_t ti_devclass;
218
219DRIVER_MODULE(if_ti, pci, ti_driver, ti_devclass, 0, 0);
220
277static device_method_t ti_methods[] = {
278 /* Device interface */
279 DEVMETHOD(device_probe, ti_probe),
280 DEVMETHOD(device_attach, ti_attach),
281 DEVMETHOD(device_detach, ti_detach),
282 DEVMETHOD(device_shutdown, ti_shutdown),
283 { 0, 0 }
284};
285
286static driver_t ti_driver = {
287 "ti",
288 ti_methods,
289 sizeof(struct ti_softc)
290};
291
292static devclass_t ti_devclass;
293
294DRIVER_MODULE(if_ti, pci, ti_driver, ti_devclass, 0, 0);
295
296/* List of Tigon softcs */
297static STAILQ_HEAD(ti_softc_list, ti_softc) ti_sc_list;
298
299static struct ti_softc *
300ti_lookup_softc(int unit)
301{
302 struct ti_softc *sc;
303 for (sc = STAILQ_FIRST(&ti_sc_list); sc != NULL;
304 sc = STAILQ_NEXT(sc, ti_links))
305 if (sc->ti_unit == unit)
306 return(sc);
307 return(NULL);
308}
309
221/*
222 * Send an instruction or address to the EEPROM, check for ACK.
223 */
224static u_int32_t ti_eeprom_putbyte(sc, byte)
225 struct ti_softc *sc;
226 int byte;
227{
228 register int i, ack = 0;

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393 }
394 segptr += segsize;
395 cnt -= segsize;
396 }
397
398 return;
399}
400
310/*
311 * Send an instruction or address to the EEPROM, check for ACK.
312 */
313static u_int32_t ti_eeprom_putbyte(sc, byte)
314 struct ti_softc *sc;
315 int byte;
316{
317 register int i, ack = 0;

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482 }
483 segptr += segsize;
484 cnt -= segsize;
485 }
486
487 return;
488}
489
490static int
491ti_copy_mem(sc, tigon_addr, len, buf, useraddr, readdata)
492 struct ti_softc *sc;
493 u_int32_t tigon_addr, len;
494 caddr_t buf;
495 int useraddr, readdata;
496{
497 int segptr, segsize, cnt;
498 caddr_t ptr;
499 u_int32_t origwin;
500 u_int8_t tmparray[TI_WINLEN], tmparray2[TI_WINLEN];
501 int resid, segresid;
502 int first_pass;
503
504 /*
505 * At the moment, we don't handle non-aligned cases, we just bail.
506 * If this proves to be a problem, it will be fixed.
507 */
508 if ((readdata == 0)
509 && (tigon_addr & 0x3)) {
510 printf("ti%d: ti_copy_mem: tigon address %#x isn't "
511 "word-aligned\n", sc->ti_unit, tigon_addr);
512 printf("ti%d: ti_copy_mem: unaligned writes aren't yet "
513 "supported\n", sc->ti_unit);
514 return(EINVAL);
515 }
516
517 segptr = tigon_addr & ~0x3;
518 segresid = tigon_addr - segptr;
519
520 /*
521 * This is the non-aligned amount left over that we'll need to
522 * copy.
523 */
524 resid = len & 0x3;
525
526 /* Add in the left over amount at the front of the buffer */
527 resid += segresid;
528
529 cnt = len & ~0x3;
530 /*
531 * If resid + segresid is >= 4, add multiples of 4 to the count and
532 * decrease the residual by that much.
533 */
534 cnt += resid & ~0x3;
535 resid -= resid & ~0x3;
536
537 ptr = buf;
538
539 first_pass = 1;
540
541 /*
542 * Make sure we aren't interrupted while we're changing the window
543 * pointer.
544 */
545 TI_LOCK(sc);
546
547 /*
548 * Save the old window base value.
549 */
550 origwin = CSR_READ_4(sc, TI_WINBASE);
551
552 while(cnt) {
553 bus_size_t ti_offset;
554
555 if (cnt < TI_WINLEN)
556 segsize = cnt;
557 else
558 segsize = TI_WINLEN - (segptr % TI_WINLEN);
559 CSR_WRITE_4(sc, TI_WINBASE, (segptr & ~(TI_WINLEN - 1)));
560
561 ti_offset = TI_WINDOW + (segptr & (TI_WINLEN -1));
562
563 if (readdata) {
564
565 bus_space_read_region_4(sc->ti_btag,
566 sc->ti_bhandle, ti_offset,
567 (u_int32_t *)tmparray,
568 segsize >> 2);
569 if (useraddr) {
570 /*
571 * Yeah, this is a little on the kludgy
572 * side, but at least this code is only
573 * used for debugging.
574 */
575 ti_bcopy_swap(tmparray, tmparray2, segsize,
576 TI_SWAP_NTOH);
577
578 if (first_pass) {
579 copyout(&tmparray2[segresid], ptr,
580 segsize - segresid);
581 first_pass = 0;
582 } else
583 copyout(tmparray2, ptr, segsize);
584 } else {
585 if (first_pass) {
586
587 ti_bcopy_swap(tmparray, tmparray2,
588 segsize, TI_SWAP_NTOH);
589 bcopy(&tmparray2[segresid], ptr,
590 segsize - segresid);
591 first_pass = 0;
592 } else
593 ti_bcopy_swap(tmparray, ptr, segsize,
594 TI_SWAP_NTOH);
595 }
596
597 } else {
598 if (useraddr) {
599 copyin(ptr, tmparray2, segsize);
600 ti_bcopy_swap(tmparray2, tmparray, segsize,
601 TI_SWAP_HTON);
602 } else
603 ti_bcopy_swap(ptr, tmparray, segsize,
604 TI_SWAP_HTON);
605
606 bus_space_write_region_4(sc->ti_btag,
607 sc->ti_bhandle, ti_offset,
608 (u_int32_t *)tmparray,
609 segsize >> 2);
610 }
611 segptr += segsize;
612 ptr += segsize;
613 cnt -= segsize;
614 }
615
616 /*
617 * Handle leftover, non-word-aligned bytes.
618 */
619 if (resid != 0) {
620 u_int32_t tmpval, tmpval2;
621 bus_size_t ti_offset;
622
623 /*
624 * Set the segment pointer.
625 */
626 CSR_WRITE_4(sc, TI_WINBASE, (segptr & ~(TI_WINLEN - 1)));
627
628 ti_offset = TI_WINDOW + (segptr & (TI_WINLEN - 1));
629
630 /*
631 * First, grab whatever is in our source/destination.
632 * We'll obviously need this for reads, but also for
633 * writes, since we'll be doing read/modify/write.
634 */
635 bus_space_read_region_4(sc->ti_btag, sc->ti_bhandle,
636 ti_offset, &tmpval, 1);
637
638 /*
639 * Next, translate this from little-endian to big-endian
640 * (at least on i386 boxes).
641 */
642 tmpval2 = ntohl(tmpval);
643
644 if (readdata) {
645 /*
646 * If we're reading, just copy the leftover number
647 * of bytes from the host byte order buffer to
648 * the user's buffer.
649 */
650 if (useraddr)
651 copyout(&tmpval2, ptr, resid);
652 else
653 bcopy(&tmpval2, ptr, resid);
654 } else {
655 /*
656 * If we're writing, first copy the bytes to be
657 * written into the network byte order buffer,
658 * leaving the rest of the buffer with whatever was
659 * originally in there. Then, swap the bytes
660 * around into host order and write them out.
661 *
662 * XXX KDM the read side of this has been verified
663 * to work, but the write side of it has not been
664 * verified. So user beware.
665 */
666 if (useraddr)
667 copyin(ptr, &tmpval2, resid);
668 else
669 bcopy(ptr, &tmpval2, resid);
670
671 tmpval = htonl(tmpval2);
672
673 bus_space_write_region_4(sc->ti_btag, sc->ti_bhandle,
674 ti_offset, &tmpval, 1);
675 }
676 }
677
678 CSR_WRITE_4(sc, TI_WINBASE, origwin);
679
680 TI_UNLOCK(sc);
681
682 return(0);
683}
684
685static int
686ti_copy_scratch(sc, tigon_addr, len, buf, useraddr, readdata, cpu)
687 struct ti_softc *sc;
688 u_int32_t tigon_addr, len;
689 caddr_t buf;
690 int useraddr, readdata;
691 int cpu;
692{
693 u_int32_t segptr;
694 int cnt;
695 u_int32_t tmpval, tmpval2;
696 caddr_t ptr;
697
698 /*
699 * At the moment, we don't handle non-aligned cases, we just bail.
700 * If this proves to be a problem, it will be fixed.
701 */
702 if (tigon_addr & 0x3) {
703 printf("ti%d: ti_copy_scratch: tigon address %#x isn't "
704 "word-aligned\n", sc->ti_unit, tigon_addr);
705 return(EINVAL);
706 }
707
708 if (len & 0x3) {
709 printf("ti%d: ti_copy_scratch: transfer length %d isn't "
710 "word-aligned\n", sc->ti_unit, len);
711 return(EINVAL);
712 }
713
714 segptr = tigon_addr;
715 cnt = len;
716 ptr = buf;
717
718 TI_LOCK(sc);
719
720 while (cnt) {
721 CSR_WRITE_4(sc, CPU_REG(TI_SRAM_ADDR, cpu), segptr);
722
723 if (readdata) {
724 tmpval2 = CSR_READ_4(sc, CPU_REG(TI_SRAM_DATA, cpu));
725
726 tmpval = ntohl(tmpval2);
727
728 /*
729 * Note: I've used this debugging interface
730 * extensively with Alteon's 12.3.15 firmware,
731 * compiled with GCC 2.7.2.1 and binutils 2.9.1.
732 *
733 * When you compile the firmware without
734 * optimization, which is necessary sometimes in
735 * order to properly step through it, you sometimes
736 * read out a bogus value of 0xc0017c instead of
737 * whatever was supposed to be in that scratchpad
738 * location. That value is on the stack somewhere,
739 * but I've never been able to figure out what was
740 * causing the problem.
741 *
742 * The address seems to pop up in random places,
743 * often not in the same place on two subsequent
744 * reads.
745 *
746 * In any case, the underlying data doesn't seem
747 * to be affected, just the value read out.
748 *
749 * KDM, 3/7/2000
750 */
751
752 if (tmpval2 == 0xc0017c)
753 printf("ti%d: found 0xc0017c at %#x "
754 "(tmpval2)\n", sc->ti_unit, segptr);
755
756 if (tmpval == 0xc0017c)
757 printf("ti%d: found 0xc0017c at %#x "
758 "(tmpval)\n", sc->ti_unit, segptr);
759
760 if (useraddr)
761 copyout(&tmpval, ptr, 4);
762 else
763 bcopy(&tmpval, ptr, 4);
764 } else {
765 if (useraddr)
766 copyin(ptr, &tmpval2, 4);
767 else
768 bcopy(ptr, &tmpval2, 4);
769
770 tmpval = htonl(tmpval2);
771
772 CSR_WRITE_4(sc, CPU_REG(TI_SRAM_DATA, cpu), tmpval);
773 }
774
775 cnt -= 4;
776 segptr += 4;
777 ptr += 4;
778 }
779
780 TI_UNLOCK(sc);
781
782 return(0);
783}
784
785static int
786ti_bcopy_swap(src, dst, len, swap_type)
787 const void *src;
788 void *dst;
789 size_t len;
790 ti_swap_type swap_type;
791{
792 const u_int8_t *tmpsrc;
793 u_int8_t *tmpdst;
794 size_t tmplen;
795
796 if (len & 0x3) {
797 printf("ti_bcopy_swap: length %d isn't 32-bit aligned\n",
798 len);
799 return(-1);
800 }
801
802 tmpsrc = src;
803 tmpdst = dst;
804 tmplen = len;
805
806 while (tmplen) {
807 if (swap_type == TI_SWAP_NTOH)
808 *(u_int32_t *)tmpdst =
809 ntohl(*(const u_int32_t *)tmpsrc);
810 else
811 *(u_int32_t *)tmpdst =
812 htonl(*(const u_int32_t *)tmpsrc);
813
814 tmpsrc += 4;
815 tmpdst += 4;
816 tmplen -= 4;
817 }
818
819 return(0);
820}
821
401/*
402 * Load firmware image into the NIC. Check that the firmware revision
403 * is acceptable and see if we want the firmware for the Tigon 1 or
404 * Tigon 2.
405 */
406static void ti_loadfw(sc)
407 struct ti_softc *sc;
408{

--- 149 unchanged lines hidden (view full) ---

558 /* Advance the consumer index. */
559 TI_INC(sc->ti_ev_saved_considx, TI_EVENT_RING_CNT);
560 CSR_WRITE_4(sc, TI_GCR_EVENTCONS_IDX, sc->ti_ev_saved_considx);
561 }
562
563 return;
564}
565
822/*
823 * Load firmware image into the NIC. Check that the firmware revision
824 * is acceptable and see if we want the firmware for the Tigon 1 or
825 * Tigon 2.
826 */
827static void ti_loadfw(sc)
828 struct ti_softc *sc;
829{

--- 149 unchanged lines hidden (view full) ---

979 /* Advance the consumer index. */
980 TI_INC(sc->ti_ev_saved_considx, TI_EVENT_RING_CNT);
981 CSR_WRITE_4(sc, TI_GCR_EVENTCONS_IDX, sc->ti_ev_saved_considx);
982 }
983
984 return;
985}
986
987#ifdef TI_PRIVATE_JUMBOS
988
566/*
567 * Memory management for the jumbo receive ring is a pain in the
568 * butt. We need to allocate at least 9018 bytes of space per frame,
569 * _and_ it has to be contiguous (unless you use the extended
570 * jumbo descriptor format). Using malloc() all the time won't
571 * work: malloc() allocates memory in powers of two, which means we
572 * would end up wasting a considerable amount of space by allocating
573 * 9K chunks. We don't have a jumbo mbuf cluster pool. Thus, we have

--- 105 unchanged lines hidden (view full) ---

679 panic("ti_jfree: buffer not in use!");
680 entry->slot = i;
681 SLIST_REMOVE_HEAD(&sc->ti_jinuse_listhead, jpool_entries);
682 SLIST_INSERT_HEAD(&sc->ti_jfree_listhead, entry, jpool_entries);
683
684 return;
685}
686
989/*
990 * Memory management for the jumbo receive ring is a pain in the
991 * butt. We need to allocate at least 9018 bytes of space per frame,
992 * _and_ it has to be contiguous (unless you use the extended
993 * jumbo descriptor format). Using malloc() all the time won't
994 * work: malloc() allocates memory in powers of two, which means we
995 * would end up wasting a considerable amount of space by allocating
996 * 9K chunks. We don't have a jumbo mbuf cluster pool. Thus, we have

--- 105 unchanged lines hidden (view full) ---

1102 panic("ti_jfree: buffer not in use!");
1103 entry->slot = i;
1104 SLIST_REMOVE_HEAD(&sc->ti_jinuse_listhead, jpool_entries);
1105 SLIST_INSERT_HEAD(&sc->ti_jfree_listhead, entry, jpool_entries);
1106
1107 return;
1108}
1109
1110#endif /* TI_PRIVATE_JUMBOS */
687
688/*
689 * Intialize a standard receive ring descriptor.
690 */
691static int ti_newbuf_std(sc, i, m)
692 struct ti_softc *sc;
693 int i;
694 struct mbuf *m;

--- 65 unchanged lines hidden (view full) ---

760 if (sc->arpcom.ac_if.if_hwassist)
761 r->ti_flags |= TI_BDFLAG_TCP_UDP_CKSUM | TI_BDFLAG_IP_CKSUM;
762 r->ti_len = m_new->m_len;
763 r->ti_idx = i;
764
765 return(0);
766}
767
1111
1112/*
1113 * Intialize a standard receive ring descriptor.
1114 */
1115static int ti_newbuf_std(sc, i, m)
1116 struct ti_softc *sc;
1117 int i;
1118 struct mbuf *m;

--- 65 unchanged lines hidden (view full) ---

1184 if (sc->arpcom.ac_if.if_hwassist)
1185 r->ti_flags |= TI_BDFLAG_TCP_UDP_CKSUM | TI_BDFLAG_IP_CKSUM;
1186 r->ti_len = m_new->m_len;
1187 r->ti_idx = i;
1188
1189 return(0);
1190}
1191
1192#ifdef TI_PRIVATE_JUMBOS
1193
768/*
769 * Initialize a jumbo receive ring descriptor. This allocates
770 * a jumbo buffer from the pool managed internally by the driver.
771 */
772static int ti_newbuf_jumbo(sc, i, m)
773 struct ti_softc *sc;
774 int i;
775 struct mbuf *m;

--- 40 unchanged lines hidden (view full) ---

816 if (sc->arpcom.ac_if.if_hwassist)
817 r->ti_flags |= TI_BDFLAG_TCP_UDP_CKSUM | TI_BDFLAG_IP_CKSUM;
818 r->ti_len = m_new->m_len;
819 r->ti_idx = i;
820
821 return(0);
822}
823
1194/*
1195 * Initialize a jumbo receive ring descriptor. This allocates
1196 * a jumbo buffer from the pool managed internally by the driver.
1197 */
1198static int ti_newbuf_jumbo(sc, i, m)
1199 struct ti_softc *sc;
1200 int i;
1201 struct mbuf *m;

--- 40 unchanged lines hidden (view full) ---

1242 if (sc->arpcom.ac_if.if_hwassist)
1243 r->ti_flags |= TI_BDFLAG_TCP_UDP_CKSUM | TI_BDFLAG_IP_CKSUM;
1244 r->ti_len = m_new->m_len;
1245 r->ti_idx = i;
1246
1247 return(0);
1248}
1249
1250#else
1251#include <vm/vm_page.h>
1252
1253#if (PAGE_SIZE == 4096)
1254#define NPAYLOAD 2
1255#else
1256#define NPAYLOAD 1
1257#endif
1258
1259#define TCP_HDR_LEN (52 + sizeof(struct ether_header))
1260#define UDP_HDR_LEN (28 + sizeof(struct ether_header))
1261#define NFS_HDR_LEN (UDP_HDR_LEN)
1262int HDR_LEN = TCP_HDR_LEN;
1263
1264
1265 /*
1266 * Initialize a jumbo receive ring descriptor. This allocates
1267 * a jumbo buffer from the pool managed internally by the driver.
1268 */
1269static int
1270ti_newbuf_jumbo(sc, idx, m_old)
1271 struct ti_softc *sc;
1272 int idx;
1273 struct mbuf *m_old;
1274{
1275 struct mbuf *cur, *m_new = NULL;
1276 struct mbuf *m[3] = {NULL, NULL, NULL};
1277 struct ti_rx_desc_ext *r;
1278 vm_page_t frame;
1279 /* 1 extra buf to make nobufs easy*/
1280 caddr_t buf[3] = {NULL, NULL, NULL};
1281 int i;
1282
1283 if (m_old != NULL) {
1284 m_new = m_old;
1285 cur = m_old->m_next;
1286 for (i = 0; i <= NPAYLOAD; i++){
1287 m[i] = cur;
1288 cur = cur->m_next;
1289 }
1290 } else {
1291 /* Allocate the mbufs. */
1292 MGETHDR(m_new, M_DONTWAIT, MT_DATA);
1293 if (m_new == NULL) {
1294 printf("ti%d: mbuf allocation failed "
1295 "-- packet dropped!\n", sc->ti_unit);
1296 goto nobufs;
1297 }
1298 MGET(m[NPAYLOAD], M_DONTWAIT, MT_DATA);
1299 if (m[NPAYLOAD] == NULL) {
1300 printf("ti%d: cluster mbuf allocation failed "
1301 "-- packet dropped!\n", sc->ti_unit);
1302 goto nobufs;
1303 }
1304 MCLGET(m[NPAYLOAD], M_DONTWAIT);
1305 if ((m[NPAYLOAD]->m_flags & M_EXT) == 0) {
1306 printf("ti%d: mbuf allocation failed "
1307 "-- packet dropped!\n", sc->ti_unit);
1308 goto nobufs;
1309 }
1310 m[NPAYLOAD]->m_len = MCLBYTES;
1311
1312 for (i = 0; i < NPAYLOAD; i++){
1313 MGET(m[i], M_DONTWAIT, MT_DATA);
1314 if (m[i] == NULL) {
1315 printf("ti%d: mbuf allocation failed "
1316 "-- packet dropped!\n", sc->ti_unit);
1317 goto nobufs;
1318 }
1319 if (!(frame = jumbo_pg_alloc())){
1320 printf("ti%d: buffer allocation failed "
1321 "-- packet dropped!\n", sc->ti_unit);
1322 printf(" index %d page %d\n", idx, i);
1323 goto nobufs;
1324 }
1325 buf[i] = jumbo_phys_to_kva(VM_PAGE_TO_PHYS(frame));
1326 }
1327 for (i = 0; i < NPAYLOAD; i++){
1328 /* Attach the buffer to the mbuf. */
1329 m[i]->m_data = (void *)buf[i];
1330 m[i]->m_len = PAGE_SIZE;
1331 MEXTADD(m[i], (void *)buf[i], PAGE_SIZE,
1332 jumbo_freem, NULL, 0, EXT_DISPOSABLE);
1333 m[i]->m_next = m[i+1];
1334 }
1335 /* link the buffers to the header */
1336 m_new->m_next = m[0];
1337 m_new->m_data += ETHER_ALIGN;
1338 if (sc->ti_hdrsplit)
1339 m_new->m_len = MHLEN - ETHER_ALIGN;
1340 else
1341 m_new->m_len = HDR_LEN;
1342 m_new->m_pkthdr.len = NPAYLOAD * PAGE_SIZE + m_new->m_len;
1343 }
1344
1345 /* Set up the descriptor. */
1346 r = &sc->ti_rdata->ti_rx_jumbo_ring[idx];
1347 sc->ti_cdata.ti_rx_jumbo_chain[idx] = m_new;
1348 TI_HOSTADDR(r->ti_addr0) = vtophys(mtod(m_new, caddr_t));
1349 r->ti_len0 = m_new->m_len;
1350
1351 TI_HOSTADDR(r->ti_addr1) = vtophys(mtod(m[0], caddr_t));
1352 r->ti_len1 = PAGE_SIZE;
1353
1354 TI_HOSTADDR(r->ti_addr2) = vtophys(mtod(m[1], caddr_t));
1355 r->ti_len2 = m[1]->m_ext.ext_size; /* could be PAGE_SIZE or MCLBYTES */
1356
1357 if (PAGE_SIZE == 4096) {
1358 TI_HOSTADDR(r->ti_addr3) = vtophys(mtod(m[2], caddr_t));
1359 r->ti_len3 = MCLBYTES;
1360 } else {
1361 r->ti_len3 = 0;
1362 }
1363 r->ti_type = TI_BDTYPE_RECV_JUMBO_BD;
1364
1365 r->ti_flags = TI_BDFLAG_JUMBO_RING|TI_RCB_FLAG_USE_EXT_RX_BD;
1366
1367 if (sc->arpcom.ac_if.if_hwassist)
1368 r->ti_flags |= TI_BDFLAG_TCP_UDP_CKSUM|TI_BDFLAG_IP_CKSUM;
1369
1370 r->ti_idx = idx;
1371
1372 return(0);
1373
1374 nobufs:
1375
1376 /*
1377 * Warning! :
1378 * This can only be called before the mbufs are strung together.
1379 * If the mbufs are strung together, m_freem() will free the chain,
1380 * so that the later mbufs will be freed multiple times.
1381 */
1382 if (m_new)
1383 m_freem(m_new);
1384
1385 for(i = 0; i < 3; i++){
1386 if (m[i])
1387 m_freem(m[i]);
1388 if (buf[i])
1389 jumbo_pg_free((vm_offset_t)buf[i]);
1390 }
1391 return ENOBUFS;
1392}
1393#endif
1394
1395
1396
824/*
825 * The standard receive ring has 512 entries in it. At 2K per mbuf cluster,
826 * that's 1MB or memory, which is a lot. For now, we fill only the first
827 * 256 ring entries and hope that our CPU is fast enough to keep up with
828 * the NIC.
829 */
830static int ti_init_rx_ring_std(sc)
831 struct ti_softc *sc;

--- 280 unchanged lines hidden (view full) ---

1112 * Do endian, PCI and DMA initialization. Also check the on-board ROM
1113 * self-test results.
1114 */
1115static int ti_chipinit(sc)
1116 struct ti_softc *sc;
1117{
1118 u_int32_t cacheline;
1119 u_int32_t pci_writemax = 0;
1397/*
1398 * The standard receive ring has 512 entries in it. At 2K per mbuf cluster,
1399 * that's 1MB or memory, which is a lot. For now, we fill only the first
1400 * 256 ring entries and hope that our CPU is fast enough to keep up with
1401 * the NIC.
1402 */
1403static int ti_init_rx_ring_std(sc)
1404 struct ti_softc *sc;

--- 280 unchanged lines hidden (view full) ---

1685 * Do endian, PCI and DMA initialization. Also check the on-board ROM
1686 * self-test results.
1687 */
1688static int ti_chipinit(sc)
1689 struct ti_softc *sc;
1690{
1691 u_int32_t cacheline;
1692 u_int32_t pci_writemax = 0;
1693 u_int32_t hdrsplit;
1120
1121 /* Initialize link to down state. */
1122 sc->ti_linkstat = TI_EV_CODE_LINK_DOWN;
1123
1124 if (sc->arpcom.ac_if.if_capenable & IFCAP_HWCSUM)
1125 sc->arpcom.ac_if.if_hwassist = TI_CSUM_FEATURES;
1126 else
1127 sc->arpcom.ac_if.if_hwassist = 0;

--- 31 unchanged lines hidden (view full) ---

1159
1160 /* Do special setup for Tigon 2. */
1161 if (sc->ti_hwrev == TI_HWREV_TIGON_II) {
1162 TI_SETBIT(sc, TI_CPU_CTL_B, TI_CPUSTATE_HALT);
1163 TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_SRAM_BANK_512K);
1164 TI_SETBIT(sc, TI_MISC_CONF, TI_MCR_SRAM_SYNCHRONOUS);
1165 }
1166
1694
1695 /* Initialize link to down state. */
1696 sc->ti_linkstat = TI_EV_CODE_LINK_DOWN;
1697
1698 if (sc->arpcom.ac_if.if_capenable & IFCAP_HWCSUM)
1699 sc->arpcom.ac_if.if_hwassist = TI_CSUM_FEATURES;
1700 else
1701 sc->arpcom.ac_if.if_hwassist = 0;

--- 31 unchanged lines hidden (view full) ---

1733
1734 /* Do special setup for Tigon 2. */
1735 if (sc->ti_hwrev == TI_HWREV_TIGON_II) {
1736 TI_SETBIT(sc, TI_CPU_CTL_B, TI_CPUSTATE_HALT);
1737 TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_SRAM_BANK_512K);
1738 TI_SETBIT(sc, TI_MISC_CONF, TI_MCR_SRAM_SYNCHRONOUS);
1739 }
1740
1741 /*
1742 * We don't have firmware source for the Tigon 1, so Tigon 1 boards
1743 * can't do header splitting.
1744 */
1745#ifdef TI_JUMBO_HDRSPLIT
1746 if (sc->ti_hwrev != TI_HWREV_TIGON)
1747 sc->ti_hdrsplit = 1;
1748 else
1749 printf("ti%d: can't do header splitting on a Tigon I board\n",
1750 sc->ti_unit);
1751#endif /* TI_JUMBO_HDRSPLIT */
1752
1167 /* Set up the PCI state register. */
1168 CSR_WRITE_4(sc, TI_PCI_STATE, TI_PCI_READ_CMD|TI_PCI_WRITE_CMD);
1169 if (sc->ti_hwrev == TI_HWREV_TIGON_II) {
1170 TI_SETBIT(sc, TI_PCI_STATE, TI_PCISTATE_USE_MEM_RD_MULT);
1171 }
1172
1173 /* Clear the read/write max DMA parameters. */
1174 TI_CLRBIT(sc, TI_PCI_STATE, (TI_PCISTATE_WRITE_MAXDMA|

--- 40 unchanged lines hidden (view full) ---

1215 TI_SETBIT(sc, TI_PCI_STATE, pci_writemax|TI_PCI_READMAX_1024);
1216#else
1217 TI_SETBIT(sc, TI_PCI_STATE, pci_writemax);
1218#endif
1219
1220 /* This sets the min dma param all the way up (0xff). */
1221 TI_SETBIT(sc, TI_PCI_STATE, TI_PCISTATE_MINDMA);
1222
1753 /* Set up the PCI state register. */
1754 CSR_WRITE_4(sc, TI_PCI_STATE, TI_PCI_READ_CMD|TI_PCI_WRITE_CMD);
1755 if (sc->ti_hwrev == TI_HWREV_TIGON_II) {
1756 TI_SETBIT(sc, TI_PCI_STATE, TI_PCISTATE_USE_MEM_RD_MULT);
1757 }
1758
1759 /* Clear the read/write max DMA parameters. */
1760 TI_CLRBIT(sc, TI_PCI_STATE, (TI_PCISTATE_WRITE_MAXDMA|

--- 40 unchanged lines hidden (view full) ---

1801 TI_SETBIT(sc, TI_PCI_STATE, pci_writemax|TI_PCI_READMAX_1024);
1802#else
1803 TI_SETBIT(sc, TI_PCI_STATE, pci_writemax);
1804#endif
1805
1806 /* This sets the min dma param all the way up (0xff). */
1807 TI_SETBIT(sc, TI_PCI_STATE, TI_PCISTATE_MINDMA);
1808
1809 if (sc->ti_hdrsplit)
1810 hdrsplit = TI_OPMODE_JUMBO_HDRSPLIT;
1811 else
1812 hdrsplit = 0;
1813
1223 /* Configure DMA variables. */
1224#if BYTE_ORDER == BIG_ENDIAN
1225 CSR_WRITE_4(sc, TI_GCR_OPMODE, TI_OPMODE_BYTESWAP_BD |
1226 TI_OPMODE_BYTESWAP_DATA | TI_OPMODE_WORDSWAP_BD |
1227 TI_OPMODE_WARN_ENB | TI_OPMODE_FATAL_ENB |
1814 /* Configure DMA variables. */
1815#if BYTE_ORDER == BIG_ENDIAN
1816 CSR_WRITE_4(sc, TI_GCR_OPMODE, TI_OPMODE_BYTESWAP_BD |
1817 TI_OPMODE_BYTESWAP_DATA | TI_OPMODE_WORDSWAP_BD |
1818 TI_OPMODE_WARN_ENB | TI_OPMODE_FATAL_ENB |
1228 TI_OPMODE_DONT_FRAG_JUMBO);
1229#else
1819 TI_OPMODE_DONT_FRAG_JUMBO | hdrsplit);
1820#else /* BYTE_ORDER */
1230 CSR_WRITE_4(sc, TI_GCR_OPMODE, TI_OPMODE_BYTESWAP_DATA|
1231 TI_OPMODE_WORDSWAP_BD|TI_OPMODE_DONT_FRAG_JUMBO|
1821 CSR_WRITE_4(sc, TI_GCR_OPMODE, TI_OPMODE_BYTESWAP_DATA|
1822 TI_OPMODE_WORDSWAP_BD|TI_OPMODE_DONT_FRAG_JUMBO|
1232 TI_OPMODE_WARN_ENB|TI_OPMODE_FATAL_ENB);
1233#endif
1823 TI_OPMODE_WARN_ENB|TI_OPMODE_FATAL_ENB | hdrsplit);
1824#endif /* BYTE_ORDER */
1234
1235 /*
1236 * Only allow 1 DMA channel to be active at a time.
1237 * I don't think this is a good idea, but without it
1238 * the firmware racks up lots of nicDmaReadRingFull
1239 * errors. This is not compatible with hardware checksums.
1240 */
1241 if (sc->arpcom.ac_if.if_hwassist == 0)

--- 80 unchanged lines hidden (view full) ---

1322 rcb->ti_flags |= TI_RCB_FLAG_TCP_UDP_CKSUM |
1323 TI_RCB_FLAG_IP_CKSUM | TI_RCB_FLAG_NO_PHDR_CKSUM;
1324 rcb->ti_flags |= TI_RCB_FLAG_VLAN_ASSIST;
1325
1326 /* Set up the jumbo receive ring. */
1327 rcb = &sc->ti_rdata->ti_info.ti_jumbo_rx_rcb;
1328 TI_HOSTADDR(rcb->ti_hostaddr) =
1329 vtophys(&sc->ti_rdata->ti_rx_jumbo_ring);
1825
1826 /*
1827 * Only allow 1 DMA channel to be active at a time.
1828 * I don't think this is a good idea, but without it
1829 * the firmware racks up lots of nicDmaReadRingFull
1830 * errors. This is not compatible with hardware checksums.
1831 */
1832 if (sc->arpcom.ac_if.if_hwassist == 0)

--- 80 unchanged lines hidden (view full) ---

1913 rcb->ti_flags |= TI_RCB_FLAG_TCP_UDP_CKSUM |
1914 TI_RCB_FLAG_IP_CKSUM | TI_RCB_FLAG_NO_PHDR_CKSUM;
1915 rcb->ti_flags |= TI_RCB_FLAG_VLAN_ASSIST;
1916
1917 /* Set up the jumbo receive ring. */
1918 rcb = &sc->ti_rdata->ti_info.ti_jumbo_rx_rcb;
1919 TI_HOSTADDR(rcb->ti_hostaddr) =
1920 vtophys(&sc->ti_rdata->ti_rx_jumbo_ring);
1921
1922#ifdef TI_PRIVATE_JUMBOS
1330 rcb->ti_max_len = TI_JUMBO_FRAMELEN;
1331 rcb->ti_flags = 0;
1923 rcb->ti_max_len = TI_JUMBO_FRAMELEN;
1924 rcb->ti_flags = 0;
1925#else
1926 rcb->ti_max_len = PAGE_SIZE;
1927 rcb->ti_flags = TI_RCB_FLAG_USE_EXT_RX_BD;
1928#endif
1332 if (sc->arpcom.ac_if.if_hwassist)
1333 rcb->ti_flags |= TI_RCB_FLAG_TCP_UDP_CKSUM |
1334 TI_RCB_FLAG_IP_CKSUM | TI_RCB_FLAG_NO_PHDR_CKSUM;
1335 rcb->ti_flags |= TI_RCB_FLAG_VLAN_ASSIST;
1336
1337 /*
1338 * Set up the mini ring. Only activated on the
1339 * Tigon 2 but the slot in the config block is

--- 53 unchanged lines hidden (view full) ---

1393 TI_HOSTADDR(rcb->ti_hostaddr) = TI_TX_RING_BASE;
1394 else
1395 TI_HOSTADDR(rcb->ti_hostaddr) =
1396 vtophys(&sc->ti_rdata->ti_tx_ring);
1397 TI_HOSTADDR(sc->ti_rdata->ti_info.ti_tx_considx_ptr) =
1398 vtophys(&sc->ti_tx_considx);
1399
1400 /* Set up tuneables */
1929 if (sc->arpcom.ac_if.if_hwassist)
1930 rcb->ti_flags |= TI_RCB_FLAG_TCP_UDP_CKSUM |
1931 TI_RCB_FLAG_IP_CKSUM | TI_RCB_FLAG_NO_PHDR_CKSUM;
1932 rcb->ti_flags |= TI_RCB_FLAG_VLAN_ASSIST;
1933
1934 /*
1935 * Set up the mini ring. Only activated on the
1936 * Tigon 2 but the slot in the config block is

--- 53 unchanged lines hidden (view full) ---

1990 TI_HOSTADDR(rcb->ti_hostaddr) = TI_TX_RING_BASE;
1991 else
1992 TI_HOSTADDR(rcb->ti_hostaddr) =
1993 vtophys(&sc->ti_rdata->ti_tx_ring);
1994 TI_HOSTADDR(sc->ti_rdata->ti_info.ti_tx_considx_ptr) =
1995 vtophys(&sc->ti_tx_considx);
1996
1997 /* Set up tuneables */
1998#if 0
1401 if (ifp->if_mtu > (ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN))
1402 CSR_WRITE_4(sc, TI_GCR_RX_COAL_TICKS,
1403 (sc->ti_rx_coal_ticks / 10));
1404 else
1999 if (ifp->if_mtu > (ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN))
2000 CSR_WRITE_4(sc, TI_GCR_RX_COAL_TICKS,
2001 (sc->ti_rx_coal_ticks / 10));
2002 else
2003#endif
1405 CSR_WRITE_4(sc, TI_GCR_RX_COAL_TICKS, sc->ti_rx_coal_ticks);
1406 CSR_WRITE_4(sc, TI_GCR_TX_COAL_TICKS, sc->ti_tx_coal_ticks);
1407 CSR_WRITE_4(sc, TI_GCR_STAT_TICKS, sc->ti_stat_ticks);
1408 CSR_WRITE_4(sc, TI_GCR_RX_MAX_COAL_BD, sc->ti_rx_max_coal_bds);
1409 CSR_WRITE_4(sc, TI_GCR_TX_MAX_COAL_BD, sc->ti_tx_max_coal_bds);
1410 CSR_WRITE_4(sc, TI_GCR_TX_BUFFER_RATIO, sc->ti_tx_buf_ratio);
1411
1412 /* Turn interrupts on. */

--- 24 unchanged lines hidden (view full) ---

1437 return(0);
1438 }
1439 t++;
1440 }
1441
1442 return(ENXIO);
1443}
1444
2004 CSR_WRITE_4(sc, TI_GCR_RX_COAL_TICKS, sc->ti_rx_coal_ticks);
2005 CSR_WRITE_4(sc, TI_GCR_TX_COAL_TICKS, sc->ti_tx_coal_ticks);
2006 CSR_WRITE_4(sc, TI_GCR_STAT_TICKS, sc->ti_stat_ticks);
2007 CSR_WRITE_4(sc, TI_GCR_RX_MAX_COAL_BD, sc->ti_rx_max_coal_bds);
2008 CSR_WRITE_4(sc, TI_GCR_TX_MAX_COAL_BD, sc->ti_tx_max_coal_bds);
2009 CSR_WRITE_4(sc, TI_GCR_TX_BUFFER_RATIO, sc->ti_tx_buf_ratio);
2010
2011 /* Turn interrupts on. */

--- 24 unchanged lines hidden (view full) ---

2036 return(0);
2037 }
2038 t++;
2039 }
2040
2041 return(ENXIO);
2042}
2043
2044#ifdef KLD_MODULE
2045static int
2046log2rndup(int len)
2047{
2048 int log2size = 0, t = len;
2049 while (t > 1) {
2050 log2size++;
2051 t >>= 1;
2052 }
2053 if (len != (1 << log2size))
2054 log2size++;
2055 return log2size;
2056}
2057
2058static int
2059ti_mbuf_sanity(device_t dev)
2060{
2061 if ((mbstat.m_msize != MSIZE) || mbstat.m_mclbytes != MCLBYTES){
2062 device_printf(dev, "\n");
2063 device_printf(dev, "This module was compiled with "
2064 "-DMCLSHIFT=%d -DMSIZE=%d\n", MCLSHIFT,
2065 MSIZE);
2066 device_printf(dev, "The kernel was compiled with MCLSHIFT=%d,"
2067 " MSIZE=%d\n", log2rndup(mbstat.m_mclbytes),
2068 (int)mbstat.m_msize);
2069 return(EINVAL);
2070 }
2071 return(0);
2072}
2073#endif
2074
2075
1445static int ti_attach(dev)
1446 device_t dev;
1447{
1448 u_int32_t command;
1449 struct ifnet *ifp;
1450 struct ti_softc *sc;
1451 int unit, error = 0, rid;
1452
2076static int ti_attach(dev)
2077 device_t dev;
2078{
2079 u_int32_t command;
2080 struct ifnet *ifp;
2081 struct ti_softc *sc;
2082 int unit, error = 0, rid;
2083
2084 sc = NULL;
2085
2086#ifdef KLD_MODULE
2087 if (ti_mbuf_sanity(dev)){
2088 device_printf(dev, "Module mbuf constants do not match "
2089 "kernel constants!\n");
2090 device_printf(dev, "Rebuild the module or the kernel so "
2091 "they match\n");
2092 device_printf(dev, "\n");
2093 error = EINVAL;
2094 goto fail;
2095 }
2096#endif
2097
1453 sc = device_get_softc(dev);
1454 unit = device_get_unit(dev);
1455 bzero(sc, sizeof(struct ti_softc));
1456
1457 mtx_init(&sc->ti_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
1458 MTX_DEF | MTX_RECURSE);
2098 sc = device_get_softc(dev);
2099 unit = device_get_unit(dev);
2100 bzero(sc, sizeof(struct ti_softc));
2101
2102 mtx_init(&sc->ti_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
2103 MTX_DEF | MTX_RECURSE);
1459 TI_LOCK(sc);
1460 sc->arpcom.ac_if.if_capabilities = IFCAP_HWCSUM;
1461 sc->arpcom.ac_if.if_capenable = sc->arpcom.ac_if.if_capabilities;
1462
1463 /*
1464 * Map control/status registers.
1465 */
1466 pci_enable_busmaster(dev);
1467 pci_enable_io(dev, SYS_RES_MEMORY);

--- 104 unchanged lines hidden (view full) ---

1572 error = ENXIO;
1573 printf("ti%d: no memory for list buffers!\n", sc->ti_unit);
1574 goto fail;
1575 }
1576
1577 bzero(sc->ti_rdata, sizeof(struct ti_ring_data));
1578
1579 /* Try to allocate memory for jumbo buffers. */
2104 sc->arpcom.ac_if.if_capabilities = IFCAP_HWCSUM;
2105 sc->arpcom.ac_if.if_capenable = sc->arpcom.ac_if.if_capabilities;
2106
2107 /*
2108 * Map control/status registers.
2109 */
2110 pci_enable_busmaster(dev);
2111 pci_enable_io(dev, SYS_RES_MEMORY);

--- 104 unchanged lines hidden (view full) ---

2216 error = ENXIO;
2217 printf("ti%d: no memory for list buffers!\n", sc->ti_unit);
2218 goto fail;
2219 }
2220
2221 bzero(sc->ti_rdata, sizeof(struct ti_ring_data));
2222
2223 /* Try to allocate memory for jumbo buffers. */
2224#ifdef TI_PRIVATE_JUMBOS
1580 if (ti_alloc_jumbo_mem(sc)) {
1581 printf("ti%d: jumbo buffer allocation failed\n", sc->ti_unit);
1582 bus_teardown_intr(dev, sc->ti_irq, sc->ti_intrhand);
1583 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->ti_irq);
1584 bus_release_resource(dev, SYS_RES_MEMORY,
1585 TI_PCI_LOMEM, sc->ti_res);
1586 contigfree(sc->ti_rdata, sizeof(struct ti_ring_data),
1587 M_DEVBUF);
1588 error = ENXIO;
1589 goto fail;
1590 }
2225 if (ti_alloc_jumbo_mem(sc)) {
2226 printf("ti%d: jumbo buffer allocation failed\n", sc->ti_unit);
2227 bus_teardown_intr(dev, sc->ti_irq, sc->ti_intrhand);
2228 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->ti_irq);
2229 bus_release_resource(dev, SYS_RES_MEMORY,
2230 TI_PCI_LOMEM, sc->ti_res);
2231 contigfree(sc->ti_rdata, sizeof(struct ti_ring_data),
2232 M_DEVBUF);
2233 error = ENXIO;
2234 goto fail;
2235 }
2236#else
2237 if (!jumbo_vm_init()) {
2238 printf("ti%d: VM initialization failed!\n", sc->ti_unit);
2239 bus_teardown_intr(dev, sc->ti_irq, sc->ti_intrhand);
2240 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->ti_irq);
2241 bus_release_resource(dev, SYS_RES_MEMORY,
2242 TI_PCI_LOMEM, sc->ti_res);
2243 free(sc->ti_rdata, M_DEVBUF);
2244 error = ENOMEM;
2245 goto fail;
2246 }
2247#endif
1591
1592 /*
1593 * We really need a better way to tell a 1000baseTX card
1594 * from a 1000baseSX one, since in theory there could be
1595 * OEMed 1000baseTX cards from lame vendors who aren't
1596 * clever enough to change the PCI ID. For the moment
1597 * though, the AceNIC is the only copper card available.
1598 */
1599 if (pci_get_vendor(dev) == ALT_VENDORID &&
1600 pci_get_device(dev) == ALT_DEVICEID_ACENIC_COPPER)
1601 sc->ti_copper = 1;
1602 /* Ok, it's not the only copper card available. */
1603 if (pci_get_vendor(dev) == NG_VENDORID &&
1604 pci_get_device(dev) == NG_DEVICEID_GA620T)
1605 sc->ti_copper = 1;
1606
1607 /* Set default tuneable values. */
1608 sc->ti_stat_ticks = 2 * TI_TICKS_PER_SEC;
2248
2249 /*
2250 * We really need a better way to tell a 1000baseTX card
2251 * from a 1000baseSX one, since in theory there could be
2252 * OEMed 1000baseTX cards from lame vendors who aren't
2253 * clever enough to change the PCI ID. For the moment
2254 * though, the AceNIC is the only copper card available.
2255 */
2256 if (pci_get_vendor(dev) == ALT_VENDORID &&
2257 pci_get_device(dev) == ALT_DEVICEID_ACENIC_COPPER)
2258 sc->ti_copper = 1;
2259 /* Ok, it's not the only copper card available. */
2260 if (pci_get_vendor(dev) == NG_VENDORID &&
2261 pci_get_device(dev) == NG_DEVICEID_GA620T)
2262 sc->ti_copper = 1;
2263
2264 /* Set default tuneable values. */
2265 sc->ti_stat_ticks = 2 * TI_TICKS_PER_SEC;
2266#if 0
1609 sc->ti_rx_coal_ticks = TI_TICKS_PER_SEC / 5000;
2267 sc->ti_rx_coal_ticks = TI_TICKS_PER_SEC / 5000;
2268#endif
2269 sc->ti_rx_coal_ticks = 170;
1610 sc->ti_tx_coal_ticks = TI_TICKS_PER_SEC / 500;
1611 sc->ti_rx_max_coal_bds = 64;
2270 sc->ti_tx_coal_ticks = TI_TICKS_PER_SEC / 500;
2271 sc->ti_rx_max_coal_bds = 64;
2272#if 0
1612 sc->ti_tx_max_coal_bds = 128;
2273 sc->ti_tx_max_coal_bds = 128;
2274#endif
2275 sc->ti_tx_max_coal_bds = 32;
1613 sc->ti_tx_buf_ratio = 21;
1614
1615 /* Set up ifnet structure */
1616 ifp = &sc->arpcom.ac_if;
1617 ifp->if_softc = sc;
1618 ifp->if_unit = sc->ti_unit;
1619 ifp->if_name = "ti";
1620 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
2276 sc->ti_tx_buf_ratio = 21;
2277
2278 /* Set up ifnet structure */
2279 ifp = &sc->arpcom.ac_if;
2280 ifp->if_softc = sc;
2281 ifp->if_unit = sc->ti_unit;
2282 ifp->if_name = "ti";
2283 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
2284 tis[unit] = sc;
1621 ifp->if_ioctl = ti_ioctl;
1622 ifp->if_output = ether_output;
1623 ifp->if_start = ti_start;
1624 ifp->if_watchdog = ti_watchdog;
1625 ifp->if_init = ti_init;
1626 ifp->if_mtu = ETHERMTU;
1627 ifp->if_snd.ifq_maxlen = TI_TX_RING_CNT - 1;
1628

--- 22 unchanged lines hidden (view full) ---

1651 ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_1000_SX, 0, NULL);
1652 ifmedia_add(&sc->ifmedia,
1653 IFM_ETHER|IFM_1000_SX|IFM_FDX, 0, NULL);
1654 }
1655 ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_AUTO, 0, NULL);
1656 ifmedia_set(&sc->ifmedia, IFM_ETHER|IFM_AUTO);
1657
1658 /*
2285 ifp->if_ioctl = ti_ioctl;
2286 ifp->if_output = ether_output;
2287 ifp->if_start = ti_start;
2288 ifp->if_watchdog = ti_watchdog;
2289 ifp->if_init = ti_init;
2290 ifp->if_mtu = ETHERMTU;
2291 ifp->if_snd.ifq_maxlen = TI_TX_RING_CNT - 1;
2292

--- 22 unchanged lines hidden (view full) ---

2315 ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_1000_SX, 0, NULL);
2316 ifmedia_add(&sc->ifmedia,
2317 IFM_ETHER|IFM_1000_SX|IFM_FDX, 0, NULL);
2318 }
2319 ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_AUTO, 0, NULL);
2320 ifmedia_set(&sc->ifmedia, IFM_ETHER|IFM_AUTO);
2321
2322 /*
2323 * We're assuming here that card initialization is a sequential
2324 * thing. If it isn't, multiple cards probing at the same time
2325 * could stomp on the list of softcs here.
2326 */
2327 /*
2328 * If this is the first card to be initialized, initialize the
2329 * softc queue.
2330 */
2331 if (unit == 0)
2332 STAILQ_INIT(&ti_sc_list);
2333
2334 STAILQ_INSERT_TAIL(&ti_sc_list, sc, ti_links);
2335
2336 /* Register the device */
2337 sc->dev = make_dev(&ti_cdevsw, sc->ti_unit, UID_ROOT, GID_OPERATOR,
2338 0600, "ti%d", sc->ti_unit);
2339
2340 /*
1659 * Call MI attach routine.
1660 */
1661 ether_ifattach(ifp, ETHER_BPF_SUPPORTED);
2341 * Call MI attach routine.
2342 */
2343 ether_ifattach(ifp, ETHER_BPF_SUPPORTED);
1662 TI_UNLOCK(sc);
1663 return(0);
1664
1665fail:
2344 return(0);
2345
2346fail:
1666 TI_UNLOCK(sc);
1667 mtx_destroy(&sc->ti_mtx);
1668 return(error);
1669}
1670
2347 mtx_destroy(&sc->ti_mtx);
2348 return(error);
2349}
2350
2351/*
2352 * Verify that our character special device is not currently
2353 * open. Also track down any cached vnodes & kill them before
2354 * the module is unloaded
2355 */
2356static int
2357ti_unref_special(device_t dev)
2358{
2359 struct vnode *ti_vn;
2360 int count;
2361 struct ti_softc *sc = sc = device_get_softc(dev);
2362
2363 if (!vfinddev(sc->dev, VCHR, &ti_vn)) {
2364 return 0;
2365 }
2366
2367 if ((count = vcount(ti_vn))) {
2368 device_printf(dev, "%d refs to special device, "
2369 "denying unload\n", count);
2370 return count;
2371 }
2372 /* now we know that there's a vnode in the cache. We hunt it
2373 down and kill it now, before unloading */
2374 vgone(ti_vn);
2375 return(0);
2376}
2377
2378
1671static int ti_detach(dev)
1672 device_t dev;
1673{
1674 struct ti_softc *sc;
1675 struct ifnet *ifp;
1676
2379static int ti_detach(dev)
2380 device_t dev;
2381{
2382 struct ti_softc *sc;
2383 struct ifnet *ifp;
2384
2385 if (ti_unref_special(dev))
2386 return EBUSY;
1677
1678 sc = device_get_softc(dev);
1679 TI_LOCK(sc);
1680 ifp = &sc->arpcom.ac_if;
1681
1682 ether_ifdetach(ifp, ETHER_BPF_SUPPORTED);
1683 ti_stop(sc);
1684
1685 bus_teardown_intr(dev, sc->ti_irq, sc->ti_intrhand);
1686 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->ti_irq);
1687 bus_release_resource(dev, SYS_RES_MEMORY, TI_PCI_LOMEM, sc->ti_res);
1688
2387
2388 sc = device_get_softc(dev);
2389 TI_LOCK(sc);
2390 ifp = &sc->arpcom.ac_if;
2391
2392 ether_ifdetach(ifp, ETHER_BPF_SUPPORTED);
2393 ti_stop(sc);
2394
2395 bus_teardown_intr(dev, sc->ti_irq, sc->ti_intrhand);
2396 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->ti_irq);
2397 bus_release_resource(dev, SYS_RES_MEMORY, TI_PCI_LOMEM, sc->ti_res);
2398
2399#ifdef TI_PRIVATE_JUMBOS
1689 contigfree(sc->ti_cdata.ti_jumbo_buf, TI_JMEM, M_DEVBUF);
2400 contigfree(sc->ti_cdata.ti_jumbo_buf, TI_JMEM, M_DEVBUF);
2401#endif
1690 contigfree(sc->ti_rdata, sizeof(struct ti_ring_data), M_DEVBUF);
1691 ifmedia_removeall(&sc->ifmedia);
1692
1693 TI_UNLOCK(sc);
1694 mtx_destroy(&sc->ti_mtx);
1695
1696 return(0);
1697}
1698
2402 contigfree(sc->ti_rdata, sizeof(struct ti_ring_data), M_DEVBUF);
2403 ifmedia_removeall(&sc->ifmedia);
2404
2405 TI_UNLOCK(sc);
2406 mtx_destroy(&sc->ti_mtx);
2407
2408 return(0);
2409}
2410
2411#ifdef TI_JUMBO_HDRSPLIT
1699/*
2412/*
2413 * If hdr_len is 0, that means that header splitting wasn't done on
2414 * this packet for some reason. The two most likely reasons are that
2415 * the protocol isn't a supported protocol for splitting, or this
2416 * packet had a fragment offset that wasn't 0.
2417 *
2418 * The header length, if it is non-zero, will always be the length of
2419 * the headers on the packet, but that length could be longer than the
2420 * first mbuf. So we take the minimum of the two as the actual
2421 * length.
2422 */
2423static __inline void
2424ti_hdr_split(struct mbuf *top, int hdr_len, int pkt_len, int idx)
2425{
2426 int i = 0;
2427 int lengths[4] = {0, 0, 0, 0};
2428 struct mbuf *m, *mp;
2429
2430 if (hdr_len != 0)
2431 top->m_len = min(hdr_len, top->m_len);
2432 pkt_len -= top->m_len;
2433 lengths[i++] = top->m_len;
2434
2435 mp = top;
2436 for (m = top->m_next; m && pkt_len; m = m->m_next) {
2437 m->m_len = m->m_ext.ext_size = min(m->m_len, pkt_len);
2438 pkt_len -= m->m_len;
2439 lengths[i++] = m->m_len;
2440 mp = m;
2441 }
2442
2443#if 0
2444 if (hdr_len != 0)
2445 printf("got split packet: ");
2446 else
2447 printf("got non-split packet: ");
2448
2449 printf("%d,%d,%d,%d = %d\n", lengths[0],
2450 lengths[1], lengths[2], lengths[3],
2451 lengths[0] + lengths[1] + lengths[2] +
2452 lengths[3]);
2453#endif
2454
2455 if (pkt_len)
2456 panic("header splitting didn't");
2457
2458 if (m) {
2459 m_freem(m);
2460 mp->m_next = NULL;
2461
2462 }
2463 if (mp->m_next != NULL)
2464 panic("ti_hdr_split: last mbuf in chain should be null");
2465}
2466#endif /* TI_JUMBO_HDRSPLIT */
2467
2468/*
1700 * Frame reception handling. This is called if there's a frame
1701 * on the receive return list.
1702 *
1703 * Note: we have to be able to handle three possibilities here:
1704 * 1) the frame is from the mini receive ring (can only happen)
1705 * on Tigon 2 boards)
1706 * 2) the frame is from the jumbo recieve ring
1707 * 3) the frame is from the standard receive ring

--- 21 unchanged lines hidden (view full) ---

1729 TI_INC(sc->ti_rx_saved_considx, TI_RETURN_RING_CNT);
1730
1731 if (cur_rx->ti_flags & TI_BDFLAG_VLAN_TAG) {
1732 have_tag = 1;
1733 vlan_tag = cur_rx->ti_vlan_tag & 0xfff;
1734 }
1735
1736 if (cur_rx->ti_flags & TI_BDFLAG_JUMBO_RING) {
2469 * Frame reception handling. This is called if there's a frame
2470 * on the receive return list.
2471 *
2472 * Note: we have to be able to handle three possibilities here:
2473 * 1) the frame is from the mini receive ring (can only happen)
2474 * on Tigon 2 boards)
2475 * 2) the frame is from the jumbo recieve ring
2476 * 3) the frame is from the standard receive ring

--- 21 unchanged lines hidden (view full) ---

2498 TI_INC(sc->ti_rx_saved_considx, TI_RETURN_RING_CNT);
2499
2500 if (cur_rx->ti_flags & TI_BDFLAG_VLAN_TAG) {
2501 have_tag = 1;
2502 vlan_tag = cur_rx->ti_vlan_tag & 0xfff;
2503 }
2504
2505 if (cur_rx->ti_flags & TI_BDFLAG_JUMBO_RING) {
2506
1737 TI_INC(sc->ti_jumbo, TI_JUMBO_RX_RING_CNT);
1738 m = sc->ti_cdata.ti_rx_jumbo_chain[rxidx];
1739 sc->ti_cdata.ti_rx_jumbo_chain[rxidx] = NULL;
1740 if (cur_rx->ti_flags & TI_BDFLAG_ERROR) {
1741 ifp->if_ierrors++;
1742 ti_newbuf_jumbo(sc, sc->ti_jumbo, m);
1743 continue;
1744 }
1745 if (ti_newbuf_jumbo(sc, sc->ti_jumbo, NULL) == ENOBUFS) {
1746 ifp->if_ierrors++;
1747 ti_newbuf_jumbo(sc, sc->ti_jumbo, m);
1748 continue;
1749 }
2507 TI_INC(sc->ti_jumbo, TI_JUMBO_RX_RING_CNT);
2508 m = sc->ti_cdata.ti_rx_jumbo_chain[rxidx];
2509 sc->ti_cdata.ti_rx_jumbo_chain[rxidx] = NULL;
2510 if (cur_rx->ti_flags & TI_BDFLAG_ERROR) {
2511 ifp->if_ierrors++;
2512 ti_newbuf_jumbo(sc, sc->ti_jumbo, m);
2513 continue;
2514 }
2515 if (ti_newbuf_jumbo(sc, sc->ti_jumbo, NULL) == ENOBUFS) {
2516 ifp->if_ierrors++;
2517 ti_newbuf_jumbo(sc, sc->ti_jumbo, m);
2518 continue;
2519 }
2520#ifdef TI_PRIVATE_JUMBOS
2521 m->m_len = cur_rx->ti_len;
2522#else /* TI_PRIVATE_JUMBOS */
2523#ifdef TI_JUMBO_HDRSPLIT
2524 if (sc->ti_hdrsplit)
2525 ti_hdr_split(m, TI_HOSTADDR(cur_rx->ti_addr),
2526 cur_rx->ti_len, rxidx);
2527 else
2528#endif /* TI_JUMBO_HDRSPLIT */
2529 m_adj(m, cur_rx->ti_len - m->m_pkthdr.len);
2530#endif /* TI_PRIVATE_JUMBOS */
1750 } else if (cur_rx->ti_flags & TI_BDFLAG_MINI_RING) {
1751 TI_INC(sc->ti_mini, TI_MINI_RX_RING_CNT);
1752 m = sc->ti_cdata.ti_rx_mini_chain[rxidx];
1753 sc->ti_cdata.ti_rx_mini_chain[rxidx] = NULL;
1754 if (cur_rx->ti_flags & TI_BDFLAG_ERROR) {
1755 ifp->if_ierrors++;
1756 ti_newbuf_mini(sc, sc->ti_mini, m);
1757 continue;
1758 }
1759 if (ti_newbuf_mini(sc, sc->ti_mini, NULL) == ENOBUFS) {
1760 ifp->if_ierrors++;
1761 ti_newbuf_mini(sc, sc->ti_mini, m);
1762 continue;
1763 }
2531 } else if (cur_rx->ti_flags & TI_BDFLAG_MINI_RING) {
2532 TI_INC(sc->ti_mini, TI_MINI_RX_RING_CNT);
2533 m = sc->ti_cdata.ti_rx_mini_chain[rxidx];
2534 sc->ti_cdata.ti_rx_mini_chain[rxidx] = NULL;
2535 if (cur_rx->ti_flags & TI_BDFLAG_ERROR) {
2536 ifp->if_ierrors++;
2537 ti_newbuf_mini(sc, sc->ti_mini, m);
2538 continue;
2539 }
2540 if (ti_newbuf_mini(sc, sc->ti_mini, NULL) == ENOBUFS) {
2541 ifp->if_ierrors++;
2542 ti_newbuf_mini(sc, sc->ti_mini, m);
2543 continue;
2544 }
2545 m->m_len = cur_rx->ti_len;
1764 } else {
1765 TI_INC(sc->ti_std, TI_STD_RX_RING_CNT);
1766 m = sc->ti_cdata.ti_rx_std_chain[rxidx];
1767 sc->ti_cdata.ti_rx_std_chain[rxidx] = NULL;
1768 if (cur_rx->ti_flags & TI_BDFLAG_ERROR) {
1769 ifp->if_ierrors++;
1770 ti_newbuf_std(sc, sc->ti_std, m);
1771 continue;
1772 }
1773 if (ti_newbuf_std(sc, sc->ti_std, NULL) == ENOBUFS) {
1774 ifp->if_ierrors++;
1775 ti_newbuf_std(sc, sc->ti_std, m);
1776 continue;
1777 }
2546 } else {
2547 TI_INC(sc->ti_std, TI_STD_RX_RING_CNT);
2548 m = sc->ti_cdata.ti_rx_std_chain[rxidx];
2549 sc->ti_cdata.ti_rx_std_chain[rxidx] = NULL;
2550 if (cur_rx->ti_flags & TI_BDFLAG_ERROR) {
2551 ifp->if_ierrors++;
2552 ti_newbuf_std(sc, sc->ti_std, m);
2553 continue;
2554 }
2555 if (ti_newbuf_std(sc, sc->ti_std, NULL) == ENOBUFS) {
2556 ifp->if_ierrors++;
2557 ti_newbuf_std(sc, sc->ti_std, m);
2558 continue;
2559 }
2560 m->m_len = cur_rx->ti_len;
1778 }
1779
2561 }
2562
1780 m->m_pkthdr.len = m->m_len = cur_rx->ti_len;
2563 m->m_pkthdr.len = cur_rx->ti_len;
1781 ifp->if_ipackets++;
1782 eh = mtod(m, struct ether_header *);
1783 m->m_pkthdr.rcvif = ifp;
1784
1785 /* Remove header from mbuf and pass it on. */
1786 m_adj(m, sizeof(struct ether_header));
1787
1788 if (ifp->if_hwassist) {

--- 82 unchanged lines hidden (view full) ---

1871{
1872 struct ti_softc *sc;
1873 struct ifnet *ifp;
1874
1875 sc = xsc;
1876 TI_LOCK(sc);
1877 ifp = &sc->arpcom.ac_if;
1878
2564 ifp->if_ipackets++;
2565 eh = mtod(m, struct ether_header *);
2566 m->m_pkthdr.rcvif = ifp;
2567
2568 /* Remove header from mbuf and pass it on. */
2569 m_adj(m, sizeof(struct ether_header));
2570
2571 if (ifp->if_hwassist) {

--- 82 unchanged lines hidden (view full) ---

2654{
2655 struct ti_softc *sc;
2656 struct ifnet *ifp;
2657
2658 sc = xsc;
2659 TI_LOCK(sc);
2660 ifp = &sc->arpcom.ac_if;
2661
1879#ifdef notdef
2662/*#ifdef notdef*/
1880 /* Avoid this for now -- checking this register is expensive. */
1881 /* Make sure this is really our interrupt. */
1882 if (!(CSR_READ_4(sc, TI_MISC_HOST_CTL) & TI_MHC_INTSTATE)) {
1883 TI_UNLOCK(sc);
1884 return;
1885 }
2663 /* Avoid this for now -- checking this register is expensive. */
2664 /* Make sure this is really our interrupt. */
2665 if (!(CSR_READ_4(sc, TI_MISC_HOST_CTL) & TI_MHC_INTSTATE)) {
2666 TI_UNLOCK(sc);
2667 return;
2668 }
1886#endif
2669/*#endif*/
1887
1888 /* Ack interrupt and stop others from occuring. */
1889 CSR_WRITE_4(sc, TI_MB_HOSTINTR, 1);
1890
1891 if (ifp->if_flags & IFF_RUNNING) {
1892 /* Check RX return ring producer/consumer */
1893 ti_rxeof(sc);
1894

--- 115 unchanged lines hidden (view full) ---

2010 if (m != NULL)
2011 return(ENOBUFS);
2012
2013 if (frag == sc->ti_tx_saved_considx)
2014 return(ENOBUFS);
2015
2016 if (sc->ti_hwrev == TI_HWREV_TIGON)
2017 sc->ti_rdata->ti_tx_ring_nic[cur % 128].ti_flags |=
2670
2671 /* Ack interrupt and stop others from occuring. */
2672 CSR_WRITE_4(sc, TI_MB_HOSTINTR, 1);
2673
2674 if (ifp->if_flags & IFF_RUNNING) {
2675 /* Check RX return ring producer/consumer */
2676 ti_rxeof(sc);
2677

--- 115 unchanged lines hidden (view full) ---

2793 if (m != NULL)
2794 return(ENOBUFS);
2795
2796 if (frag == sc->ti_tx_saved_considx)
2797 return(ENOBUFS);
2798
2799 if (sc->ti_hwrev == TI_HWREV_TIGON)
2800 sc->ti_rdata->ti_tx_ring_nic[cur % 128].ti_flags |=
2018 TI_BDFLAG_END;
2801 TI_BDFLAG_END;
2019 else
2020 sc->ti_rdata->ti_tx_ring[cur].ti_flags |= TI_BDFLAG_END;
2021 sc->ti_cdata.ti_tx_chain[cur] = m_head;
2022 sc->ti_txcnt += cnt;
2023
2024 *txidx = frag;
2025
2026 return(0);

--- 179 unchanged lines hidden (view full) ---

2206 * Set media options.
2207 */
2208static int ti_ifmedia_upd(ifp)
2209 struct ifnet *ifp;
2210{
2211 struct ti_softc *sc;
2212 struct ifmedia *ifm;
2213 struct ti_cmd_desc cmd;
2802 else
2803 sc->ti_rdata->ti_tx_ring[cur].ti_flags |= TI_BDFLAG_END;
2804 sc->ti_cdata.ti_tx_chain[cur] = m_head;
2805 sc->ti_txcnt += cnt;
2806
2807 *txidx = frag;
2808
2809 return(0);

--- 179 unchanged lines hidden (view full) ---

2989 * Set media options.
2990 */
2991static int ti_ifmedia_upd(ifp)
2992 struct ifnet *ifp;
2993{
2994 struct ti_softc *sc;
2995 struct ifmedia *ifm;
2996 struct ti_cmd_desc cmd;
2997 u_int32_t flowctl;
2214
2215 sc = ifp->if_softc;
2216 ifm = &sc->ifmedia;
2217
2218 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
2219 return(EINVAL);
2220
2998
2999 sc = ifp->if_softc;
3000 ifm = &sc->ifmedia;
3001
3002 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
3003 return(EINVAL);
3004
3005 flowctl = 0;
3006
2221 switch(IFM_SUBTYPE(ifm->ifm_media)) {
2222 case IFM_AUTO:
3007 switch(IFM_SUBTYPE(ifm->ifm_media)) {
3008 case IFM_AUTO:
3009 /*
3010 * Transmit flow control doesn't work on the Tigon 1.
3011 */
3012 flowctl = TI_GLNK_RX_FLOWCTL_Y;
3013
3014 /*
3015 * Transmit flow control can also cause problems on the
3016 * Tigon 2, apparantly with both the copper and fiber
3017 * boards. The symptom is that the interface will just
3018 * hang. This was reproduced with Alteon 180 switches.
3019 */
3020#if 0
3021 if (sc->ti_hwrev != TI_HWREV_TIGON)
3022 flowctl |= TI_GLNK_TX_FLOWCTL_Y;
3023#endif
3024
2223 CSR_WRITE_4(sc, TI_GCR_GLINK, TI_GLNK_PREF|TI_GLNK_1000MB|
3025 CSR_WRITE_4(sc, TI_GCR_GLINK, TI_GLNK_PREF|TI_GLNK_1000MB|
2224 TI_GLNK_FULL_DUPLEX|TI_GLNK_RX_FLOWCTL_Y|
3026 TI_GLNK_FULL_DUPLEX| flowctl |
2225 TI_GLNK_AUTONEGENB|TI_GLNK_ENB);
3027 TI_GLNK_AUTONEGENB|TI_GLNK_ENB);
3028
3029 flowctl = TI_LNK_RX_FLOWCTL_Y;
3030#if 0
3031 if (sc->ti_hwrev != TI_HWREV_TIGON)
3032 flowctl |= TI_LNK_TX_FLOWCTL_Y;
3033#endif
3034
2226 CSR_WRITE_4(sc, TI_GCR_LINK, TI_LNK_100MB|TI_LNK_10MB|
3035 CSR_WRITE_4(sc, TI_GCR_LINK, TI_LNK_100MB|TI_LNK_10MB|
2227 TI_LNK_FULL_DUPLEX|TI_LNK_HALF_DUPLEX|
3036 TI_LNK_FULL_DUPLEX|TI_LNK_HALF_DUPLEX| flowctl |
2228 TI_LNK_AUTONEGENB|TI_LNK_ENB);
2229 TI_DO_CMD(TI_CMD_LINK_NEGOTIATION,
2230 TI_CMD_CODE_NEGOTIATE_BOTH, 0);
2231 break;
2232 case IFM_1000_SX:
2233 case IFM_1000_T:
3037 TI_LNK_AUTONEGENB|TI_LNK_ENB);
3038 TI_DO_CMD(TI_CMD_LINK_NEGOTIATION,
3039 TI_CMD_CODE_NEGOTIATE_BOTH, 0);
3040 break;
3041 case IFM_1000_SX:
3042 case IFM_1000_T:
3043 flowctl = TI_GLNK_RX_FLOWCTL_Y;
3044#if 0
3045 if (sc->ti_hwrev != TI_HWREV_TIGON)
3046 flowctl |= TI_GLNK_TX_FLOWCTL_Y;
3047#endif
3048
2234 CSR_WRITE_4(sc, TI_GCR_GLINK, TI_GLNK_PREF|TI_GLNK_1000MB|
3049 CSR_WRITE_4(sc, TI_GCR_GLINK, TI_GLNK_PREF|TI_GLNK_1000MB|
2235 TI_GLNK_RX_FLOWCTL_Y|TI_GLNK_ENB);
3050 flowctl |TI_GLNK_ENB);
2236 CSR_WRITE_4(sc, TI_GCR_LINK, 0);
2237 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) {
2238 TI_SETBIT(sc, TI_GCR_GLINK, TI_GLNK_FULL_DUPLEX);
2239 }
2240 TI_DO_CMD(TI_CMD_LINK_NEGOTIATION,
2241 TI_CMD_CODE_NEGOTIATE_GIGABIT, 0);
2242 break;
2243 case IFM_100_FX:
2244 case IFM_10_FL:
2245 case IFM_100_TX:
2246 case IFM_10_T:
3051 CSR_WRITE_4(sc, TI_GCR_LINK, 0);
3052 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) {
3053 TI_SETBIT(sc, TI_GCR_GLINK, TI_GLNK_FULL_DUPLEX);
3054 }
3055 TI_DO_CMD(TI_CMD_LINK_NEGOTIATION,
3056 TI_CMD_CODE_NEGOTIATE_GIGABIT, 0);
3057 break;
3058 case IFM_100_FX:
3059 case IFM_10_FL:
3060 case IFM_100_TX:
3061 case IFM_10_T:
3062 flowctl = TI_LNK_RX_FLOWCTL_Y;
3063#if 0
3064 if (sc->ti_hwrev != TI_HWREV_TIGON)
3065 flowctl |= TI_LNK_TX_FLOWCTL_Y;
3066#endif
3067
2247 CSR_WRITE_4(sc, TI_GCR_GLINK, 0);
3068 CSR_WRITE_4(sc, TI_GCR_GLINK, 0);
2248 CSR_WRITE_4(sc, TI_GCR_LINK, TI_LNK_ENB|TI_LNK_PREF);
3069 CSR_WRITE_4(sc, TI_GCR_LINK, TI_LNK_ENB|TI_LNK_PREF|flowctl);
2249 if (IFM_SUBTYPE(ifm->ifm_media) == IFM_100_FX ||
2250 IFM_SUBTYPE(ifm->ifm_media) == IFM_100_TX) {
2251 TI_SETBIT(sc, TI_GCR_LINK, TI_LNK_100MB);
2252 } else {
2253 TI_SETBIT(sc, TI_GCR_LINK, TI_LNK_10MB);
2254 }
2255 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) {
2256 TI_SETBIT(sc, TI_GCR_LINK, TI_LNK_FULL_DUPLEX);

--- 143 unchanged lines hidden (view full) ---

2400 break;
2401 }
2402
2403 TI_UNLOCK(sc);
2404
2405 return(error);
2406}
2407
3070 if (IFM_SUBTYPE(ifm->ifm_media) == IFM_100_FX ||
3071 IFM_SUBTYPE(ifm->ifm_media) == IFM_100_TX) {
3072 TI_SETBIT(sc, TI_GCR_LINK, TI_LNK_100MB);
3073 } else {
3074 TI_SETBIT(sc, TI_GCR_LINK, TI_LNK_10MB);
3075 }
3076 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) {
3077 TI_SETBIT(sc, TI_GCR_LINK, TI_LNK_FULL_DUPLEX);

--- 143 unchanged lines hidden (view full) ---

3221 break;
3222 }
3223
3224 TI_UNLOCK(sc);
3225
3226 return(error);
3227}
3228
3229static int
3230ti_open(dev_t dev, int flags, int fmt, struct thread *td)
3231{
3232 int unit;
3233 struct ti_softc *sc;
3234
3235 unit = minor(dev) & 0xff;
3236
3237 sc = ti_lookup_softc(unit);
3238
3239 if (sc == NULL)
3240 return(ENODEV);
3241
3242 TI_LOCK(sc);
3243 sc->ti_flags |= TI_FLAG_DEBUGING;
3244 TI_UNLOCK(sc);
3245
3246 return(0);
3247}
3248
3249static int
3250ti_close(dev_t dev, int flag, int fmt, struct thread *td)
3251{
3252 int unit;
3253 struct ti_softc *sc;
3254
3255 unit = minor(dev) & 0xff;
3256
3257 sc = ti_lookup_softc(unit);
3258
3259 if (sc == NULL)
3260 return(ENODEV);
3261
3262 TI_LOCK(sc);
3263 sc->ti_flags &= ~TI_FLAG_DEBUGING;
3264 TI_UNLOCK(sc);
3265
3266 return(0);
3267}
3268
3269/*
3270 * This ioctl routine goes along with the Tigon character device.
3271 */
3272static int
3273ti_ioctl2(dev_t dev, u_long cmd, caddr_t addr, int flag, struct thread *td)
3274{
3275 int unit, error;
3276 struct ti_softc *sc;
3277
3278 unit = minor(dev) & 0xff;
3279
3280 sc = ti_lookup_softc(unit);
3281
3282 if (sc == NULL)
3283 return(ENODEV);
3284
3285 error = 0;
3286
3287 switch(cmd) {
3288 case TIIOCGETSTATS:
3289 {
3290 struct ti_stats *outstats;
3291
3292 outstats = (struct ti_stats *)addr;
3293
3294 bcopy(&sc->ti_rdata->ti_info.ti_stats, outstats,
3295 sizeof(struct ti_stats));
3296 break;
3297 }
3298 case TIIOCGETPARAMS:
3299 {
3300 struct ti_params *params;
3301
3302 params = (struct ti_params *)addr;
3303
3304 params->ti_stat_ticks = sc->ti_stat_ticks;
3305 params->ti_rx_coal_ticks = sc->ti_rx_coal_ticks;
3306 params->ti_tx_coal_ticks = sc->ti_tx_coal_ticks;
3307 params->ti_rx_max_coal_bds = sc->ti_rx_max_coal_bds;
3308 params->ti_tx_max_coal_bds = sc->ti_tx_max_coal_bds;
3309 params->ti_tx_buf_ratio = sc->ti_tx_buf_ratio;
3310 params->param_mask = TI_PARAM_ALL;
3311
3312 error = 0;
3313
3314 break;
3315 }
3316 case TIIOCSETPARAMS:
3317 {
3318 struct ti_params *params;
3319
3320 params = (struct ti_params *)addr;
3321
3322 if (params->param_mask & TI_PARAM_STAT_TICKS) {
3323 sc->ti_stat_ticks = params->ti_stat_ticks;
3324 CSR_WRITE_4(sc, TI_GCR_STAT_TICKS, sc->ti_stat_ticks);
3325 }
3326
3327 if (params->param_mask & TI_PARAM_RX_COAL_TICKS) {
3328 sc->ti_rx_coal_ticks = params->ti_rx_coal_ticks;
3329 CSR_WRITE_4(sc, TI_GCR_RX_COAL_TICKS,
3330 sc->ti_rx_coal_ticks);
3331 }
3332
3333 if (params->param_mask & TI_PARAM_TX_COAL_TICKS) {
3334 sc->ti_tx_coal_ticks = params->ti_tx_coal_ticks;
3335 CSR_WRITE_4(sc, TI_GCR_TX_COAL_TICKS,
3336 sc->ti_tx_coal_ticks);
3337 }
3338
3339 if (params->param_mask & TI_PARAM_RX_COAL_BDS) {
3340 sc->ti_rx_max_coal_bds = params->ti_rx_max_coal_bds;
3341 CSR_WRITE_4(sc, TI_GCR_RX_MAX_COAL_BD,
3342 sc->ti_rx_max_coal_bds);
3343 }
3344
3345 if (params->param_mask & TI_PARAM_TX_COAL_BDS) {
3346 sc->ti_tx_max_coal_bds = params->ti_tx_max_coal_bds;
3347 CSR_WRITE_4(sc, TI_GCR_TX_MAX_COAL_BD,
3348 sc->ti_tx_max_coal_bds);
3349 }
3350
3351 if (params->param_mask & TI_PARAM_TX_BUF_RATIO) {
3352 sc->ti_tx_buf_ratio = params->ti_tx_buf_ratio;
3353 CSR_WRITE_4(sc, TI_GCR_TX_BUFFER_RATIO,
3354 sc->ti_tx_buf_ratio);
3355 }
3356
3357 error = 0;
3358
3359 break;
3360 }
3361 case TIIOCSETTRACE: {
3362 ti_trace_type trace_type;
3363
3364 trace_type = *(ti_trace_type *)addr;
3365
3366 /*
3367 * Set tracing to whatever the user asked for. Setting
3368 * this register to 0 should have the effect of disabling
3369 * tracing.
3370 */
3371 CSR_WRITE_4(sc, TI_GCR_NIC_TRACING, trace_type);
3372
3373 error = 0;
3374
3375 break;
3376 }
3377 case TIIOCGETTRACE: {
3378 struct ti_trace_buf *trace_buf;
3379 u_int32_t trace_start, cur_trace_ptr, trace_len;
3380
3381 trace_buf = (struct ti_trace_buf *)addr;
3382
3383 trace_start = CSR_READ_4(sc, TI_GCR_NICTRACE_START);
3384 cur_trace_ptr = CSR_READ_4(sc, TI_GCR_NICTRACE_PTR);
3385 trace_len = CSR_READ_4(sc, TI_GCR_NICTRACE_LEN);
3386
3387#if 0
3388 printf("ti%d: trace_start = %#x, cur_trace_ptr = %#x, "
3389 "trace_len = %d\n", sc->ti_unit, trace_start,
3390 cur_trace_ptr, trace_len);
3391 printf("ti%d: trace_buf->buf_len = %d\n", sc->ti_unit,
3392 trace_buf->buf_len);
3393#endif
3394
3395 error = ti_copy_mem(sc, trace_start, min(trace_len,
3396 trace_buf->buf_len),
3397 (caddr_t)trace_buf->buf, 1, 1);
3398
3399 if (error == 0) {
3400 trace_buf->fill_len = min(trace_len,
3401 trace_buf->buf_len);
3402 if (cur_trace_ptr < trace_start)
3403 trace_buf->cur_trace_ptr =
3404 trace_start - cur_trace_ptr;
3405 else
3406 trace_buf->cur_trace_ptr =
3407 cur_trace_ptr - trace_start;
3408 } else
3409 trace_buf->fill_len = 0;
3410
3411
3412 break;
3413 }
3414
3415 /*
3416 * For debugging, five ioctls are needed:
3417 * ALT_ATTACH
3418 * ALT_READ_TG_REG
3419 * ALT_WRITE_TG_REG
3420 * ALT_READ_TG_MEM
3421 * ALT_WRITE_TG_MEM
3422 */
3423 case ALT_ATTACH:
3424 /*
3425 * From what I can tell, Alteon's Solaris Tigon driver
3426 * only has one character device, so you have to attach
3427 * to the Tigon board you're interested in. This seems
3428 * like a not-so-good way to do things, since unless you
3429 * subsequently specify the unit number of the device
3430 * you're interested in in every ioctl, you'll only be
3431 * able to debug one board at a time.
3432 */
3433 error = 0;
3434 break;
3435 case ALT_READ_TG_MEM:
3436 case ALT_WRITE_TG_MEM:
3437 {
3438 struct tg_mem *mem_param;
3439 u_int32_t sram_end, scratch_end;
3440
3441 mem_param = (struct tg_mem *)addr;
3442
3443 if (sc->ti_hwrev == TI_HWREV_TIGON) {
3444 sram_end = TI_END_SRAM_I;
3445 scratch_end = TI_END_SCRATCH_I;
3446 } else {
3447 sram_end = TI_END_SRAM_II;
3448 scratch_end = TI_END_SCRATCH_II;
3449 }
3450
3451 /*
3452 * For now, we'll only handle accessing regular SRAM,
3453 * nothing else.
3454 */
3455 if ((mem_param->tgAddr >= TI_BEG_SRAM)
3456 && ((mem_param->tgAddr + mem_param->len) <= sram_end)) {
3457 /*
3458 * In this instance, we always copy to/from user
3459 * space, so the user space argument is set to 1.
3460 */
3461 error = ti_copy_mem(sc, mem_param->tgAddr,
3462 mem_param->len,
3463 mem_param->userAddr, 1,
3464 (cmd == ALT_READ_TG_MEM) ? 1 : 0);
3465 } else if ((mem_param->tgAddr >= TI_BEG_SCRATCH)
3466 && (mem_param->tgAddr <= scratch_end)) {
3467 error = ti_copy_scratch(sc, mem_param->tgAddr,
3468 mem_param->len,
3469 mem_param->userAddr, 1,
3470 (cmd == ALT_READ_TG_MEM) ?
3471 1 : 0, TI_PROCESSOR_A);
3472 } else if ((mem_param->tgAddr >= TI_BEG_SCRATCH_B_DEBUG)
3473 && (mem_param->tgAddr <= TI_BEG_SCRATCH_B_DEBUG)) {
3474 if (sc->ti_hwrev == TI_HWREV_TIGON) {
3475 printf("ti%d: invalid memory range for "
3476 "Tigon I\n", sc->ti_unit);
3477 error = EINVAL;
3478 break;
3479 }
3480 error = ti_copy_scratch(sc, mem_param->tgAddr -
3481 TI_SCRATCH_DEBUG_OFF,
3482 mem_param->len,
3483 mem_param->userAddr, 1,
3484 (cmd == ALT_READ_TG_MEM) ?
3485 1 : 0, TI_PROCESSOR_B);
3486 } else {
3487 printf("ti%d: memory address %#x len %d is out of "
3488 "supported range\n", sc->ti_unit,
3489 mem_param->tgAddr, mem_param->len);
3490 error = EINVAL;
3491 }
3492
3493 break;
3494 }
3495 case ALT_READ_TG_REG:
3496 case ALT_WRITE_TG_REG:
3497 {
3498 struct tg_reg *regs;
3499 u_int32_t tmpval;
3500
3501 regs = (struct tg_reg *)addr;
3502
3503 /*
3504 * Make sure the address in question isn't out of range.
3505 */
3506 if (regs->addr > TI_REG_MAX) {
3507 error = EINVAL;
3508 break;
3509 }
3510 if (cmd == ALT_READ_TG_REG) {
3511 bus_space_read_region_4(sc->ti_btag, sc->ti_bhandle,
3512 regs->addr, &tmpval, 1);
3513 regs->data = ntohl(tmpval);
3514#if 0
3515 if ((regs->addr == TI_CPU_STATE)
3516 || (regs->addr == TI_CPU_CTL_B)) {
3517 printf("ti%d: register %#x = %#x\n",
3518 sc->ti_unit, regs->addr, tmpval);
3519 }
3520#endif
3521 } else {
3522 tmpval = htonl(regs->data);
3523 bus_space_write_region_4(sc->ti_btag, sc->ti_bhandle,
3524 regs->addr, &tmpval, 1);
3525 }
3526
3527 break;
3528 }
3529 default:
3530 error = ENOTTY;
3531 break;
3532 }
3533 return(error);
3534}
3535
2408static void ti_watchdog(ifp)
2409 struct ifnet *ifp;
2410{
2411 struct ti_softc *sc;
2412
2413 sc = ifp->if_softc;
2414 TI_LOCK(sc);
2415
3536static void ti_watchdog(ifp)
3537 struct ifnet *ifp;
3538{
3539 struct ti_softc *sc;
3540
3541 sc = ifp->if_softc;
3542 TI_LOCK(sc);
3543
3544 /*
3545 * When we're debugging, the chip is often stopped for long periods
3546 * of time, and that would normally cause the watchdog timer to fire.
3547 * Since that impedes debugging, we don't want to do that.
3548 */
3549 if (sc->ti_flags & TI_FLAG_DEBUGING) {
3550 TI_UNLOCK(sc);
3551 return;
3552 }
3553
2416 printf("ti%d: watchdog timeout -- resetting\n", sc->ti_unit);
2417 ti_stop(sc);
2418 ti_init(sc);
2419
2420 ifp->if_oerrors++;
2421 TI_UNLOCK(sc);
2422
2423 return;

--- 67 unchanged lines hidden --- 		3554 printf("ti%d: watchdog timeout -- resetting\n", sc->ti_unit);
3555 ti_stop(sc);
3556 ti_init(sc);
3557
3558 ifp->if_oerrors++;
3559 TI_UNLOCK(sc);
3560
3561 return;

--- 67 unchanged lines hidden ---