Deleted Added
sdiff udiff text old ( 56206 ) new ( 58698 )
full compact
if_ti.c (56206) if_ti.c (58698)
1/*
2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 15 unchanged lines hidden (view full) ---

24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
1/*
2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 15 unchanged lines hidden (view full) ---

24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * $FreeBSD: head/sys/dev/ti/if_ti.c 56206 2000-01-18 00:26:29Z wpaul $
32 * $FreeBSD: head/sys/dev/ti/if_ti.c 58698 2000-03-27 19:14:27Z jlemon $
33 */
34
35/*
36 * Alteon Networks Tigon PCI gigabit ethernet driver for FreeBSD.
37 * Manuals, sample driver and firmware source kits are available
38 * from http://www.alteon.com/support/openkits.
39 *
40 * Written by Bill Paul <wpaul@ctr.columbia.edu>

--- 76 unchanged lines hidden (view full) ---

117
118#include <pci/pcireg.h>
119#include <pci/pcivar.h>
120
121#include <pci/if_tireg.h>
122#include <pci/ti_fw.h>
123#include <pci/ti_fw2.h>
124
33 */
34
35/*
36 * Alteon Networks Tigon PCI gigabit ethernet driver for FreeBSD.
37 * Manuals, sample driver and firmware source kits are available
38 * from http://www.alteon.com/support/openkits.
39 *
40 * Written by Bill Paul <wpaul@ctr.columbia.edu>

--- 76 unchanged lines hidden (view full) ---

117
118#include <pci/pcireg.h>
119#include <pci/pcivar.h>
120
121#include <pci/if_tireg.h>
122#include <pci/ti_fw.h>
123#include <pci/ti_fw2.h>
124
125#ifdef M_HWCKSUM
126/*#define TI_CSUM_OFFLOAD*/
127#endif
125#define TI_CSUM_FEATURES (CSUM_IP | CSUM_TCP | CSUM_UDP | CSUM_IP_FRAGS)
128
129#if !defined(lint)
130static const char rcsid[] =
126
127#if !defined(lint)
128static const char rcsid[] =
131 "$FreeBSD: head/sys/dev/ti/if_ti.c 56206 2000-01-18 00:26:29Z wpaul $";
129 "$FreeBSD: head/sys/dev/ti/if_ti.c 58698 2000-03-27 19:14:27Z jlemon $";
132#endif
133
134/*
135 * Various supported device vendors/types and their names.
136 */
137
138static struct ti_type ti_devs[] = {
139 { ALT_VENDORID, ALT_DEVICEID_ACENIC,

--- 647 unchanged lines hidden (view full) ---

787 m_new->m_data = m_new->m_ext.ext_buf;
788 }
789
790 m_adj(m_new, ETHER_ALIGN);
791 sc->ti_cdata.ti_rx_std_chain[i] = m_new;
792 r = &sc->ti_rdata->ti_rx_std_ring[i];
793 TI_HOSTADDR(r->ti_addr) = vtophys(mtod(m_new, caddr_t));
794 r->ti_type = TI_BDTYPE_RECV_BD;
130#endif
131
132/*
133 * Various supported device vendors/types and their names.
134 */
135
136static struct ti_type ti_devs[] = {
137 { ALT_VENDORID, ALT_DEVICEID_ACENIC,

--- 647 unchanged lines hidden (view full) ---

785 m_new->m_data = m_new->m_ext.ext_buf;
786 }
787
788 m_adj(m_new, ETHER_ALIGN);
789 sc->ti_cdata.ti_rx_std_chain[i] = m_new;
790 r = &sc->ti_rdata->ti_rx_std_ring[i];
791 TI_HOSTADDR(r->ti_addr) = vtophys(mtod(m_new, caddr_t));
792 r->ti_type = TI_BDTYPE_RECV_BD;
795#ifdef TI_CSUM_OFFLOAD
796 r->ti_flags = TI_BDFLAG_TCP_UDP_CKSUM|TI_BDFLAG_IP_CKSUM;
797#else
798 r->ti_flags = 0;
793 r->ti_flags = 0;
799#endif
794 if (sc->arpcom.ac_if.if_hwassist)
795 r->ti_flags |= TI_BDFLAG_TCP_UDP_CKSUM | TI_BDFLAG_IP_CKSUM;
800 r->ti_len = m_new->m_len;
801 r->ti_idx = i;
802
803 return(0);
804}
805
806/*
807 * Intialize a mini receive ring descriptor. This only applies to

--- 22 unchanged lines hidden (view full) ---

830 }
831
832 m_adj(m_new, ETHER_ALIGN);
833 r = &sc->ti_rdata->ti_rx_mini_ring[i];
834 sc->ti_cdata.ti_rx_mini_chain[i] = m_new;
835 TI_HOSTADDR(r->ti_addr) = vtophys(mtod(m_new, caddr_t));
836 r->ti_type = TI_BDTYPE_RECV_BD;
837 r->ti_flags = TI_BDFLAG_MINI_RING;
796 r->ti_len = m_new->m_len;
797 r->ti_idx = i;
798
799 return(0);
800}
801
802/*
803 * Intialize a mini receive ring descriptor. This only applies to

--- 22 unchanged lines hidden (view full) ---

826 }
827
828 m_adj(m_new, ETHER_ALIGN);
829 r = &sc->ti_rdata->ti_rx_mini_ring[i];
830 sc->ti_cdata.ti_rx_mini_chain[i] = m_new;
831 TI_HOSTADDR(r->ti_addr) = vtophys(mtod(m_new, caddr_t));
832 r->ti_type = TI_BDTYPE_RECV_BD;
833 r->ti_flags = TI_BDFLAG_MINI_RING;
838#ifdef TI_CSUM_OFFLOAD
839 r->ti_flags |= TI_BDFLAG_TCP_UDP_CKSUM|TI_BDFLAG_IP_CKSUM;
840#endif
834 if (sc->arpcom.ac_if.if_hwassist)
835 r->ti_flags |= TI_BDFLAG_TCP_UDP_CKSUM | TI_BDFLAG_IP_CKSUM;
841 r->ti_len = m_new->m_len;
842 r->ti_idx = i;
843
844 return(0);
845}
846
847/*
848 * Initialize a jumbo receive ring descriptor. This allocates

--- 42 unchanged lines hidden (view full) ---

891
892 m_adj(m_new, ETHER_ALIGN);
893 /* Set up the descriptor. */
894 r = &sc->ti_rdata->ti_rx_jumbo_ring[i];
895 sc->ti_cdata.ti_rx_jumbo_chain[i] = m_new;
896 TI_HOSTADDR(r->ti_addr) = vtophys(mtod(m_new, caddr_t));
897 r->ti_type = TI_BDTYPE_RECV_JUMBO_BD;
898 r->ti_flags = TI_BDFLAG_JUMBO_RING;
836 r->ti_len = m_new->m_len;
837 r->ti_idx = i;
838
839 return(0);
840}
841
842/*
843 * Initialize a jumbo receive ring descriptor. This allocates

--- 42 unchanged lines hidden (view full) ---

886
887 m_adj(m_new, ETHER_ALIGN);
888 /* Set up the descriptor. */
889 r = &sc->ti_rdata->ti_rx_jumbo_ring[i];
890 sc->ti_cdata.ti_rx_jumbo_chain[i] = m_new;
891 TI_HOSTADDR(r->ti_addr) = vtophys(mtod(m_new, caddr_t));
892 r->ti_type = TI_BDTYPE_RECV_JUMBO_BD;
893 r->ti_flags = TI_BDFLAG_JUMBO_RING;
899#ifdef TI_CSUM_OFFLOAD
900 r->ti_flags |= TI_BDFLAG_TCP_UDP_CKSUM|TI_BDFLAG_IP_CKSUM;
901#endif
894 if (sc->arpcom.ac_if.if_hwassist)
895 r->ti_flags |= TI_BDFLAG_TCP_UDP_CKSUM | TI_BDFLAG_IP_CKSUM;
902 r->ti_len = m_new->m_len;
903 r->ti_idx = i;
904
905 return(0);
906}
907
908/*
909 * The standard receive ring has 512 entries in it. At 2K per mbuf cluster,

--- 291 unchanged lines hidden (view full) ---

1201 struct ti_softc *sc;
1202{
1203 u_int32_t cacheline;
1204 u_int32_t pci_writemax = 0;
1205
1206 /* Initialize link to down state. */
1207 sc->ti_linkstat = TI_EV_CODE_LINK_DOWN;
1208
896 r->ti_len = m_new->m_len;
897 r->ti_idx = i;
898
899 return(0);
900}
901
902/*
903 * The standard receive ring has 512 entries in it. At 2K per mbuf cluster,

--- 291 unchanged lines hidden (view full) ---

1195 struct ti_softc *sc;
1196{
1197 u_int32_t cacheline;
1198 u_int32_t pci_writemax = 0;
1199
1200 /* Initialize link to down state. */
1201 sc->ti_linkstat = TI_EV_CODE_LINK_DOWN;
1202
1203 sc->arpcom.ac_if.if_hwassist = TI_CSUM_FEATURES;
1204
1209 /* Set endianness before we access any non-PCI registers. */
1210#if BYTE_ORDER == BIG_ENDIAN
1211 CSR_WRITE_4(sc, TI_MISC_HOST_CTL,
1212 TI_MHC_BIGENDIAN_INIT | (TI_MHC_BIGENDIAN_INIT << 24));
1213#else
1214 CSR_WRITE_4(sc, TI_MISC_HOST_CTL,
1215 TI_MHC_LITTLEENDIAN_INIT | (TI_MHC_LITTLEENDIAN_INIT << 24));
1216#endif

--- 94 unchanged lines hidden (view full) ---

1311 TI_OPMODE_WORDSWAP_BD|TI_OPMODE_DONT_FRAG_JUMBO|
1312 TI_OPMODE_WARN_ENB|TI_OPMODE_FATAL_ENB);
1313#endif
1314
1315 /*
1316 * Only allow 1 DMA channel to be active at a time.
1317 * I don't think this is a good idea, but without it
1318 * the firmware racks up lots of nicDmaReadRingFull
1205 /* Set endianness before we access any non-PCI registers. */
1206#if BYTE_ORDER == BIG_ENDIAN
1207 CSR_WRITE_4(sc, TI_MISC_HOST_CTL,
1208 TI_MHC_BIGENDIAN_INIT | (TI_MHC_BIGENDIAN_INIT << 24));
1209#else
1210 CSR_WRITE_4(sc, TI_MISC_HOST_CTL,
1211 TI_MHC_LITTLEENDIAN_INIT | (TI_MHC_LITTLEENDIAN_INIT << 24));
1212#endif

--- 94 unchanged lines hidden (view full) ---

1307 TI_OPMODE_WORDSWAP_BD|TI_OPMODE_DONT_FRAG_JUMBO|
1308 TI_OPMODE_WARN_ENB|TI_OPMODE_FATAL_ENB);
1309#endif
1310
1311 /*
1312 * Only allow 1 DMA channel to be active at a time.
1313 * I don't think this is a good idea, but without it
1314 * the firmware racks up lots of nicDmaReadRingFull
1319 * errors.
1315 * errors. This is not compatible with hardware checksums.
1320 */
1316 */
1321#ifndef TI_CSUM_OFFLOAD
1322 TI_SETBIT(sc, TI_GCR_OPMODE, TI_OPMODE_1_DMA_ACTIVE);
1323#endif
1317 if (sc->arpcom.ac_if.if_hwassist == 0)
1318 TI_SETBIT(sc, TI_GCR_OPMODE, TI_OPMODE_1_DMA_ACTIVE);
1324
1325 /* Recommended settings from Tigon manual. */
1326 CSR_WRITE_4(sc, TI_GCR_DMA_WRITECFG, TI_DMA_STATE_THRESH_8W);
1327 CSR_WRITE_4(sc, TI_GCR_DMA_READCFG, TI_DMA_STATE_THRESH_8W);
1328
1329 if (ti_64bitslot_war(sc)) {
1330 printf("ti%d: bios thinks we're in a 64 bit slot, "
1331 "but we aren't", sc->ti_unit);

--- 62 unchanged lines hidden (view full) ---

1394 TI_HOSTADDR(sc->ti_rdata->ti_info.ti_refresh_stats_ptr) =
1395 vtophys(&sc->ti_rdata->ti_info.ti_stats);
1396
1397 /* Set up the standard receive ring. */
1398 rcb = &sc->ti_rdata->ti_info.ti_std_rx_rcb;
1399 TI_HOSTADDR(rcb->ti_hostaddr) = vtophys(&sc->ti_rdata->ti_rx_std_ring);
1400 rcb->ti_max_len = TI_FRAMELEN;
1401 rcb->ti_flags = 0;
1319
1320 /* Recommended settings from Tigon manual. */
1321 CSR_WRITE_4(sc, TI_GCR_DMA_WRITECFG, TI_DMA_STATE_THRESH_8W);
1322 CSR_WRITE_4(sc, TI_GCR_DMA_READCFG, TI_DMA_STATE_THRESH_8W);
1323
1324 if (ti_64bitslot_war(sc)) {
1325 printf("ti%d: bios thinks we're in a 64 bit slot, "
1326 "but we aren't", sc->ti_unit);

--- 62 unchanged lines hidden (view full) ---

1389 TI_HOSTADDR(sc->ti_rdata->ti_info.ti_refresh_stats_ptr) =
1390 vtophys(&sc->ti_rdata->ti_info.ti_stats);
1391
1392 /* Set up the standard receive ring. */
1393 rcb = &sc->ti_rdata->ti_info.ti_std_rx_rcb;
1394 TI_HOSTADDR(rcb->ti_hostaddr) = vtophys(&sc->ti_rdata->ti_rx_std_ring);
1395 rcb->ti_max_len = TI_FRAMELEN;
1396 rcb->ti_flags = 0;
1402#ifdef TI_CSUM_OFFLOAD
1403 rcb->ti_flags |= TI_RCB_FLAG_TCP_UDP_CKSUM|TI_RCB_FLAG_IP_CKSUM;
1404#endif
1397 if (sc->arpcom.ac_if.if_hwassist)
1398 rcb->ti_flags |= TI_RCB_FLAG_TCP_UDP_CKSUM |
1399 TI_RCB_FLAG_IP_CKSUM | TI_RCB_FLAG_NO_PHDR_CKSUM;
1405#if NVLAN > 0
1406 rcb->ti_flags |= TI_RCB_FLAG_VLAN_ASSIST;
1407#endif
1408
1409 /* Set up the jumbo receive ring. */
1410 rcb = &sc->ti_rdata->ti_info.ti_jumbo_rx_rcb;
1411 TI_HOSTADDR(rcb->ti_hostaddr) =
1412 vtophys(&sc->ti_rdata->ti_rx_jumbo_ring);
1413 rcb->ti_max_len = TI_JUMBO_FRAMELEN;
1414 rcb->ti_flags = 0;
1400#if NVLAN > 0
1401 rcb->ti_flags |= TI_RCB_FLAG_VLAN_ASSIST;
1402#endif
1403
1404 /* Set up the jumbo receive ring. */
1405 rcb = &sc->ti_rdata->ti_info.ti_jumbo_rx_rcb;
1406 TI_HOSTADDR(rcb->ti_hostaddr) =
1407 vtophys(&sc->ti_rdata->ti_rx_jumbo_ring);
1408 rcb->ti_max_len = TI_JUMBO_FRAMELEN;
1409 rcb->ti_flags = 0;
1415#ifdef TI_CSUM_OFFLOAD
1416 rcb->ti_flags |= TI_RCB_FLAG_TCP_UDP_CKSUM|TI_RCB_FLAG_IP_CKSUM;
1417#endif
1410 if (sc->arpcom.ac_if.if_hwassist)
1411 rcb->ti_flags |= TI_RCB_FLAG_TCP_UDP_CKSUM |
1412 TI_RCB_FLAG_IP_CKSUM | TI_RCB_FLAG_NO_PHDR_CKSUM;
1418#if NVLAN > 0
1419 rcb->ti_flags |= TI_RCB_FLAG_VLAN_ASSIST;
1420#endif
1421
1422 /*
1423 * Set up the mini ring. Only activated on the
1424 * Tigon 2 but the slot in the config block is
1425 * still there on the Tigon 1.
1426 */
1427 rcb = &sc->ti_rdata->ti_info.ti_mini_rx_rcb;
1428 TI_HOSTADDR(rcb->ti_hostaddr) =
1429 vtophys(&sc->ti_rdata->ti_rx_mini_ring);
1430 rcb->ti_max_len = MHLEN - ETHER_ALIGN;
1431 if (sc->ti_hwrev == TI_HWREV_TIGON)
1432 rcb->ti_flags = TI_RCB_FLAG_RING_DISABLED;
1433 else
1434 rcb->ti_flags = 0;
1413#if NVLAN > 0
1414 rcb->ti_flags |= TI_RCB_FLAG_VLAN_ASSIST;
1415#endif
1416
1417 /*
1418 * Set up the mini ring. Only activated on the
1419 * Tigon 2 but the slot in the config block is
1420 * still there on the Tigon 1.
1421 */
1422 rcb = &sc->ti_rdata->ti_info.ti_mini_rx_rcb;
1423 TI_HOSTADDR(rcb->ti_hostaddr) =
1424 vtophys(&sc->ti_rdata->ti_rx_mini_ring);
1425 rcb->ti_max_len = MHLEN - ETHER_ALIGN;
1426 if (sc->ti_hwrev == TI_HWREV_TIGON)
1427 rcb->ti_flags = TI_RCB_FLAG_RING_DISABLED;
1428 else
1429 rcb->ti_flags = 0;
1435#ifdef TI_CSUM_OFFLOAD
1436 rcb->ti_flags |= TI_RCB_FLAG_TCP_UDP_CKSUM|TI_RCB_FLAG_IP_CKSUM;
1437#endif
1430 if (sc->arpcom.ac_if.if_hwassist)
1431 rcb->ti_flags |= TI_RCB_FLAG_TCP_UDP_CKSUM |
1432 TI_RCB_FLAG_IP_CKSUM | TI_RCB_FLAG_NO_PHDR_CKSUM;
1438#if NVLAN > 0
1439 rcb->ti_flags |= TI_RCB_FLAG_VLAN_ASSIST;
1440#endif
1441
1442 /*
1443 * Set up the receive return ring.
1444 */
1445 rcb = &sc->ti_rdata->ti_info.ti_return_rcb;

--- 23 unchanged lines hidden (view full) ---

1469 rcb = &sc->ti_rdata->ti_info.ti_tx_rcb;
1470 if (sc->ti_hwrev == TI_HWREV_TIGON)
1471 rcb->ti_flags = 0;
1472 else
1473 rcb->ti_flags = TI_RCB_FLAG_HOST_RING;
1474#if NVLAN > 0
1475 rcb->ti_flags |= TI_RCB_FLAG_VLAN_ASSIST;
1476#endif
1433#if NVLAN > 0
1434 rcb->ti_flags |= TI_RCB_FLAG_VLAN_ASSIST;
1435#endif
1436
1437 /*
1438 * Set up the receive return ring.
1439 */
1440 rcb = &sc->ti_rdata->ti_info.ti_return_rcb;

--- 23 unchanged lines hidden (view full) ---

1464 rcb = &sc->ti_rdata->ti_info.ti_tx_rcb;
1465 if (sc->ti_hwrev == TI_HWREV_TIGON)
1466 rcb->ti_flags = 0;
1467 else
1468 rcb->ti_flags = TI_RCB_FLAG_HOST_RING;
1469#if NVLAN > 0
1470 rcb->ti_flags |= TI_RCB_FLAG_VLAN_ASSIST;
1471#endif
1472 if (sc->arpcom.ac_if.if_hwassist)
1473 rcb->ti_flags |= TI_RCB_FLAG_TCP_UDP_CKSUM |
1474 TI_RCB_FLAG_IP_CKSUM | TI_RCB_FLAG_NO_PHDR_CKSUM;
1477 rcb->ti_max_len = TI_TX_RING_CNT;
1478 if (sc->ti_hwrev == TI_HWREV_TIGON)
1479 TI_HOSTADDR(rcb->ti_hostaddr) = TI_TX_RING_BASE;
1480 else
1481 TI_HOSTADDR(rcb->ti_hostaddr) =
1482 vtophys(&sc->ti_rdata->ti_tx_ring);
1483 TI_HOSTADDR(sc->ti_rdata->ti_info.ti_tx_considx_ptr) =
1484 vtophys(&sc->ti_tx_considx);

--- 301 unchanged lines hidden (view full) ---

1786 struct ti_rx_desc *cur_rx;
1787 u_int32_t rxidx;
1788 struct ether_header *eh;
1789 struct mbuf *m = NULL;
1790#if NVLAN > 0
1791 u_int16_t vlan_tag = 0;
1792 int have_tag = 0;
1793#endif
1475 rcb->ti_max_len = TI_TX_RING_CNT;
1476 if (sc->ti_hwrev == TI_HWREV_TIGON)
1477 TI_HOSTADDR(rcb->ti_hostaddr) = TI_TX_RING_BASE;
1478 else
1479 TI_HOSTADDR(rcb->ti_hostaddr) =
1480 vtophys(&sc->ti_rdata->ti_tx_ring);
1481 TI_HOSTADDR(sc->ti_rdata->ti_info.ti_tx_considx_ptr) =
1482 vtophys(&sc->ti_tx_considx);

--- 301 unchanged lines hidden (view full) ---

1784 struct ti_rx_desc *cur_rx;
1785 u_int32_t rxidx;
1786 struct ether_header *eh;
1787 struct mbuf *m = NULL;
1788#if NVLAN > 0
1789 u_int16_t vlan_tag = 0;
1790 int have_tag = 0;
1791#endif
1794#ifdef TI_CSUM_OFFLOAD
1795 struct ip *ip;
1796#endif
1797
1798 cur_rx =
1799 &sc->ti_rdata->ti_rx_return_ring[sc->ti_rx_saved_considx];
1800 rxidx = cur_rx->ti_idx;
1801 TI_INC(sc->ti_rx_saved_considx, TI_RETURN_RING_CNT);
1802
1803#if NVLAN > 0
1804 if (cur_rx->ti_flags & TI_BDFLAG_VLAN_TAG) {

--- 66 unchanged lines hidden (view full) ---

1871 m_freem(m);
1872 continue;
1873 }
1874 }
1875
1876 /* Remove header from mbuf and pass it on. */
1877 m_adj(m, sizeof(struct ether_header));
1878
1792
1793 cur_rx =
1794 &sc->ti_rdata->ti_rx_return_ring[sc->ti_rx_saved_considx];
1795 rxidx = cur_rx->ti_idx;
1796 TI_INC(sc->ti_rx_saved_considx, TI_RETURN_RING_CNT);
1797
1798#if NVLAN > 0
1799 if (cur_rx->ti_flags & TI_BDFLAG_VLAN_TAG) {

--- 66 unchanged lines hidden (view full) ---

1866 m_freem(m);
1867 continue;
1868 }
1869 }
1870
1871 /* Remove header from mbuf and pass it on. */
1872 m_adj(m, sizeof(struct ether_header));
1873
1879#ifdef TI_CSUM_OFFLOAD
1880 ip = mtod(m, struct ip *);
1881 if (!(cur_rx->ti_tcp_udp_cksum ^ 0xFFFF) &&
1882 !(ip->ip_off & htons(IP_MF | IP_OFFMASK | IP_RF)))
1883 m->m_flags |= M_HWCKSUM;
1884#endif
1874 if (ifp->if_hwassist) {
1875 m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED |
1876 CSUM_DATA_VALID;
1877 if ((cur_rx->ti_ip_cksum ^ 0xffff) == 0)
1878 m->m_pkthdr.csum_flags |= CSUM_IP_VALID;
1879 m->m_pkthdr.csum_data = cur_rx->ti_tcp_udp_cksum;
1880 }
1885
1886#if NVLAN > 0
1887 /*
1888 * If we received a packet with a vlan tag, pass it
1889 * to vlan_input() instead of ether_input().
1890 */
1891 if (have_tag) {
1892 vlan_input_tag(eh, m, vlan_tag);

--- 127 unchanged lines hidden (view full) ---

2020static int ti_encap(sc, m_head, txidx)
2021 struct ti_softc *sc;
2022 struct mbuf *m_head;
2023 u_int32_t *txidx;
2024{
2025 struct ti_tx_desc *f = NULL;
2026 struct mbuf *m;
2027 u_int32_t frag, cur, cnt = 0;
1881
1882#if NVLAN > 0
1883 /*
1884 * If we received a packet with a vlan tag, pass it
1885 * to vlan_input() instead of ether_input().
1886 */
1887 if (have_tag) {
1888 vlan_input_tag(eh, m, vlan_tag);

--- 127 unchanged lines hidden (view full) ---

2016static int ti_encap(sc, m_head, txidx)
2017 struct ti_softc *sc;
2018 struct mbuf *m_head;
2019 u_int32_t *txidx;
2020{
2021 struct ti_tx_desc *f = NULL;
2022 struct mbuf *m;
2023 u_int32_t frag, cur, cnt = 0;
2024 u_int16_t csum_flags = 0;
2028#if NVLAN > 0
2029 struct ifvlan *ifv = NULL;
2030
2031 if ((m_head->m_flags & (M_PROTO1|M_PKTHDR)) == (M_PROTO1|M_PKTHDR) &&
2032 m_head->m_pkthdr.rcvif != NULL &&
2033 m_head->m_pkthdr.rcvif->if_type == IFT_8021_VLAN)
2034 ifv = m_head->m_pkthdr.rcvif->if_softc;
2035#endif
2036
2037 m = m_head;
2038 cur = frag = *txidx;
2039
2025#if NVLAN > 0
2026 struct ifvlan *ifv = NULL;
2027
2028 if ((m_head->m_flags & (M_PROTO1|M_PKTHDR)) == (M_PROTO1|M_PKTHDR) &&
2029 m_head->m_pkthdr.rcvif != NULL &&
2030 m_head->m_pkthdr.rcvif->if_type == IFT_8021_VLAN)
2031 ifv = m_head->m_pkthdr.rcvif->if_softc;
2032#endif
2033
2034 m = m_head;
2035 cur = frag = *txidx;
2036
2037 if (m_head->m_pkthdr.csum_flags) {
2038 if (m_head->m_pkthdr.csum_flags & CSUM_IP)
2039 csum_flags |= TI_BDFLAG_IP_CKSUM;
2040 if (m_head->m_pkthdr.csum_flags & (CSUM_TCP | CSUM_UDP))
2041 csum_flags |= TI_BDFLAG_TCP_UDP_CKSUM;
2042 if (m_head->m_flags & M_LASTFRAG)
2043 csum_flags |= TI_BDFLAG_IP_FRAG_END;
2044 else if (m_head->m_flags & M_FRAG)
2045 csum_flags |= TI_BDFLAG_IP_FRAG;
2046 }
2040 /*
2041 * Start packing the mbufs in this chain into
2042 * the fragment pointers. Stop when we run out
2043 * of fragments or hit the end of the mbuf chain.
2044 */
2045 for (m = m_head; m != NULL; m = m->m_next) {
2046 if (m->m_len != 0) {
2047 if (sc->ti_hwrev == TI_HWREV_TIGON) {

--- 11 unchanged lines hidden (view full) ---

2059 TI_TX_RING_BASE);
2060 f = &sc->ti_rdata->ti_tx_ring_nic[frag % 128];
2061 } else
2062 f = &sc->ti_rdata->ti_tx_ring[frag];
2063 if (sc->ti_cdata.ti_tx_chain[frag] != NULL)
2064 break;
2065 TI_HOSTADDR(f->ti_addr) = vtophys(mtod(m, vm_offset_t));
2066 f->ti_len = m->m_len;
2047 /*
2048 * Start packing the mbufs in this chain into
2049 * the fragment pointers. Stop when we run out
2050 * of fragments or hit the end of the mbuf chain.
2051 */
2052 for (m = m_head; m != NULL; m = m->m_next) {
2053 if (m->m_len != 0) {
2054 if (sc->ti_hwrev == TI_HWREV_TIGON) {

--- 11 unchanged lines hidden (view full) ---

2066 TI_TX_RING_BASE);
2067 f = &sc->ti_rdata->ti_tx_ring_nic[frag % 128];
2068 } else
2069 f = &sc->ti_rdata->ti_tx_ring[frag];
2070 if (sc->ti_cdata.ti_tx_chain[frag] != NULL)
2071 break;
2072 TI_HOSTADDR(f->ti_addr) = vtophys(mtod(m, vm_offset_t));
2073 f->ti_len = m->m_len;
2067 f->ti_flags = 0;
2074 f->ti_flags = csum_flags;
2068#if NVLAN > 0
2069 if (ifv != NULL) {
2070 f->ti_flags |= TI_BDFLAG_VLAN_TAG;
2071 f->ti_vlan_tag = ifv->ifv_tag;
2072 } else {
2073 f->ti_vlan_tag = 0;
2074 }
2075#endif

--- 44 unchanged lines hidden (view full) ---

2120 prodidx = CSR_READ_4(sc, TI_MB_SENDPROD_IDX);
2121
2122 while(sc->ti_cdata.ti_tx_chain[prodidx] == NULL) {
2123 IF_DEQUEUE(&ifp->if_snd, m_head);
2124 if (m_head == NULL)
2125 break;
2126
2127 /*
2075#if NVLAN > 0
2076 if (ifv != NULL) {
2077 f->ti_flags |= TI_BDFLAG_VLAN_TAG;
2078 f->ti_vlan_tag = ifv->ifv_tag;
2079 } else {
2080 f->ti_vlan_tag = 0;
2081 }
2082#endif

--- 44 unchanged lines hidden (view full) ---

2127 prodidx = CSR_READ_4(sc, TI_MB_SENDPROD_IDX);
2128
2129 while(sc->ti_cdata.ti_tx_chain[prodidx] == NULL) {
2130 IF_DEQUEUE(&ifp->if_snd, m_head);
2131 if (m_head == NULL)
2132 break;
2133
2134 /*
2135 * XXX
2136 * safety overkill. If this is a fragmented packet chain
2137 * with delayed TCP/UDP checksums, then only encapsulate
2138 * it if we have enough descriptors to handle the entire
2139 * chain at once.
2140 * (paranoia -- may not actually be needed)
2141 */
2142 if (m_head->m_flags & M_FIRSTFRAG &&
2143 m_head->m_pkthdr.csum_flags & (CSUM_DELAY_DATA)) {
2144 if ((TI_TX_RING_CNT - sc->ti_txcnt) <
2145 m_head->m_pkthdr.csum_data + 16) {
2146 IF_PREPEND(&ifp->if_snd, m_head);
2147 ifp->if_flags |= IFF_OACTIVE;
2148 break;
2149 }
2150 }
2151
2152 /*
2128 * Pack the data into the transmit ring. If we
2129 * don't have room, set the OACTIVE flag and wait
2130 * for the NIC to drain the ring.
2131 */
2132 if (ti_encap(sc, m_head, &prodidx)) {
2133 IF_PREPEND(&ifp->if_snd, m_head);
2134 ifp->if_flags |= IFF_OACTIVE;
2135 break;

--- 375 unchanged lines hidden --- 		2153 * Pack the data into the transmit ring. If we
2154 * don't have room, set the OACTIVE flag and wait
2155 * for the NIC to drain the ring.
2156 */
2157 if (ti_encap(sc, m_head, &prodidx)) {
2158 IF_PREPEND(&ifp->if_snd, m_head);
2159 ifp->if_flags |= IFF_OACTIVE;
2160 break;

--- 375 unchanged lines hidden ---