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if_ti.c (150213) if_ti.c (150719)
1/*-
2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 63 unchanged lines hidden (view full) ---

72 * - Raymond Lee of Netgear, for providing a pair of Netgear
73 * GA620 Tigon 2 boards for testing
74 * - Ulf Zimmermann, for bringing the GA260 to my attention and
75 * convincing me to write this driver.
76 * - Andrew Gallatin for providing FreeBSD/Alpha support.
77 */
78
79#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 63 unchanged lines hidden (view full) ---

72 * - Raymond Lee of Netgear, for providing a pair of Netgear
73 * GA620 Tigon 2 boards for testing
74 * - Ulf Zimmermann, for bringing the GA260 to my attention and
75 * convincing me to write this driver.
76 * - Andrew Gallatin for providing FreeBSD/Alpha support.
77 */
78
79#include <sys/cdefs.h>
80__FBSDID("$FreeBSD: head/sys/dev/ti/if_ti.c 150213 2005-09-16 11:11:51Z ru $");
80__FBSDID("$FreeBSD: head/sys/dev/ti/if_ti.c 150719 2005-09-29 16:47:08Z jhb $");
81
82#include "opt_ti.h"
83
84#include <sys/param.h>
85#include <sys/systm.h>
86#include <sys/sockio.h>
87#include <sys/mbuf.h>
88#include <sys/malloc.h>

--- 247 unchanged lines hidden (view full) ---

336 u_int8_t byte = 0;
337
338 EEPROM_START;
339
340 /*
341 * Send write control code to EEPROM.
342 */
343 if (ti_eeprom_putbyte(sc, EEPROM_CTL_WRITE)) {
81
82#include "opt_ti.h"
83
84#include <sys/param.h>
85#include <sys/systm.h>
86#include <sys/sockio.h>
87#include <sys/mbuf.h>
88#include <sys/malloc.h>

--- 247 unchanged lines hidden (view full) ---

336 u_int8_t byte = 0;
337
338 EEPROM_START;
339
340 /*
341 * Send write control code to EEPROM.
342 */
343 if (ti_eeprom_putbyte(sc, EEPROM_CTL_WRITE)) {
344 printf("ti%d: failed to send write command, status: %x\n",
345 sc->ti_unit, CSR_READ_4(sc, TI_MISC_LOCAL_CTL));
344 if_printf(sc->ti_ifp,
345 "failed to send write command, status: %x\n",
346 CSR_READ_4(sc, TI_MISC_LOCAL_CTL));
346 return (1);
347 }
348
349 /*
350 * Send first byte of address of byte we want to read.
351 */
352 if (ti_eeprom_putbyte(sc, (addr >> 8) & 0xFF)) {
347 return (1);
348 }
349
350 /*
351 * Send first byte of address of byte we want to read.
352 */
353 if (ti_eeprom_putbyte(sc, (addr >> 8) & 0xFF)) {
353 printf("ti%d: failed to send address, status: %x\n",
354 sc->ti_unit, CSR_READ_4(sc, TI_MISC_LOCAL_CTL));
354 if_printf(sc->ti_ifp, "failed to send address, status: %x\n",
355 CSR_READ_4(sc, TI_MISC_LOCAL_CTL));
355 return (1);
356 }
357 /*
358 * Send second byte address of byte we want to read.
359 */
360 if (ti_eeprom_putbyte(sc, addr & 0xFF)) {
356 return (1);
357 }
358 /*
359 * Send second byte address of byte we want to read.
360 */
361 if (ti_eeprom_putbyte(sc, addr & 0xFF)) {
361 printf("ti%d: failed to send address, status: %x\n",
362 sc->ti_unit, CSR_READ_4(sc, TI_MISC_LOCAL_CTL));
362 if_printf(sc->ti_ifp, "failed to send address, status: %x\n",
363 CSR_READ_4(sc, TI_MISC_LOCAL_CTL));
363 return (1);
364 }
365
366 EEPROM_STOP;
367 EEPROM_START;
368 /*
369 * Send read control code to EEPROM.
370 */
371 if (ti_eeprom_putbyte(sc, EEPROM_CTL_READ)) {
364 return (1);
365 }
366
367 EEPROM_STOP;
368 EEPROM_START;
369 /*
370 * Send read control code to EEPROM.
371 */
372 if (ti_eeprom_putbyte(sc, EEPROM_CTL_READ)) {
372 printf("ti%d: failed to send read command, status: %x\n",
373 sc->ti_unit, CSR_READ_4(sc, TI_MISC_LOCAL_CTL));
373 if_printf(sc->ti_ifp,
374 "failed to send read command, status: %x\n",
375 CSR_READ_4(sc, TI_MISC_LOCAL_CTL));
374 return (1);
375 }
376
377 /*
378 * Start reading bits from EEPROM.
379 */
380 TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN);
381 for (i = 0x80; i; i >>= 1) {

--- 91 unchanged lines hidden (view full) ---

473 int first_pass;
474
475 /*
476 * At the moment, we don't handle non-aligned cases, we just bail.
477 * If this proves to be a problem, it will be fixed.
478 */
479 if ((readdata == 0)
480 && (tigon_addr & 0x3)) {
376 return (1);
377 }
378
379 /*
380 * Start reading bits from EEPROM.
381 */
382 TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN);
383 for (i = 0x80; i; i >>= 1) {

--- 91 unchanged lines hidden (view full) ---

475 int first_pass;
476
477 /*
478 * At the moment, we don't handle non-aligned cases, we just bail.
479 * If this proves to be a problem, it will be fixed.
480 */
481 if ((readdata == 0)
482 && (tigon_addr & 0x3)) {
481 printf("ti%d: ti_copy_mem: tigon address %#x isn't "
482 "word-aligned\n", sc->ti_unit, tigon_addr);
483 printf("ti%d: ti_copy_mem: unaligned writes aren't yet "
484 "supported\n", sc->ti_unit);
483 if_printf(sc->ti_ifp, "ti_copy_mem: tigon address %#x isn't "
484 "word-aligned\n", tigon_addr);
485 if_printf(sc->ti_ifp, "ti_copy_mem: unaligned writes aren't "
486 "yet supported\n");
485 return (EINVAL);
486 }
487
488 segptr = tigon_addr & ~0x3;
489 segresid = tigon_addr - segptr;
490
491 /*
492 * This is the non-aligned amount left over that we'll need to

--- 173 unchanged lines hidden (view full) ---

666 u_int32_t tmpval, tmpval2;
667 caddr_t ptr;
668
669 /*
670 * At the moment, we don't handle non-aligned cases, we just bail.
671 * If this proves to be a problem, it will be fixed.
672 */
673 if (tigon_addr & 0x3) {
487 return (EINVAL);
488 }
489
490 segptr = tigon_addr & ~0x3;
491 segresid = tigon_addr - segptr;
492
493 /*
494 * This is the non-aligned amount left over that we'll need to

--- 173 unchanged lines hidden (view full) ---

668 u_int32_t tmpval, tmpval2;
669 caddr_t ptr;
670
671 /*
672 * At the moment, we don't handle non-aligned cases, we just bail.
673 * If this proves to be a problem, it will be fixed.
674 */
675 if (tigon_addr & 0x3) {
674 printf("ti%d: ti_copy_scratch: tigon address %#x isn't "
675 "word-aligned\n", sc->ti_unit, tigon_addr);
676 if_printf(sc->ti_ifp, "ti_copy_scratch: tigon address %#x "
677 "isn't word-aligned\n", tigon_addr);
676 return (EINVAL);
677 }
678
679 if (len & 0x3) {
678 return (EINVAL);
679 }
680
681 if (len & 0x3) {
680 printf("ti%d: ti_copy_scratch: transfer length %d isn't "
681 "word-aligned\n", sc->ti_unit, len);
682 if_printf(sc->ti_ifp, "ti_copy_scratch: transfer length %d "
683 "isn't word-aligned\n", len);
682 return (EINVAL);
683 }
684
685 segptr = tigon_addr;
686 cnt = len;
687 ptr = buf;
688
689 TI_LOCK(sc);

--- 26 unchanged lines hidden (view full) ---

716 *
717 * In any case, the underlying data doesn't seem
718 * to be affected, just the value read out.
719 *
720 * KDM, 3/7/2000
721 */
722
723 if (tmpval2 == 0xc0017c)
684 return (EINVAL);
685 }
686
687 segptr = tigon_addr;
688 cnt = len;
689 ptr = buf;
690
691 TI_LOCK(sc);

--- 26 unchanged lines hidden (view full) ---

718 *
719 * In any case, the underlying data doesn't seem
720 * to be affected, just the value read out.
721 *
722 * KDM, 3/7/2000
723 */
724
725 if (tmpval2 == 0xc0017c)
724 printf("ti%d: found 0xc0017c at %#x "
725 "(tmpval2)\n", sc->ti_unit, segptr);
726 if_printf(sc->ti_ifp, "found 0xc0017c at %#x "
727 "(tmpval2)\n", segptr);
726
727 if (tmpval == 0xc0017c)
728
729 if (tmpval == 0xc0017c)
728 printf("ti%d: found 0xc0017c at %#x "
729 "(tmpval)\n", sc->ti_unit, segptr);
730 if_printf(sc->ti_ifp, "found 0xc0017c at %#x "
731 "(tmpval)\n", segptr);
730
731 if (useraddr)
732 copyout(&tmpval, ptr, 4);
733 else
734 bcopy(&tmpval, ptr, 4);
735 } else {
736 if (useraddr)
737 copyin(ptr, &tmpval2, 4);

--- 61 unchanged lines hidden (view full) ---

799ti_loadfw(sc)
800 struct ti_softc *sc;
801{
802 switch (sc->ti_hwrev) {
803 case TI_HWREV_TIGON:
804 if (tigonFwReleaseMajor != TI_FIRMWARE_MAJOR ||
805 tigonFwReleaseMinor != TI_FIRMWARE_MINOR ||
806 tigonFwReleaseFix != TI_FIRMWARE_FIX) {
732
733 if (useraddr)
734 copyout(&tmpval, ptr, 4);
735 else
736 bcopy(&tmpval, ptr, 4);
737 } else {
738 if (useraddr)
739 copyin(ptr, &tmpval2, 4);

--- 61 unchanged lines hidden (view full) ---

801ti_loadfw(sc)
802 struct ti_softc *sc;
803{
804 switch (sc->ti_hwrev) {
805 case TI_HWREV_TIGON:
806 if (tigonFwReleaseMajor != TI_FIRMWARE_MAJOR ||
807 tigonFwReleaseMinor != TI_FIRMWARE_MINOR ||
808 tigonFwReleaseFix != TI_FIRMWARE_FIX) {
807 printf("ti%d: firmware revision mismatch; want "
808 "%d.%d.%d, got %d.%d.%d\n", sc->ti_unit,
809 if_printf(sc->ti_ifp, "firmware revision mismatch; "
810 "want %d.%d.%d, got %d.%d.%d\n",
809 TI_FIRMWARE_MAJOR, TI_FIRMWARE_MINOR,
810 TI_FIRMWARE_FIX, tigonFwReleaseMajor,
811 tigonFwReleaseMinor, tigonFwReleaseFix);
812 return;
813 }
814 ti_mem(sc, tigonFwTextAddr, tigonFwTextLen,
815 (caddr_t)tigonFwText);
816 ti_mem(sc, tigonFwDataAddr, tigonFwDataLen,
817 (caddr_t)tigonFwData);
818 ti_mem(sc, tigonFwRodataAddr, tigonFwRodataLen,
819 (caddr_t)tigonFwRodata);
820 ti_mem(sc, tigonFwBssAddr, tigonFwBssLen, NULL);
821 ti_mem(sc, tigonFwSbssAddr, tigonFwSbssLen, NULL);
822 CSR_WRITE_4(sc, TI_CPU_PROGRAM_COUNTER, tigonFwStartAddr);
823 break;
824 case TI_HWREV_TIGON_II:
825 if (tigon2FwReleaseMajor != TI_FIRMWARE_MAJOR ||
826 tigon2FwReleaseMinor != TI_FIRMWARE_MINOR ||
827 tigon2FwReleaseFix != TI_FIRMWARE_FIX) {
811 TI_FIRMWARE_MAJOR, TI_FIRMWARE_MINOR,
812 TI_FIRMWARE_FIX, tigonFwReleaseMajor,
813 tigonFwReleaseMinor, tigonFwReleaseFix);
814 return;
815 }
816 ti_mem(sc, tigonFwTextAddr, tigonFwTextLen,
817 (caddr_t)tigonFwText);
818 ti_mem(sc, tigonFwDataAddr, tigonFwDataLen,
819 (caddr_t)tigonFwData);
820 ti_mem(sc, tigonFwRodataAddr, tigonFwRodataLen,
821 (caddr_t)tigonFwRodata);
822 ti_mem(sc, tigonFwBssAddr, tigonFwBssLen, NULL);
823 ti_mem(sc, tigonFwSbssAddr, tigonFwSbssLen, NULL);
824 CSR_WRITE_4(sc, TI_CPU_PROGRAM_COUNTER, tigonFwStartAddr);
825 break;
826 case TI_HWREV_TIGON_II:
827 if (tigon2FwReleaseMajor != TI_FIRMWARE_MAJOR ||
828 tigon2FwReleaseMinor != TI_FIRMWARE_MINOR ||
829 tigon2FwReleaseFix != TI_FIRMWARE_FIX) {
828 printf("ti%d: firmware revision mismatch; want "
829 "%d.%d.%d, got %d.%d.%d\n", sc->ti_unit,
830 if_printf(sc->ti_ifp, "firmware revision mismatch; "
831 "want %d.%d.%d, got %d.%d.%d\n",
830 TI_FIRMWARE_MAJOR, TI_FIRMWARE_MINOR,
831 TI_FIRMWARE_FIX, tigon2FwReleaseMajor,
832 tigon2FwReleaseMinor, tigon2FwReleaseFix);
833 return;
834 }
835 ti_mem(sc, tigon2FwTextAddr, tigon2FwTextLen,
836 (caddr_t)tigon2FwText);
837 ti_mem(sc, tigon2FwDataAddr, tigon2FwDataLen,
838 (caddr_t)tigon2FwData);
839 ti_mem(sc, tigon2FwRodataAddr, tigon2FwRodataLen,
840 (caddr_t)tigon2FwRodata);
841 ti_mem(sc, tigon2FwBssAddr, tigon2FwBssLen, NULL);
842 ti_mem(sc, tigon2FwSbssAddr, tigon2FwSbssLen, NULL);
843 CSR_WRITE_4(sc, TI_CPU_PROGRAM_COUNTER, tigon2FwStartAddr);
844 break;
845 default:
832 TI_FIRMWARE_MAJOR, TI_FIRMWARE_MINOR,
833 TI_FIRMWARE_FIX, tigon2FwReleaseMajor,
834 tigon2FwReleaseMinor, tigon2FwReleaseFix);
835 return;
836 }
837 ti_mem(sc, tigon2FwTextAddr, tigon2FwTextLen,
838 (caddr_t)tigon2FwText);
839 ti_mem(sc, tigon2FwDataAddr, tigon2FwDataLen,
840 (caddr_t)tigon2FwData);
841 ti_mem(sc, tigon2FwRodataAddr, tigon2FwRodataLen,
842 (caddr_t)tigon2FwRodata);
843 ti_mem(sc, tigon2FwBssAddr, tigon2FwBssLen, NULL);
844 ti_mem(sc, tigon2FwSbssAddr, tigon2FwSbssLen, NULL);
845 CSR_WRITE_4(sc, TI_CPU_PROGRAM_COUNTER, tigon2FwStartAddr);
846 break;
847 default:
846 printf("ti%d: can't load firmware: unknown hardware rev\n",
847 sc->ti_unit);
848 if_printf(sc->ti_ifp,
849 "can't load firmware: unknown hardware rev\n");
848 break;
849 }
850}
851
852/*
853 * Send the NIC a command via the command ring.
854 */
855static void

--- 55 unchanged lines hidden (view full) ---

911 return;
912
913 while (sc->ti_ev_saved_considx != sc->ti_ev_prodidx.ti_idx) {
914 e = &sc->ti_rdata->ti_event_ring[sc->ti_ev_saved_considx];
915 switch (e->ti_event) {
916 case TI_EV_LINKSTAT_CHANGED:
917 sc->ti_linkstat = e->ti_code;
918 if (e->ti_code == TI_EV_CODE_LINK_UP)
850 break;
851 }
852}
853
854/*
855 * Send the NIC a command via the command ring.
856 */
857static void

--- 55 unchanged lines hidden (view full) ---

913 return;
914
915 while (sc->ti_ev_saved_considx != sc->ti_ev_prodidx.ti_idx) {
916 e = &sc->ti_rdata->ti_event_ring[sc->ti_ev_saved_considx];
917 switch (e->ti_event) {
918 case TI_EV_LINKSTAT_CHANGED:
919 sc->ti_linkstat = e->ti_code;
920 if (e->ti_code == TI_EV_CODE_LINK_UP)
919 printf("ti%d: 10/100 link up\n", sc->ti_unit);
921 if_printf(sc->ti_ifp, "10/100 link up\n");
920 else if (e->ti_code == TI_EV_CODE_GIG_LINK_UP)
922 else if (e->ti_code == TI_EV_CODE_GIG_LINK_UP)
921 printf("ti%d: gigabit link up\n", sc->ti_unit);
923 if_printf(sc->ti_ifp, "gigabit link up\n");
922 else if (e->ti_code == TI_EV_CODE_LINK_DOWN)
924 else if (e->ti_code == TI_EV_CODE_LINK_DOWN)
923 printf("ti%d: link down\n", sc->ti_unit);
925 if_printf(sc->ti_ifp, "link down\n");
924 break;
925 case TI_EV_ERROR:
926 if (e->ti_code == TI_EV_CODE_ERR_INVAL_CMD)
926 break;
927 case TI_EV_ERROR:
928 if (e->ti_code == TI_EV_CODE_ERR_INVAL_CMD)
927 printf("ti%d: invalid command\n", sc->ti_unit);
929 if_printf(sc->ti_ifp, "invalid command\n");
928 else if (e->ti_code == TI_EV_CODE_ERR_UNIMP_CMD)
930 else if (e->ti_code == TI_EV_CODE_ERR_UNIMP_CMD)
929 printf("ti%d: unknown command\n", sc->ti_unit);
931 if_printf(sc->ti_ifp, "unknown command\n");
930 else if (e->ti_code == TI_EV_CODE_ERR_BADCFG)
932 else if (e->ti_code == TI_EV_CODE_ERR_BADCFG)
931 printf("ti%d: bad config data\n", sc->ti_unit);
933 if_printf(sc->ti_ifp, "bad config data\n");
932 break;
933 case TI_EV_FIRMWARE_UP:
934 ti_init2(sc);
935 break;
936 case TI_EV_STATS_UPDATED:
937 ti_stats_update(sc);
938 break;
939 case TI_EV_RESET_JUMBO_RING:
940 case TI_EV_MCAST_UPDATED:
941 /* Who cares. */
942 break;
943 default:
934 break;
935 case TI_EV_FIRMWARE_UP:
936 ti_init2(sc);
937 break;
938 case TI_EV_STATS_UPDATED:
939 ti_stats_update(sc);
940 break;
941 case TI_EV_RESET_JUMBO_RING:
942 case TI_EV_MCAST_UPDATED:
943 /* Who cares. */
944 break;
945 default:
944 printf("ti%d: unknown event: %d\n",
945 sc->ti_unit, e->ti_event);
946 if_printf(sc->ti_ifp, "unknown event: %d\n",
947 e->ti_event);
946 break;
947 }
948 /* Advance the consumer index. */
949 TI_INC(sc->ti_ev_saved_considx, TI_EVENT_RING_CNT);
950 CSR_WRITE_4(sc, TI_GCR_EVENTCONS_IDX, sc->ti_ev_saved_considx);
951 }
952}
953

--- 30 unchanged lines hidden (view full) ---

984 register int i;
985 struct ti_jpool_entry *entry;
986
987 /* Grab a big chunk o' storage. */
988 sc->ti_cdata.ti_jumbo_buf = contigmalloc(TI_JMEM, M_DEVBUF,
989 M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0);
990
991 if (sc->ti_cdata.ti_jumbo_buf == NULL) {
948 break;
949 }
950 /* Advance the consumer index. */
951 TI_INC(sc->ti_ev_saved_considx, TI_EVENT_RING_CNT);
952 CSR_WRITE_4(sc, TI_GCR_EVENTCONS_IDX, sc->ti_ev_saved_considx);
953 }
954}
955

--- 30 unchanged lines hidden (view full) ---

986 register int i;
987 struct ti_jpool_entry *entry;
988
989 /* Grab a big chunk o' storage. */
990 sc->ti_cdata.ti_jumbo_buf = contigmalloc(TI_JMEM, M_DEVBUF,
991 M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0);
992
993 if (sc->ti_cdata.ti_jumbo_buf == NULL) {
992 printf("ti%d: no memory for jumbo buffers!\n", sc->ti_unit);
994 if_printf(sc->ti_ifp, "no memory for jumbo buffers!\n");
993 return (ENOBUFS);
994 }
995
996 SLIST_INIT(&sc->ti_jfree_listhead);
997 SLIST_INIT(&sc->ti_jinuse_listhead);
998
999 /*
1000 * Now divide it up into 9K pieces and save the addresses

--- 4 unchanged lines hidden (view full) ---

1005 sc->ti_cdata.ti_jslots[i] = ptr;
1006 ptr += TI_JLEN;
1007 entry = malloc(sizeof(struct ti_jpool_entry),
1008 M_DEVBUF, M_NOWAIT);
1009 if (entry == NULL) {
1010 contigfree(sc->ti_cdata.ti_jumbo_buf, TI_JMEM,
1011 M_DEVBUF);
1012 sc->ti_cdata.ti_jumbo_buf = NULL;
995 return (ENOBUFS);
996 }
997
998 SLIST_INIT(&sc->ti_jfree_listhead);
999 SLIST_INIT(&sc->ti_jinuse_listhead);
1000
1001 /*
1002 * Now divide it up into 9K pieces and save the addresses

--- 4 unchanged lines hidden (view full) ---

1007 sc->ti_cdata.ti_jslots[i] = ptr;
1008 ptr += TI_JLEN;
1009 entry = malloc(sizeof(struct ti_jpool_entry),
1010 M_DEVBUF, M_NOWAIT);
1011 if (entry == NULL) {
1012 contigfree(sc->ti_cdata.ti_jumbo_buf, TI_JMEM,
1013 M_DEVBUF);
1014 sc->ti_cdata.ti_jumbo_buf = NULL;
1013 printf("ti%d: no memory for jumbo "
1014 "buffer queue!\n", sc->ti_unit);
1015 if_printf(sc->ti_ifp, "no memory for jumbo "
1016 "buffer queue!\n");
1015 return (ENOBUFS);
1016 }
1017 entry->slot = i;
1018 SLIST_INSERT_HEAD(&sc->ti_jfree_listhead, entry, jpool_entries);
1019 }
1020
1021 return (0);
1022}

--- 4 unchanged lines hidden (view full) ---

1027static void *ti_jalloc(sc)
1028 struct ti_softc *sc;
1029{
1030 struct ti_jpool_entry *entry;
1031
1032 entry = SLIST_FIRST(&sc->ti_jfree_listhead);
1033
1034 if (entry == NULL) {
1017 return (ENOBUFS);
1018 }
1019 entry->slot = i;
1020 SLIST_INSERT_HEAD(&sc->ti_jfree_listhead, entry, jpool_entries);
1021 }
1022
1023 return (0);
1024}

--- 4 unchanged lines hidden (view full) ---

1029static void *ti_jalloc(sc)
1030 struct ti_softc *sc;
1031{
1032 struct ti_jpool_entry *entry;
1033
1034 entry = SLIST_FIRST(&sc->ti_jfree_listhead);
1035
1036 if (entry == NULL) {
1035 printf("ti%d: no free jumbo buffers\n", sc->ti_unit);
1037 if_printf(sc->ti_ifp, "no free jumbo buffers\n");
1036 return (NULL);
1037 }
1038
1039 SLIST_REMOVE_HEAD(&sc->ti_jfree_listhead, jpool_entries);
1040 SLIST_INSERT_HEAD(&sc->ti_jinuse_listhead, entry, jpool_entries);
1041 return (sc->ti_cdata.ti_jslots[entry->slot]);
1042}
1043

--- 137 unchanged lines hidden (view full) ---

1181 if (m_new == NULL) {
1182 return (ENOBUFS);
1183 }
1184
1185 /* Allocate the jumbo buffer */
1186 buf = ti_jalloc(sc);
1187 if (buf == NULL) {
1188 m_freem(m_new);
1038 return (NULL);
1039 }
1040
1041 SLIST_REMOVE_HEAD(&sc->ti_jfree_listhead, jpool_entries);
1042 SLIST_INSERT_HEAD(&sc->ti_jinuse_listhead, entry, jpool_entries);
1043 return (sc->ti_cdata.ti_jslots[entry->slot]);
1044}
1045

--- 137 unchanged lines hidden (view full) ---

1183 if (m_new == NULL) {
1184 return (ENOBUFS);
1185 }
1186
1187 /* Allocate the jumbo buffer */
1188 buf = ti_jalloc(sc);
1189 if (buf == NULL) {
1190 m_freem(m_new);
1189 printf("ti%d: jumbo allocation failed "
1190 "-- packet dropped!\n", sc->ti_unit);
1191 if_printf(sc->ti_ifp, "jumbo allocation failed "
1192 "-- packet dropped!\n");
1191 return (ENOBUFS);
1192 }
1193
1194 /* Attach the buffer to the mbuf. */
1195 m_new->m_data = (void *) buf;
1196 m_new->m_len = m_new->m_pkthdr.len = TI_JUMBO_FRAMELEN;
1197 MEXTADD(m_new, buf, TI_JUMBO_FRAMELEN, ti_jfree,
1198 (struct ti_softc *)sc, 0, EXT_NET_DRV);

--- 58 unchanged lines hidden (view full) ---

1257 for (i = 0; i <= NPAYLOAD; i++){
1258 m[i] = cur;
1259 cur = cur->m_next;
1260 }
1261 } else {
1262 /* Allocate the mbufs. */
1263 MGETHDR(m_new, M_DONTWAIT, MT_DATA);
1264 if (m_new == NULL) {
1193 return (ENOBUFS);
1194 }
1195
1196 /* Attach the buffer to the mbuf. */
1197 m_new->m_data = (void *) buf;
1198 m_new->m_len = m_new->m_pkthdr.len = TI_JUMBO_FRAMELEN;
1199 MEXTADD(m_new, buf, TI_JUMBO_FRAMELEN, ti_jfree,
1200 (struct ti_softc *)sc, 0, EXT_NET_DRV);

--- 58 unchanged lines hidden (view full) ---

1259 for (i = 0; i <= NPAYLOAD; i++){
1260 m[i] = cur;
1261 cur = cur->m_next;
1262 }
1263 } else {
1264 /* Allocate the mbufs. */
1265 MGETHDR(m_new, M_DONTWAIT, MT_DATA);
1266 if (m_new == NULL) {
1265 printf("ti%d: mbuf allocation failed "
1266 "-- packet dropped!\n", sc->ti_unit);
1267 if_printf(sc->ti_ifp, "mbuf allocation failed "
1268 "-- packet dropped!\n");
1267 goto nobufs;
1268 }
1269 MGET(m[NPAYLOAD], M_DONTWAIT, MT_DATA);
1270 if (m[NPAYLOAD] == NULL) {
1269 goto nobufs;
1270 }
1271 MGET(m[NPAYLOAD], M_DONTWAIT, MT_DATA);
1272 if (m[NPAYLOAD] == NULL) {
1271 printf("ti%d: cluster mbuf allocation failed "
1272 "-- packet dropped!\n", sc->ti_unit);
1273 if_printf(sc->ti_ifp, "cluster mbuf allocation failed "
1274 "-- packet dropped!\n");
1273 goto nobufs;
1274 }
1275 MCLGET(m[NPAYLOAD], M_DONTWAIT);
1276 if ((m[NPAYLOAD]->m_flags & M_EXT) == 0) {
1275 goto nobufs;
1276 }
1277 MCLGET(m[NPAYLOAD], M_DONTWAIT);
1278 if ((m[NPAYLOAD]->m_flags & M_EXT) == 0) {
1277 printf("ti%d: mbuf allocation failed "
1278 "-- packet dropped!\n", sc->ti_unit);
1279 if_printf(sc->ti_ifp, "mbuf allocation failed "
1280 "-- packet dropped!\n");
1279 goto nobufs;
1280 }
1281 m[NPAYLOAD]->m_len = MCLBYTES;
1282
1283 for (i = 0; i < NPAYLOAD; i++){
1284 MGET(m[i], M_DONTWAIT, MT_DATA);
1285 if (m[i] == NULL) {
1281 goto nobufs;
1282 }
1283 m[NPAYLOAD]->m_len = MCLBYTES;
1284
1285 for (i = 0; i < NPAYLOAD; i++){
1286 MGET(m[i], M_DONTWAIT, MT_DATA);
1287 if (m[i] == NULL) {
1286 printf("ti%d: mbuf allocation failed "
1287 "-- packet dropped!\n", sc->ti_unit);
1288 if_printf(sc->ti_ifp, "mbuf allocation failed "
1289 "-- packet dropped!\n");
1288 goto nobufs;
1289 }
1290 frame = vm_page_alloc(NULL, color++,
1291 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ |
1292 VM_ALLOC_WIRED);
1293 if (frame == NULL) {
1290 goto nobufs;
1291 }
1292 frame = vm_page_alloc(NULL, color++,
1293 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ |
1294 VM_ALLOC_WIRED);
1295 if (frame == NULL) {
1294 printf("ti%d: buffer allocation failed "
1295 "-- packet dropped!\n", sc->ti_unit);
1296 if_printf(sc->ti_ifp, "buffer allocation "
1297 "failed -- packet dropped!\n");
1296 printf(" index %d page %d\n", idx, i);
1297 goto nobufs;
1298 }
1299 sf[i] = sf_buf_alloc(frame, SFB_NOWAIT);
1300 if (sf[i] == NULL) {
1301 vm_page_lock_queues();
1302 vm_page_unwire(frame, 0);
1303 vm_page_free(frame);
1304 vm_page_unlock_queues();
1298 printf(" index %d page %d\n", idx, i);
1299 goto nobufs;
1300 }
1301 sf[i] = sf_buf_alloc(frame, SFB_NOWAIT);
1302 if (sf[i] == NULL) {
1303 vm_page_lock_queues();
1304 vm_page_unwire(frame, 0);
1305 vm_page_free(frame);
1306 vm_page_unlock_queues();
1305 printf("ti%d: buffer allocation failed "
1306 "-- packet dropped!\n", sc->ti_unit);
1307 if_printf(sc->ti_ifp, "buffer allocation "
1308 "failed -- packet dropped!\n");
1307 printf(" index %d page %d\n", idx, i);
1308 goto nobufs;
1309 }
1310 }
1311 for (i = 0; i < NPAYLOAD; i++){
1312 /* Attach the buffer to the mbuf. */
1313 m[i]->m_data = (void *)sf_buf_kva(sf[i]);
1314 m[i]->m_len = PAGE_SIZE;

--- 222 unchanged lines hidden (view full) ---

1537 TI_DO_CMD(TI_CMD_ADD_MCAST_ADDR, 0, 0);
1538 break;
1539 case TI_HWREV_TIGON_II:
1540 ext[0] = htons(m[0]);
1541 ext[1] = (htons(m[1]) << 16) | htons(m[2]);
1542 TI_DO_CMD_EXT(TI_CMD_EXT_ADD_MCAST, 0, 0, (caddr_t)&ext, 2);
1543 break;
1544 default:
1309 printf(" index %d page %d\n", idx, i);
1310 goto nobufs;
1311 }
1312 }
1313 for (i = 0; i < NPAYLOAD; i++){
1314 /* Attach the buffer to the mbuf. */
1315 m[i]->m_data = (void *)sf_buf_kva(sf[i]);
1316 m[i]->m_len = PAGE_SIZE;

--- 222 unchanged lines hidden (view full) ---

1539 TI_DO_CMD(TI_CMD_ADD_MCAST_ADDR, 0, 0);
1540 break;
1541 case TI_HWREV_TIGON_II:
1542 ext[0] = htons(m[0]);
1543 ext[1] = (htons(m[1]) << 16) | htons(m[2]);
1544 TI_DO_CMD_EXT(TI_CMD_EXT_ADD_MCAST, 0, 0, (caddr_t)&ext, 2);
1545 break;
1546 default:
1545 printf("ti%d: unknown hwrev\n", sc->ti_unit);
1547 if_printf(sc->ti_ifp, "unknown hwrev\n");
1546 break;
1547 }
1548}
1549
1550static void
1551ti_del_mcast(sc, addr)
1552 struct ti_softc *sc;
1553 struct ether_addr *addr;

--- 11 unchanged lines hidden (view full) ---

1565 TI_DO_CMD(TI_CMD_DEL_MCAST_ADDR, 0, 0);
1566 break;
1567 case TI_HWREV_TIGON_II:
1568 ext[0] = htons(m[0]);
1569 ext[1] = (htons(m[1]) << 16) | htons(m[2]);
1570 TI_DO_CMD_EXT(TI_CMD_EXT_DEL_MCAST, 0, 0, (caddr_t)&ext, 2);
1571 break;
1572 default:
1548 break;
1549 }
1550}
1551
1552static void
1553ti_del_mcast(sc, addr)
1554 struct ti_softc *sc;
1555 struct ether_addr *addr;

--- 11 unchanged lines hidden (view full) ---

1567 TI_DO_CMD(TI_CMD_DEL_MCAST_ADDR, 0, 0);
1568 break;
1569 case TI_HWREV_TIGON_II:
1570 ext[0] = htons(m[0]);
1571 ext[1] = (htons(m[1]) << 16) | htons(m[2]);
1572 TI_DO_CMD_EXT(TI_CMD_EXT_DEL_MCAST, 0, 0, (caddr_t)&ext, 2);
1573 break;
1574 default:
1573 printf("ti%d: unknown hwrev\n", sc->ti_unit);
1575 if_printf(sc->ti_ifp, "unknown hwrev\n");
1574 break;
1575 }
1576}
1577
1578/*
1579 * Configure the Tigon's multicast address filter.
1580 *
1581 * The actual multicast table management is a bit of a pain, thanks to

--- 112 unchanged lines hidden (view full) ---

1694 TI_MHC_BIGENDIAN_INIT | (TI_MHC_BIGENDIAN_INIT << 24));
1695#else
1696 CSR_WRITE_4(sc, TI_MISC_HOST_CTL,
1697 TI_MHC_LITTLEENDIAN_INIT | (TI_MHC_LITTLEENDIAN_INIT << 24));
1698#endif
1699
1700 /* Check the ROM failed bit to see if self-tests passed. */
1701 if (CSR_READ_4(sc, TI_CPU_STATE) & TI_CPUSTATE_ROMFAIL) {
1576 break;
1577 }
1578}
1579
1580/*
1581 * Configure the Tigon's multicast address filter.
1582 *
1583 * The actual multicast table management is a bit of a pain, thanks to

--- 112 unchanged lines hidden (view full) ---

1696 TI_MHC_BIGENDIAN_INIT | (TI_MHC_BIGENDIAN_INIT << 24));
1697#else
1698 CSR_WRITE_4(sc, TI_MISC_HOST_CTL,
1699 TI_MHC_LITTLEENDIAN_INIT | (TI_MHC_LITTLEENDIAN_INIT << 24));
1700#endif
1701
1702 /* Check the ROM failed bit to see if self-tests passed. */
1703 if (CSR_READ_4(sc, TI_CPU_STATE) & TI_CPUSTATE_ROMFAIL) {
1702 printf("ti%d: board self-diagnostics failed!\n", sc->ti_unit);
1704 if_printf(sc->ti_ifp, "board self-diagnostics failed!\n");
1703 return (ENODEV);
1704 }
1705
1706 /* Halt the CPU. */
1707 TI_SETBIT(sc, TI_CPU_STATE, TI_CPUSTATE_HALT);
1708
1709 /* Figure out the hardware revision. */
1710 switch (CSR_READ_4(sc, TI_MISC_HOST_CTL) & TI_MHC_CHIP_REV_MASK) {
1711 case TI_REV_TIGON_I:
1712 sc->ti_hwrev = TI_HWREV_TIGON;
1713 break;
1714 case TI_REV_TIGON_II:
1715 sc->ti_hwrev = TI_HWREV_TIGON_II;
1716 break;
1717 default:
1705 return (ENODEV);
1706 }
1707
1708 /* Halt the CPU. */
1709 TI_SETBIT(sc, TI_CPU_STATE, TI_CPUSTATE_HALT);
1710
1711 /* Figure out the hardware revision. */
1712 switch (CSR_READ_4(sc, TI_MISC_HOST_CTL) & TI_MHC_CHIP_REV_MASK) {
1713 case TI_REV_TIGON_I:
1714 sc->ti_hwrev = TI_HWREV_TIGON;
1715 break;
1716 case TI_REV_TIGON_II:
1717 sc->ti_hwrev = TI_HWREV_TIGON_II;
1718 break;
1719 default:
1718 printf("ti%d: unsupported chip revision\n", sc->ti_unit);
1720 if_printf(sc->ti_ifp, "unsupported chip revision\n");
1719 return (ENODEV);
1720 }
1721
1722 /* Do special setup for Tigon 2. */
1723 if (sc->ti_hwrev == TI_HWREV_TIGON_II) {
1724 TI_SETBIT(sc, TI_CPU_CTL_B, TI_CPUSTATE_HALT);
1725 TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_SRAM_BANK_512K);
1726 TI_SETBIT(sc, TI_MISC_CONF, TI_MCR_SRAM_SYNCHRONOUS);
1727 }
1728
1729 /*
1730 * We don't have firmware source for the Tigon 1, so Tigon 1 boards
1731 * can't do header splitting.
1732 */
1733#ifdef TI_JUMBO_HDRSPLIT
1734 if (sc->ti_hwrev != TI_HWREV_TIGON)
1735 sc->ti_hdrsplit = 1;
1736 else
1721 return (ENODEV);
1722 }
1723
1724 /* Do special setup for Tigon 2. */
1725 if (sc->ti_hwrev == TI_HWREV_TIGON_II) {
1726 TI_SETBIT(sc, TI_CPU_CTL_B, TI_CPUSTATE_HALT);
1727 TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_SRAM_BANK_512K);
1728 TI_SETBIT(sc, TI_MISC_CONF, TI_MCR_SRAM_SYNCHRONOUS);
1729 }
1730
1731 /*
1732 * We don't have firmware source for the Tigon 1, so Tigon 1 boards
1733 * can't do header splitting.
1734 */
1735#ifdef TI_JUMBO_HDRSPLIT
1736 if (sc->ti_hwrev != TI_HWREV_TIGON)
1737 sc->ti_hdrsplit = 1;
1738 else
1737 printf("ti%d: can't do header splitting on a Tigon I board\n",
1738 sc->ti_unit);
1739 if_printf(sc->ti_ifp,
1740 "can't do header splitting on a Tigon I board\n");
1739#endif /* TI_JUMBO_HDRSPLIT */
1740
1741 /* Set up the PCI state register. */
1742 CSR_WRITE_4(sc, TI_PCI_STATE, TI_PCI_READ_CMD|TI_PCI_WRITE_CMD);
1743 if (sc->ti_hwrev == TI_HWREV_TIGON_II) {
1744 TI_SETBIT(sc, TI_PCI_STATE, TI_PCISTATE_USE_MEM_RD_MULT);
1745 }
1746

--- 17 unchanged lines hidden (view full) ---

1764 case 8:
1765 case 16:
1766 case 32:
1767 case 64:
1768 break;
1769 default:
1770 /* Disable PCI memory write and invalidate. */
1771 if (bootverbose)
1741#endif /* TI_JUMBO_HDRSPLIT */
1742
1743 /* Set up the PCI state register. */
1744 CSR_WRITE_4(sc, TI_PCI_STATE, TI_PCI_READ_CMD|TI_PCI_WRITE_CMD);
1745 if (sc->ti_hwrev == TI_HWREV_TIGON_II) {
1746 TI_SETBIT(sc, TI_PCI_STATE, TI_PCISTATE_USE_MEM_RD_MULT);
1747 }
1748

--- 17 unchanged lines hidden (view full) ---

1766 case 8:
1767 case 16:
1768 case 32:
1769 case 64:
1770 break;
1771 default:
1772 /* Disable PCI memory write and invalidate. */
1773 if (bootverbose)
1772 printf("ti%d: cache line size %d not "
1774 if_printf(sc->ti_ifp, "cache line size %d not "
1773 "supported; disabling PCI MWI\n",
1775 "supported; disabling PCI MWI\n",
1774 sc->ti_unit, cacheline);
1776 cacheline);
1775 CSR_WRITE_4(sc, TI_PCI_CMDSTAT, CSR_READ_4(sc,
1776 TI_PCI_CMDSTAT) & ~PCIM_CMD_MWIEN);
1777 break;
1778 }
1779 }
1780
1781#ifdef __brokenalpha__
1782 /*

--- 37 unchanged lines hidden (view full) ---

1820 if (sc->ti_ifp->if_hwassist == 0)
1821 TI_SETBIT(sc, TI_GCR_OPMODE, TI_OPMODE_1_DMA_ACTIVE);
1822
1823 /* Recommended settings from Tigon manual. */
1824 CSR_WRITE_4(sc, TI_GCR_DMA_WRITECFG, TI_DMA_STATE_THRESH_8W);
1825 CSR_WRITE_4(sc, TI_GCR_DMA_READCFG, TI_DMA_STATE_THRESH_8W);
1826
1827 if (ti_64bitslot_war(sc)) {
1777 CSR_WRITE_4(sc, TI_PCI_CMDSTAT, CSR_READ_4(sc,
1778 TI_PCI_CMDSTAT) & ~PCIM_CMD_MWIEN);
1779 break;
1780 }
1781 }
1782
1783#ifdef __brokenalpha__
1784 /*

--- 37 unchanged lines hidden (view full) ---

1822 if (sc->ti_ifp->if_hwassist == 0)
1823 TI_SETBIT(sc, TI_GCR_OPMODE, TI_OPMODE_1_DMA_ACTIVE);
1824
1825 /* Recommended settings from Tigon manual. */
1826 CSR_WRITE_4(sc, TI_GCR_DMA_WRITECFG, TI_DMA_STATE_THRESH_8W);
1827 CSR_WRITE_4(sc, TI_GCR_DMA_READCFG, TI_DMA_STATE_THRESH_8W);
1828
1829 if (ti_64bitslot_war(sc)) {
1828 printf("ti%d: bios thinks we're in a 64 bit slot, "
1829 "but we aren't", sc->ti_unit);
1830 if_printf(sc->ti_ifp, "bios thinks we're in a 64 bit slot, "
1831 "but we aren't");
1830 return (EINVAL);
1831 }
1832
1833 return (0);
1834}
1835
1836#define TI_RD_OFF(x) offsetof(struct ti_ring_data, x)
1837

--- 216 unchanged lines hidden (view full) ---

2054}
2055
2056static int
2057ti_attach(dev)
2058 device_t dev;
2059{
2060 struct ifnet *ifp;
2061 struct ti_softc *sc;
1832 return (EINVAL);
1833 }
1834
1835 return (0);
1836}
1837
1838#define TI_RD_OFF(x) offsetof(struct ti_ring_data, x)
1839

--- 216 unchanged lines hidden (view full) ---

2056}
2057
2058static int
2059ti_attach(dev)
2060 device_t dev;
2061{
2062 struct ifnet *ifp;
2063 struct ti_softc *sc;
2062 int unit, error = 0, rid;
2064 int error = 0, rid;
2063 u_char eaddr[6];
2064
2065 sc = device_get_softc(dev);
2065 u_char eaddr[6];
2066
2067 sc = device_get_softc(dev);
2066 unit = device_get_unit(dev);
2067 sc->ti_unit = unit;
2068 sc->ti_unit = device_get_unit(dev);
2068
2069 mtx_init(&sc->ti_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
2070 MTX_DEF | MTX_RECURSE);
2071 ifmedia_init(&sc->ifmedia, IFM_IMASK, ti_ifmedia_upd, ti_ifmedia_sts);
2072 ifp = sc->ti_ifp = if_alloc(IFT_ETHER);
2073 if (ifp == NULL) {
2069
2070 mtx_init(&sc->ti_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
2071 MTX_DEF | MTX_RECURSE);
2072 ifmedia_init(&sc->ifmedia, IFM_IMASK, ti_ifmedia_upd, ti_ifmedia_sts);
2073 ifp = sc->ti_ifp = if_alloc(IFT_ETHER);
2074 if (ifp == NULL) {
2074 printf("ti%d: can not if_alloc()\n", sc->ti_unit);
2075 device_printf(dev, "can not if_alloc()\n");
2075 error = ENOSPC;
2076 goto fail;
2077 }
2078 sc->ti_ifp->if_capabilities = IFCAP_HWCSUM |
2079 IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU;
2080 sc->ti_ifp->if_capenable = sc->ti_ifp->if_capabilities;
2081
2082 /*
2083 * Map control/status registers.
2084 */
2085 pci_enable_busmaster(dev);
2086
2087 rid = TI_PCI_LOMEM;
2088 sc->ti_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
2089 RF_ACTIVE|PCI_RF_DENSE);
2090
2091 if (sc->ti_res == NULL) {
2076 error = ENOSPC;
2077 goto fail;
2078 }
2079 sc->ti_ifp->if_capabilities = IFCAP_HWCSUM |
2080 IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU;
2081 sc->ti_ifp->if_capenable = sc->ti_ifp->if_capabilities;
2082
2083 /*
2084 * Map control/status registers.
2085 */
2086 pci_enable_busmaster(dev);
2087
2088 rid = TI_PCI_LOMEM;
2089 sc->ti_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
2090 RF_ACTIVE|PCI_RF_DENSE);
2091
2092 if (sc->ti_res == NULL) {
2092 printf ("ti%d: couldn't map memory\n", unit);
2093 device_printf(dev, "couldn't map memory\n");
2093 error = ENXIO;
2094 goto fail;
2095 }
2096
2097 sc->ti_btag = rman_get_bustag(sc->ti_res);
2098 sc->ti_bhandle = rman_get_bushandle(sc->ti_res);
2099 sc->ti_vhandle = (vm_offset_t)rman_get_virtual(sc->ti_res);
2100
2101 /* Allocate interrupt */
2102 rid = 0;
2103
2104 sc->ti_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
2105 RF_SHAREABLE | RF_ACTIVE);
2106
2107 if (sc->ti_irq == NULL) {
2094 error = ENXIO;
2095 goto fail;
2096 }
2097
2098 sc->ti_btag = rman_get_bustag(sc->ti_res);
2099 sc->ti_bhandle = rman_get_bushandle(sc->ti_res);
2100 sc->ti_vhandle = (vm_offset_t)rman_get_virtual(sc->ti_res);
2101
2102 /* Allocate interrupt */
2103 rid = 0;
2104
2105 sc->ti_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
2106 RF_SHAREABLE | RF_ACTIVE);
2107
2108 if (sc->ti_irq == NULL) {
2108 printf("ti%d: couldn't map interrupt\n", unit);
2109 device_printf(dev, "couldn't map interrupt\n");
2109 error = ENXIO;
2110 goto fail;
2111 }
2112
2113 if (ti_chipinit(sc)) {
2110 error = ENXIO;
2111 goto fail;
2112 }
2113
2114 if (ti_chipinit(sc)) {
2114 printf("ti%d: chip initialization failed\n", sc->ti_unit);
2115 device_printf(dev, "chip initialization failed\n");
2115 error = ENXIO;
2116 goto fail;
2117 }
2118
2119 /* Zero out the NIC's on-board SRAM. */
2120 ti_mem(sc, 0x2000, 0x100000 - 0x2000, NULL);
2121
2122 /* Init again -- zeroing memory may have clobbered some registers. */
2123 if (ti_chipinit(sc)) {
2116 error = ENXIO;
2117 goto fail;
2118 }
2119
2120 /* Zero out the NIC's on-board SRAM. */
2121 ti_mem(sc, 0x2000, 0x100000 - 0x2000, NULL);
2122
2123 /* Init again -- zeroing memory may have clobbered some registers. */
2124 if (ti_chipinit(sc)) {
2124 printf("ti%d: chip initialization failed\n", sc->ti_unit);
2125 device_printf(dev, "chip initialization failed\n");
2125 error = ENXIO;
2126 goto fail;
2127 }
2128
2129 /*
2130 * Get station address from the EEPROM. Note: the manual states
2131 * that the MAC address is at offset 0x8c, however the data is
2132 * stored as two longwords (since that's how it's loaded into
2133 * the NIC). This means the MAC address is actually preceded
2134 * by two zero bytes. We need to skip over those.
2135 */
2136 if (ti_read_eeprom(sc, eaddr,
2137 TI_EE_MAC_OFFSET + 2, ETHER_ADDR_LEN)) {
2126 error = ENXIO;
2127 goto fail;
2128 }
2129
2130 /*
2131 * Get station address from the EEPROM. Note: the manual states
2132 * that the MAC address is at offset 0x8c, however the data is
2133 * stored as two longwords (since that's how it's loaded into
2134 * the NIC). This means the MAC address is actually preceded
2135 * by two zero bytes. We need to skip over those.
2136 */
2137 if (ti_read_eeprom(sc, eaddr,
2138 TI_EE_MAC_OFFSET + 2, ETHER_ADDR_LEN)) {
2138 printf("ti%d: failed to read station address\n", unit);
2139 device_printf(dev, "failed to read station address\n");
2139 error = ENXIO;
2140 goto fail;
2141 }
2142
2143 /* Allocate the general information block and ring buffers. */
2144 if (bus_dma_tag_create(NULL, /* parent */
2145 1, 0, /* algnmnt, boundary */
2146 BUS_SPACE_MAXADDR, /* lowaddr */
2147 BUS_SPACE_MAXADDR, /* highaddr */
2148 NULL, NULL, /* filter, filterarg */
2149 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */
2150 0, /* nsegments */
2151 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */
2152 0, /* flags */
2153 NULL, NULL, /* lockfunc, lockarg */
2154 &sc->ti_parent_dmat) != 0) {
2140 error = ENXIO;
2141 goto fail;
2142 }
2143
2144 /* Allocate the general information block and ring buffers. */
2145 if (bus_dma_tag_create(NULL, /* parent */
2146 1, 0, /* algnmnt, boundary */
2147 BUS_SPACE_MAXADDR, /* lowaddr */
2148 BUS_SPACE_MAXADDR, /* highaddr */
2149 NULL, NULL, /* filter, filterarg */
2150 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */
2151 0, /* nsegments */
2152 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */
2153 0, /* flags */
2154 NULL, NULL, /* lockfunc, lockarg */
2155 &sc->ti_parent_dmat) != 0) {
2155 printf("ti%d: Failed to allocate parent dmat\n", sc->ti_unit);
2156 device_printf(dev, "Failed to allocate parent dmat\n");
2156 error = ENOMEM;
2157 goto fail;
2158 }
2159
2160 if (bus_dma_tag_create(sc->ti_parent_dmat, /* parent */
2161 PAGE_SIZE, 0, /* algnmnt, boundary */
2162 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
2163 BUS_SPACE_MAXADDR, /* highaddr */
2164 NULL, NULL, /* filter, filterarg */
2165 sizeof(struct ti_ring_data), /* maxsize */
2166 1, /* nsegments */
2167 sizeof(struct ti_ring_data), /* maxsegsize */
2168 0, /* flags */
2169 NULL, NULL, /* lockfunc, lockarg */
2170 &sc->ti_rdata_dmat) != 0) {
2157 error = ENOMEM;
2158 goto fail;
2159 }
2160
2161 if (bus_dma_tag_create(sc->ti_parent_dmat, /* parent */
2162 PAGE_SIZE, 0, /* algnmnt, boundary */
2163 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
2164 BUS_SPACE_MAXADDR, /* highaddr */
2165 NULL, NULL, /* filter, filterarg */
2166 sizeof(struct ti_ring_data), /* maxsize */
2167 1, /* nsegments */
2168 sizeof(struct ti_ring_data), /* maxsegsize */
2169 0, /* flags */
2170 NULL, NULL, /* lockfunc, lockarg */
2171 &sc->ti_rdata_dmat) != 0) {
2171 printf("ti%d: Failed to allocate rdata dmat\n", sc->ti_unit);
2172 device_printf(dev, "Failed to allocate rdata dmat\n");
2172 error = ENOMEM;
2173 goto fail;
2174 }
2175
2176 if (bus_dmamem_alloc(sc->ti_rdata_dmat, (void**)&sc->ti_rdata,
2177 BUS_DMA_NOWAIT, &sc->ti_rdata_dmamap) != 0) {
2173 error = ENOMEM;
2174 goto fail;
2175 }
2176
2177 if (bus_dmamem_alloc(sc->ti_rdata_dmat, (void**)&sc->ti_rdata,
2178 BUS_DMA_NOWAIT, &sc->ti_rdata_dmamap) != 0) {
2178 printf("ti%d: Failed to allocate rdata memory\n", sc->ti_unit);
2179 device_printf(dev, "Failed to allocate rdata memory\n");
2179 error = ENOMEM;
2180 goto fail;
2181 }
2182
2183 if (bus_dmamap_load(sc->ti_rdata_dmat, sc->ti_rdata_dmamap,
2184 sc->ti_rdata, sizeof(struct ti_ring_data),
2185 ti_rdata_cb, sc, BUS_DMA_NOWAIT) != 0) {
2180 error = ENOMEM;
2181 goto fail;
2182 }
2183
2184 if (bus_dmamap_load(sc->ti_rdata_dmat, sc->ti_rdata_dmamap,
2185 sc->ti_rdata, sizeof(struct ti_ring_data),
2186 ti_rdata_cb, sc, BUS_DMA_NOWAIT) != 0) {
2186 printf("ti%d: Failed to load rdata segments\n", sc->ti_unit);
2187 device_printf(dev, "Failed to load rdata segments\n");
2187 error = ENOMEM;
2188 goto fail;
2189 }
2190
2191 bzero(sc->ti_rdata, sizeof(struct ti_ring_data));
2192
2193 /* Try to allocate memory for jumbo buffers. */
2194#ifdef TI_PRIVATE_JUMBOS
2195 if (ti_alloc_jumbo_mem(sc)) {
2188 error = ENOMEM;
2189 goto fail;
2190 }
2191
2192 bzero(sc->ti_rdata, sizeof(struct ti_ring_data));
2193
2194 /* Try to allocate memory for jumbo buffers. */
2195#ifdef TI_PRIVATE_JUMBOS
2196 if (ti_alloc_jumbo_mem(sc)) {
2196 printf("ti%d: jumbo buffer allocation failed\n", sc->ti_unit);
2197 device_printf(dev, "jumbo buffer allocation failed\n");
2197 error = ENXIO;
2198 goto fail;
2199 }
2200#endif
2201
2202 /*
2203 * We really need a better way to tell a 1000baseTX card
2204 * from a 1000baseSX one, since in theory there could be

--- 23 unchanged lines hidden (view full) ---

2228 sc->ti_tx_max_coal_bds = 32;
2229 sc->ti_tx_buf_ratio = 21;
2230
2231 /* Set up ifnet structure */
2232 ifp->if_softc = sc;
2233 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
2234 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST |
2235 IFF_NEEDSGIANT;
2198 error = ENXIO;
2199 goto fail;
2200 }
2201#endif
2202
2203 /*
2204 * We really need a better way to tell a 1000baseTX card
2205 * from a 1000baseSX one, since in theory there could be

--- 23 unchanged lines hidden (view full) ---

2229 sc->ti_tx_max_coal_bds = 32;
2230 sc->ti_tx_buf_ratio = 21;
2231
2232 /* Set up ifnet structure */
2233 ifp->if_softc = sc;
2234 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
2235 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST |
2236 IFF_NEEDSGIANT;
2236 tis[unit] = sc;
2237 tis[sc->ti_unit] = sc;
2237 ifp->if_ioctl = ti_ioctl;
2238 ifp->if_start = ti_start;
2239 ifp->if_watchdog = ti_watchdog;
2240 ifp->if_init = ti_init;
2241 ifp->if_mtu = ETHERMTU;
2242 ifp->if_snd.ifq_maxlen = TI_TX_RING_CNT - 1;
2243
2244 /* Set up ifmedia support. */

--- 40 unchanged lines hidden (view full) ---

2285 */
2286 ether_ifattach(ifp, eaddr);
2287
2288 /* Hook interrupt last to avoid having to lock softc */
2289 error = bus_setup_intr(dev, sc->ti_irq, INTR_TYPE_NET,
2290 ti_intr, sc, &sc->ti_intrhand);
2291
2292 if (error) {
2238 ifp->if_ioctl = ti_ioctl;
2239 ifp->if_start = ti_start;
2240 ifp->if_watchdog = ti_watchdog;
2241 ifp->if_init = ti_init;
2242 ifp->if_mtu = ETHERMTU;
2243 ifp->if_snd.ifq_maxlen = TI_TX_RING_CNT - 1;
2244
2245 /* Set up ifmedia support. */

--- 40 unchanged lines hidden (view full) ---

2286 */
2287 ether_ifattach(ifp, eaddr);
2288
2289 /* Hook interrupt last to avoid having to lock softc */
2290 error = bus_setup_intr(dev, sc->ti_irq, INTR_TYPE_NET,
2291 ti_intr, sc, &sc->ti_intrhand);
2292
2293 if (error) {
2293 printf("ti%d: couldn't set up irq\n", unit);
2294 device_printf(dev, "couldn't set up irq\n");
2294 ether_ifdetach(ifp);
2295 goto fail;
2296 }
2297
2298fail:
2299 if (sc && error)
2300 ti_detach(dev);
2301

--- 528 unchanged lines hidden (view full) ---

2830 struct ti_softc *sc = xsc;
2831
2832 /* Cancel pending I/O and flush buffers. */
2833 ti_stop(sc);
2834
2835 TI_LOCK(sc);
2836 /* Init the gen info block, ring control blocks and firmware. */
2837 if (ti_gibinit(sc)) {
2295 ether_ifdetach(ifp);
2296 goto fail;
2297 }
2298
2299fail:
2300 if (sc && error)
2301 ti_detach(dev);
2302

--- 528 unchanged lines hidden (view full) ---

2831 struct ti_softc *sc = xsc;
2832
2833 /* Cancel pending I/O and flush buffers. */
2834 ti_stop(sc);
2835
2836 TI_LOCK(sc);
2837 /* Init the gen info block, ring control blocks and firmware. */
2838 if (ti_gibinit(sc)) {
2838 printf("ti%d: initialization failure\n", sc->ti_unit);
2839 if_printf(sc->ti_ifp, "initialization failure\n");
2839 TI_UNLOCK(sc);
2840 return;
2841 }
2842
2843 TI_UNLOCK(sc);
2844}
2845
2846static void ti_init2(sc)

--- 348 unchanged lines hidden (view full) ---

3195
3196 return (0);
3197}
3198
3199/*
3200 * This ioctl routine goes along with the Tigon character device.
3201 */
3202static int
2840 TI_UNLOCK(sc);
2841 return;
2842 }
2843
2844 TI_UNLOCK(sc);
2845}
2846
2847static void ti_init2(sc)

--- 348 unchanged lines hidden (view full) ---

3196
3197 return (0);
3198}
3199
3200/*
3201 * This ioctl routine goes along with the Tigon character device.
3202 */
3203static int
3203ti_ioctl2(struct cdev *dev, u_long cmd, caddr_t addr, int flag, struct thread *td)
3204ti_ioctl2(struct cdev *dev, u_long cmd, caddr_t addr, int flag,
3205 struct thread *td)
3204{
3205 int error;
3206 struct ti_softc *sc;
3207
3208 sc = dev->si_drv1;
3209 if (sc == NULL)
3210 return (ENODEV);
3211

--- 95 unchanged lines hidden (view full) ---

3307
3308 trace_buf = (struct ti_trace_buf *)addr;
3309
3310 trace_start = CSR_READ_4(sc, TI_GCR_NICTRACE_START);
3311 cur_trace_ptr = CSR_READ_4(sc, TI_GCR_NICTRACE_PTR);
3312 trace_len = CSR_READ_4(sc, TI_GCR_NICTRACE_LEN);
3313
3314#if 0
3206{
3207 int error;
3208 struct ti_softc *sc;
3209
3210 sc = dev->si_drv1;
3211 if (sc == NULL)
3212 return (ENODEV);
3213

--- 95 unchanged lines hidden (view full) ---

3309
3310 trace_buf = (struct ti_trace_buf *)addr;
3311
3312 trace_start = CSR_READ_4(sc, TI_GCR_NICTRACE_START);
3313 cur_trace_ptr = CSR_READ_4(sc, TI_GCR_NICTRACE_PTR);
3314 trace_len = CSR_READ_4(sc, TI_GCR_NICTRACE_LEN);
3315
3316#if 0
3315 printf("ti%d: trace_start = %#x, cur_trace_ptr = %#x, "
3316 "trace_len = %d\n", sc->ti_unit, trace_start,
3317 if_printf(sc->ti_ifp, "trace_start = %#x, cur_trace_ptr = %#x, "
3318 "trace_len = %d\n", trace_start,
3317 cur_trace_ptr, trace_len);
3319 cur_trace_ptr, trace_len);
3318 printf("ti%d: trace_buf->buf_len = %d\n", sc->ti_unit,
3320 if_printf(sc->ti_ifp, "trace_buf->buf_len = %d\n",
3319 trace_buf->buf_len);
3320#endif
3321
3322 error = ti_copy_mem(sc, trace_start, min(trace_len,
3323 trace_buf->buf_len),
3324 (caddr_t)trace_buf->buf, 1, 1);
3325
3326 if (error == 0) {

--- 66 unchanged lines hidden (view full) ---

3393 error = ti_copy_scratch(sc, mem_param->tgAddr,
3394 mem_param->len,
3395 mem_param->userAddr, 1,
3396 (cmd == ALT_READ_TG_MEM) ?
3397 1 : 0, TI_PROCESSOR_A);
3398 } else if ((mem_param->tgAddr >= TI_BEG_SCRATCH_B_DEBUG)
3399 && (mem_param->tgAddr <= TI_BEG_SCRATCH_B_DEBUG)) {
3400 if (sc->ti_hwrev == TI_HWREV_TIGON) {
3321 trace_buf->buf_len);
3322#endif
3323
3324 error = ti_copy_mem(sc, trace_start, min(trace_len,
3325 trace_buf->buf_len),
3326 (caddr_t)trace_buf->buf, 1, 1);
3327
3328 if (error == 0) {

--- 66 unchanged lines hidden (view full) ---

3395 error = ti_copy_scratch(sc, mem_param->tgAddr,
3396 mem_param->len,
3397 mem_param->userAddr, 1,
3398 (cmd == ALT_READ_TG_MEM) ?
3399 1 : 0, TI_PROCESSOR_A);
3400 } else if ((mem_param->tgAddr >= TI_BEG_SCRATCH_B_DEBUG)
3401 && (mem_param->tgAddr <= TI_BEG_SCRATCH_B_DEBUG)) {
3402 if (sc->ti_hwrev == TI_HWREV_TIGON) {
3401 printf("ti%d: invalid memory range for "
3402 "Tigon I\n", sc->ti_unit);
3403 if_printf(sc->ti_ifp,
3404 "invalid memory range for Tigon I\n");
3403 error = EINVAL;
3404 break;
3405 }
3406 error = ti_copy_scratch(sc, mem_param->tgAddr -
3407 TI_SCRATCH_DEBUG_OFF,
3408 mem_param->len,
3409 mem_param->userAddr, 1,
3410 (cmd == ALT_READ_TG_MEM) ?
3411 1 : 0, TI_PROCESSOR_B);
3412 } else {
3405 error = EINVAL;
3406 break;
3407 }
3408 error = ti_copy_scratch(sc, mem_param->tgAddr -
3409 TI_SCRATCH_DEBUG_OFF,
3410 mem_param->len,
3411 mem_param->userAddr, 1,
3412 (cmd == ALT_READ_TG_MEM) ?
3413 1 : 0, TI_PROCESSOR_B);
3414 } else {
3413 printf("ti%d: memory address %#x len %d is out of "
3414 "supported range\n", sc->ti_unit,
3415 if_printf(sc->ti_ifp, "memory address %#x len %d is "
3416 "out of supported range\n",
3415 mem_param->tgAddr, mem_param->len);
3416 error = EINVAL;
3417 }
3418
3419 break;
3420 }
3421 case ALT_READ_TG_REG:
3422 case ALT_WRITE_TG_REG:

--- 12 unchanged lines hidden (view full) ---

3435 }
3436 if (cmd == ALT_READ_TG_REG) {
3437 bus_space_read_region_4(sc->ti_btag, sc->ti_bhandle,
3438 regs->addr, &tmpval, 1);
3439 regs->data = ntohl(tmpval);
3440#if 0
3441 if ((regs->addr == TI_CPU_STATE)
3442 || (regs->addr == TI_CPU_CTL_B)) {
3417 mem_param->tgAddr, mem_param->len);
3418 error = EINVAL;
3419 }
3420
3421 break;
3422 }
3423 case ALT_READ_TG_REG:
3424 case ALT_WRITE_TG_REG:

--- 12 unchanged lines hidden (view full) ---

3437 }
3438 if (cmd == ALT_READ_TG_REG) {
3439 bus_space_read_region_4(sc->ti_btag, sc->ti_bhandle,
3440 regs->addr, &tmpval, 1);
3441 regs->data = ntohl(tmpval);
3442#if 0
3443 if ((regs->addr == TI_CPU_STATE)
3444 || (regs->addr == TI_CPU_CTL_B)) {
3443 printf("ti%d: register %#x = %#x\n",
3444 sc->ti_unit, regs->addr, tmpval);
3445 if_printf(sc->ti_ifp, "register %#x = %#x\n",
3446 regs->addr, tmpval);
3445 }
3446#endif
3447 } else {
3448 tmpval = htonl(regs->data);
3449 bus_space_write_region_4(sc->ti_btag, sc->ti_bhandle,
3450 regs->addr, &tmpval, 1);
3451 }
3452

--- 20 unchanged lines hidden (view full) ---

3473 * of time, and that would normally cause the watchdog timer to fire.
3474 * Since that impedes debugging, we don't want to do that.
3475 */
3476 if (sc->ti_flags & TI_FLAG_DEBUGING) {
3477 TI_UNLOCK(sc);
3478 return;
3479 }
3480
3447 }
3448#endif
3449 } else {
3450 tmpval = htonl(regs->data);
3451 bus_space_write_region_4(sc->ti_btag, sc->ti_bhandle,
3452 regs->addr, &tmpval, 1);
3453 }
3454

--- 20 unchanged lines hidden (view full) ---

3475 * of time, and that would normally cause the watchdog timer to fire.
3476 * Since that impedes debugging, we don't want to do that.
3477 */
3478 if (sc->ti_flags & TI_FLAG_DEBUGING) {
3479 TI_UNLOCK(sc);
3480 return;
3481 }
3482
3481 printf("ti%d: watchdog timeout -- resetting\n", sc->ti_unit);
3483 if_printf(ifp, "watchdog timeout -- resetting\n");
3482 ti_stop(sc);
3483 ti_init(sc);
3484
3485 ifp->if_oerrors++;
3486 TI_UNLOCK(sc);
3487}
3488
3489/*

--- 62 unchanged lines hidden --- 		3484 ti_stop(sc);
3485 ti_init(sc);
3486
3487 ifp->if_oerrors++;
3488 TI_UNLOCK(sc);
3489}
3490
3491/*

--- 62 unchanged lines hidden ---