Deleted Added
full compact
if_ti.c (131653) if_ti.c (131654)
1/*
2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 63 unchanged lines hidden (view full) ---

72 * - Raymond Lee of Netgear, for providing a pair of Netgear
73 * GA620 Tigon 2 boards for testing
74 * - Ulf Zimmermann, for bringing the GA260 to my attention and
75 * convincing me to write this driver.
76 * - Andrew Gallatin for providing FreeBSD/Alpha support.
77 */
78
79#include <sys/cdefs.h>
1/*
2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 63 unchanged lines hidden (view full) ---

72 * - Raymond Lee of Netgear, for providing a pair of Netgear
73 * GA620 Tigon 2 boards for testing
74 * - Ulf Zimmermann, for bringing the GA260 to my attention and
75 * convincing me to write this driver.
76 * - Andrew Gallatin for providing FreeBSD/Alpha support.
77 */
78
79#include <sys/cdefs.h>
80__FBSDID("$FreeBSD: head/sys/dev/ti/if_ti.c 131653 2004-07-05 22:36:48Z bms $");
80__FBSDID("$FreeBSD: head/sys/dev/ti/if_ti.c 131654 2004-07-05 22:42:07Z bms $");
81
82#include "opt_ti.h"
83
84#include <sys/param.h>
85#include <sys/systm.h>
86#include <sys/sockio.h>
87#include <sys/mbuf.h>
88#include <sys/malloc.h>

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319
320 /*
321 * Check for ack.
322 */
323 TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK);
324 ack = CSR_READ_4(sc, TI_MISC_LOCAL_CTL) & TI_MLC_EE_DIN;
325 TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK);
326
81
82#include "opt_ti.h"
83
84#include <sys/param.h>
85#include <sys/systm.h>
86#include <sys/sockio.h>
87#include <sys/mbuf.h>
88#include <sys/malloc.h>

--- 230 unchanged lines hidden (view full) ---

319
320 /*
321 * Check for ack.
322 */
323 TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK);
324 ack = CSR_READ_4(sc, TI_MISC_LOCAL_CTL) & TI_MLC_EE_DIN;
325 TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK);
326
327 return(ack);
327 return (ack);
328}
329
330/*
331 * Read a byte of data stored in the EEPROM at address 'addr.'
332 * We have to send two address bytes since the EEPROM can hold
333 * more than 256 bytes of data.
334 */
335static u_int8_t ti_eeprom_getbyte(sc, addr, dest)

--- 7 unchanged lines hidden (view full) ---

343 EEPROM_START;
344
345 /*
346 * Send write control code to EEPROM.
347 */
348 if (ti_eeprom_putbyte(sc, EEPROM_CTL_WRITE)) {
349 printf("ti%d: failed to send write command, status: %x\n",
350 sc->ti_unit, CSR_READ_4(sc, TI_MISC_LOCAL_CTL));
328}
329
330/*
331 * Read a byte of data stored in the EEPROM at address 'addr.'
332 * We have to send two address bytes since the EEPROM can hold
333 * more than 256 bytes of data.
334 */
335static u_int8_t ti_eeprom_getbyte(sc, addr, dest)

--- 7 unchanged lines hidden (view full) ---

343 EEPROM_START;
344
345 /*
346 * Send write control code to EEPROM.
347 */
348 if (ti_eeprom_putbyte(sc, EEPROM_CTL_WRITE)) {
349 printf("ti%d: failed to send write command, status: %x\n",
350 sc->ti_unit, CSR_READ_4(sc, TI_MISC_LOCAL_CTL));
351 return(1);
351 return (1);
352 }
353
354 /*
355 * Send first byte of address of byte we want to read.
356 */
357 if (ti_eeprom_putbyte(sc, (addr >> 8) & 0xFF)) {
358 printf("ti%d: failed to send address, status: %x\n",
359 sc->ti_unit, CSR_READ_4(sc, TI_MISC_LOCAL_CTL));
352 }
353
354 /*
355 * Send first byte of address of byte we want to read.
356 */
357 if (ti_eeprom_putbyte(sc, (addr >> 8) & 0xFF)) {
358 printf("ti%d: failed to send address, status: %x\n",
359 sc->ti_unit, CSR_READ_4(sc, TI_MISC_LOCAL_CTL));
360 return(1);
360 return (1);
361 }
362 /*
363 * Send second byte address of byte we want to read.
364 */
365 if (ti_eeprom_putbyte(sc, addr & 0xFF)) {
366 printf("ti%d: failed to send address, status: %x\n",
367 sc->ti_unit, CSR_READ_4(sc, TI_MISC_LOCAL_CTL));
361 }
362 /*
363 * Send second byte address of byte we want to read.
364 */
365 if (ti_eeprom_putbyte(sc, addr & 0xFF)) {
366 printf("ti%d: failed to send address, status: %x\n",
367 sc->ti_unit, CSR_READ_4(sc, TI_MISC_LOCAL_CTL));
368 return(1);
368 return (1);
369 }
370
371 EEPROM_STOP;
372 EEPROM_START;
373 /*
374 * Send read control code to EEPROM.
375 */
376 if (ti_eeprom_putbyte(sc, EEPROM_CTL_READ)) {
377 printf("ti%d: failed to send read command, status: %x\n",
378 sc->ti_unit, CSR_READ_4(sc, TI_MISC_LOCAL_CTL));
369 }
370
371 EEPROM_STOP;
372 EEPROM_START;
373 /*
374 * Send read control code to EEPROM.
375 */
376 if (ti_eeprom_putbyte(sc, EEPROM_CTL_READ)) {
377 printf("ti%d: failed to send read command, status: %x\n",
378 sc->ti_unit, CSR_READ_4(sc, TI_MISC_LOCAL_CTL));
379 return(1);
379 return (1);
380 }
381
382 /*
383 * Start reading bits from EEPROM.
384 */
385 TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN);
386 for (i = 0x80; i; i >>= 1) {
387 TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK);

--- 7 unchanged lines hidden (view full) ---

395 EEPROM_STOP;
396
397 /*
398 * No ACK generated for read, so just return byte.
399 */
400
401 *dest = byte;
402
380 }
381
382 /*
383 * Start reading bits from EEPROM.
384 */
385 TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN);
386 for (i = 0x80; i; i >>= 1) {
387 TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK);

--- 7 unchanged lines hidden (view full) ---

395 EEPROM_STOP;
396
397 /*
398 * No ACK generated for read, so just return byte.
399 */
400
401 *dest = byte;
402
403 return(0);
403 return (0);
404}
405
406/*
407 * Read a sequence of bytes from the EEPROM.
408 */
409static int
410ti_read_eeprom(sc, dest, off, cnt)
411 struct ti_softc *sc;

--- 6 unchanged lines hidden (view full) ---

418
419 for (i = 0; i < cnt; i++) {
420 err = ti_eeprom_getbyte(sc, off + i, &byte);
421 if (err)
422 break;
423 *(dest + i) = byte;
424 }
425
404}
405
406/*
407 * Read a sequence of bytes from the EEPROM.
408 */
409static int
410ti_read_eeprom(sc, dest, off, cnt)
411 struct ti_softc *sc;

--- 6 unchanged lines hidden (view full) ---

418
419 for (i = 0; i < cnt; i++) {
420 err = ti_eeprom_getbyte(sc, off + i, &byte);
421 if (err)
422 break;
423 *(dest + i) = byte;
424 }
425
426 return(err ? 1 : 0);
426 return (err ? 1 : 0);
427}
428
429/*
430 * NIC memory access function. Can be used to either clear a section
431 * of NIC local memory or (if buf is non-NULL) copy data into it.
432 */
433static void
434ti_mem(sc, addr, len, buf)

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439 int segptr, segsize, cnt;
440 caddr_t ti_winbase, ptr;
441
442 segptr = addr;
443 cnt = len;
444 ti_winbase = (caddr_t)(sc->ti_vhandle + TI_WINDOW);
445 ptr = buf;
446
427}
428
429/*
430 * NIC memory access function. Can be used to either clear a section
431 * of NIC local memory or (if buf is non-NULL) copy data into it.
432 */
433static void
434ti_mem(sc, addr, len, buf)

--- 4 unchanged lines hidden (view full) ---

439 int segptr, segsize, cnt;
440 caddr_t ti_winbase, ptr;
441
442 segptr = addr;
443 cnt = len;
444 ti_winbase = (caddr_t)(sc->ti_vhandle + TI_WINDOW);
445 ptr = buf;
446
447 while(cnt) {
447 while (cnt) {
448 if (cnt < TI_WINLEN)
449 segsize = cnt;
450 else
451 segsize = TI_WINLEN - (segptr % TI_WINLEN);
452 CSR_WRITE_4(sc, TI_WINBASE, (segptr & ~(TI_WINLEN - 1)));
453 if (buf == NULL)
454 bzero((char *)ti_winbase + (segptr &
455 (TI_WINLEN - 1)), segsize);

--- 26 unchanged lines hidden (view full) ---

482 * If this proves to be a problem, it will be fixed.
483 */
484 if ((readdata == 0)
485 && (tigon_addr & 0x3)) {
486 printf("ti%d: ti_copy_mem: tigon address %#x isn't "
487 "word-aligned\n", sc->ti_unit, tigon_addr);
488 printf("ti%d: ti_copy_mem: unaligned writes aren't yet "
489 "supported\n", sc->ti_unit);
448 if (cnt < TI_WINLEN)
449 segsize = cnt;
450 else
451 segsize = TI_WINLEN - (segptr % TI_WINLEN);
452 CSR_WRITE_4(sc, TI_WINBASE, (segptr & ~(TI_WINLEN - 1)));
453 if (buf == NULL)
454 bzero((char *)ti_winbase + (segptr &
455 (TI_WINLEN - 1)), segsize);

--- 26 unchanged lines hidden (view full) ---

482 * If this proves to be a problem, it will be fixed.
483 */
484 if ((readdata == 0)
485 && (tigon_addr & 0x3)) {
486 printf("ti%d: ti_copy_mem: tigon address %#x isn't "
487 "word-aligned\n", sc->ti_unit, tigon_addr);
488 printf("ti%d: ti_copy_mem: unaligned writes aren't yet "
489 "supported\n", sc->ti_unit);
490 return(EINVAL);
490 return (EINVAL);
491 }
492
493 segptr = tigon_addr & ~0x3;
494 segresid = tigon_addr - segptr;
495
496 /*
497 * This is the non-aligned amount left over that we'll need to
498 * copy.

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520 */
521 TI_LOCK(sc);
522
523 /*
524 * Save the old window base value.
525 */
526 origwin = CSR_READ_4(sc, TI_WINBASE);
527
491 }
492
493 segptr = tigon_addr & ~0x3;
494 segresid = tigon_addr - segptr;
495
496 /*
497 * This is the non-aligned amount left over that we'll need to
498 * copy.

--- 21 unchanged lines hidden (view full) ---

520 */
521 TI_LOCK(sc);
522
523 /*
524 * Save the old window base value.
525 */
526 origwin = CSR_READ_4(sc, TI_WINBASE);
527
528 while(cnt) {
528 while (cnt) {
529 bus_size_t ti_offset;
530
531 if (cnt < TI_WINLEN)
532 segsize = cnt;
533 else
534 segsize = TI_WINLEN - (segptr % TI_WINLEN);
535 CSR_WRITE_4(sc, TI_WINBASE, (segptr & ~(TI_WINLEN - 1)));
536

--- 113 unchanged lines hidden (view full) ---

650 ti_offset, &tmpval, 1);
651 }
652 }
653
654 CSR_WRITE_4(sc, TI_WINBASE, origwin);
655
656 TI_UNLOCK(sc);
657
529 bus_size_t ti_offset;
530
531 if (cnt < TI_WINLEN)
532 segsize = cnt;
533 else
534 segsize = TI_WINLEN - (segptr % TI_WINLEN);
535 CSR_WRITE_4(sc, TI_WINBASE, (segptr & ~(TI_WINLEN - 1)));
536

--- 113 unchanged lines hidden (view full) ---

650 ti_offset, &tmpval, 1);
651 }
652 }
653
654 CSR_WRITE_4(sc, TI_WINBASE, origwin);
655
656 TI_UNLOCK(sc);
657
658 return(0);
658 return (0);
659}
660
661static int
662ti_copy_scratch(sc, tigon_addr, len, buf, useraddr, readdata, cpu)
663 struct ti_softc *sc;
664 u_int32_t tigon_addr, len;
665 caddr_t buf;
666 int useraddr, readdata;

--- 6 unchanged lines hidden (view full) ---

673
674 /*
675 * At the moment, we don't handle non-aligned cases, we just bail.
676 * If this proves to be a problem, it will be fixed.
677 */
678 if (tigon_addr & 0x3) {
679 printf("ti%d: ti_copy_scratch: tigon address %#x isn't "
680 "word-aligned\n", sc->ti_unit, tigon_addr);
659}
660
661static int
662ti_copy_scratch(sc, tigon_addr, len, buf, useraddr, readdata, cpu)
663 struct ti_softc *sc;
664 u_int32_t tigon_addr, len;
665 caddr_t buf;
666 int useraddr, readdata;

--- 6 unchanged lines hidden (view full) ---

673
674 /*
675 * At the moment, we don't handle non-aligned cases, we just bail.
676 * If this proves to be a problem, it will be fixed.
677 */
678 if (tigon_addr & 0x3) {
679 printf("ti%d: ti_copy_scratch: tigon address %#x isn't "
680 "word-aligned\n", sc->ti_unit, tigon_addr);
681 return(EINVAL);
681 return (EINVAL);
682 }
683
684 if (len & 0x3) {
685 printf("ti%d: ti_copy_scratch: transfer length %d isn't "
686 "word-aligned\n", sc->ti_unit, len);
682 }
683
684 if (len & 0x3) {
685 printf("ti%d: ti_copy_scratch: transfer length %d isn't "
686 "word-aligned\n", sc->ti_unit, len);
687 return(EINVAL);
687 return (EINVAL);
688 }
689
690 segptr = tigon_addr;
691 cnt = len;
692 ptr = buf;
693
694 TI_LOCK(sc);
695

--- 54 unchanged lines hidden (view full) ---

750
751 cnt -= 4;
752 segptr += 4;
753 ptr += 4;
754 }
755
756 TI_UNLOCK(sc);
757
688 }
689
690 segptr = tigon_addr;
691 cnt = len;
692 ptr = buf;
693
694 TI_LOCK(sc);
695

--- 54 unchanged lines hidden (view full) ---

750
751 cnt -= 4;
752 segptr += 4;
753 ptr += 4;
754 }
755
756 TI_UNLOCK(sc);
757
758 return(0);
758 return (0);
759}
760
761static int
762ti_bcopy_swap(src, dst, len, swap_type)
763 const void *src;
764 void *dst;
765 size_t len;
766 ti_swap_type swap_type;
767{
768 const u_int8_t *tmpsrc;
769 u_int8_t *tmpdst;
770 size_t tmplen;
771
772 if (len & 0x3) {
773 printf("ti_bcopy_swap: length %zd isn't 32-bit aligned\n",
774 len);
759}
760
761static int
762ti_bcopy_swap(src, dst, len, swap_type)
763 const void *src;
764 void *dst;
765 size_t len;
766 ti_swap_type swap_type;
767{
768 const u_int8_t *tmpsrc;
769 u_int8_t *tmpdst;
770 size_t tmplen;
771
772 if (len & 0x3) {
773 printf("ti_bcopy_swap: length %zd isn't 32-bit aligned\n",
774 len);
775 return(-1);
775 return (-1);
776 }
777
778 tmpsrc = src;
779 tmpdst = dst;
780 tmplen = len;
781
782 while (tmplen) {
783 if (swap_type == TI_SWAP_NTOH)
784 *(u_int32_t *)tmpdst =
785 ntohl(*(const u_int32_t *)tmpsrc);
786 else
787 *(u_int32_t *)tmpdst =
788 htonl(*(const u_int32_t *)tmpsrc);
789
790 tmpsrc += 4;
791 tmpdst += 4;
792 tmplen -= 4;
793 }
794
776 }
777
778 tmpsrc = src;
779 tmpdst = dst;
780 tmplen = len;
781
782 while (tmplen) {
783 if (swap_type == TI_SWAP_NTOH)
784 *(u_int32_t *)tmpdst =
785 ntohl(*(const u_int32_t *)tmpsrc);
786 else
787 *(u_int32_t *)tmpdst =
788 htonl(*(const u_int32_t *)tmpsrc);
789
790 tmpsrc += 4;
791 tmpdst += 4;
792 tmplen -= 4;
793 }
794
795 return(0);
795 return (0);
796}
797
798/*
799 * Load firmware image into the NIC. Check that the firmware revision
800 * is acceptable and see if we want the firmware for the Tigon 1 or
801 * Tigon 2.
802 */
803static void
804ti_loadfw(sc)
805 struct ti_softc *sc;
806{
796}
797
798/*
799 * Load firmware image into the NIC. Check that the firmware revision
800 * is acceptable and see if we want the firmware for the Tigon 1 or
801 * Tigon 2.
802 */
803static void
804ti_loadfw(sc)
805 struct ti_softc *sc;
806{
807 switch(sc->ti_hwrev) {
807 switch (sc->ti_hwrev) {
808 case TI_HWREV_TIGON:
809 if (tigonFwReleaseMajor != TI_FIRMWARE_MAJOR ||
810 tigonFwReleaseMinor != TI_FIRMWARE_MINOR ||
811 tigonFwReleaseFix != TI_FIRMWARE_FIX) {
812 printf("ti%d: firmware revision mismatch; want "
813 "%d.%d.%d, got %d.%d.%d\n", sc->ti_unit,
814 TI_FIRMWARE_MAJOR, TI_FIRMWARE_MINOR,
815 TI_FIRMWARE_FIX, tigonFwReleaseMajor,

--- 96 unchanged lines hidden (view full) ---

912{
913 struct ti_event_desc *e;
914
915 if (sc->ti_rdata->ti_event_ring == NULL)
916 return;
917
918 while (sc->ti_ev_saved_considx != sc->ti_ev_prodidx.ti_idx) {
919 e = &sc->ti_rdata->ti_event_ring[sc->ti_ev_saved_considx];
808 case TI_HWREV_TIGON:
809 if (tigonFwReleaseMajor != TI_FIRMWARE_MAJOR ||
810 tigonFwReleaseMinor != TI_FIRMWARE_MINOR ||
811 tigonFwReleaseFix != TI_FIRMWARE_FIX) {
812 printf("ti%d: firmware revision mismatch; want "
813 "%d.%d.%d, got %d.%d.%d\n", sc->ti_unit,
814 TI_FIRMWARE_MAJOR, TI_FIRMWARE_MINOR,
815 TI_FIRMWARE_FIX, tigonFwReleaseMajor,

--- 96 unchanged lines hidden (view full) ---

912{
913 struct ti_event_desc *e;
914
915 if (sc->ti_rdata->ti_event_ring == NULL)
916 return;
917
918 while (sc->ti_ev_saved_considx != sc->ti_ev_prodidx.ti_idx) {
919 e = &sc->ti_rdata->ti_event_ring[sc->ti_ev_saved_considx];
920 switch(e->ti_event) {
920 switch (e->ti_event) {
921 case TI_EV_LINKSTAT_CHANGED:
922 sc->ti_linkstat = e->ti_code;
923 if (e->ti_code == TI_EV_CODE_LINK_UP)
924 printf("ti%d: 10/100 link up\n", sc->ti_unit);
925 else if (e->ti_code == TI_EV_CODE_GIG_LINK_UP)
926 printf("ti%d: gigabit link up\n", sc->ti_unit);
927 else if (e->ti_code == TI_EV_CODE_LINK_DOWN)
928 printf("ti%d: link down\n", sc->ti_unit);

--- 61 unchanged lines hidden (view full) ---

990 struct ti_jpool_entry *entry;
991
992 /* Grab a big chunk o' storage. */
993 sc->ti_cdata.ti_jumbo_buf = contigmalloc(TI_JMEM, M_DEVBUF,
994 M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0);
995
996 if (sc->ti_cdata.ti_jumbo_buf == NULL) {
997 printf("ti%d: no memory for jumbo buffers!\n", sc->ti_unit);
921 case TI_EV_LINKSTAT_CHANGED:
922 sc->ti_linkstat = e->ti_code;
923 if (e->ti_code == TI_EV_CODE_LINK_UP)
924 printf("ti%d: 10/100 link up\n", sc->ti_unit);
925 else if (e->ti_code == TI_EV_CODE_GIG_LINK_UP)
926 printf("ti%d: gigabit link up\n", sc->ti_unit);
927 else if (e->ti_code == TI_EV_CODE_LINK_DOWN)
928 printf("ti%d: link down\n", sc->ti_unit);

--- 61 unchanged lines hidden (view full) ---

990 struct ti_jpool_entry *entry;
991
992 /* Grab a big chunk o' storage. */
993 sc->ti_cdata.ti_jumbo_buf = contigmalloc(TI_JMEM, M_DEVBUF,
994 M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0);
995
996 if (sc->ti_cdata.ti_jumbo_buf == NULL) {
997 printf("ti%d: no memory for jumbo buffers!\n", sc->ti_unit);
998 return(ENOBUFS);
998 return (ENOBUFS);
999 }
1000
1001 SLIST_INIT(&sc->ti_jfree_listhead);
1002 SLIST_INIT(&sc->ti_jinuse_listhead);
1003
1004 /*
1005 * Now divide it up into 9K pieces and save the addresses
1006 * in an array.

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1012 entry = malloc(sizeof(struct ti_jpool_entry),
1013 M_DEVBUF, M_NOWAIT);
1014 if (entry == NULL) {
1015 contigfree(sc->ti_cdata.ti_jumbo_buf, TI_JMEM,
1016 M_DEVBUF);
1017 sc->ti_cdata.ti_jumbo_buf = NULL;
1018 printf("ti%d: no memory for jumbo "
1019 "buffer queue!\n", sc->ti_unit);
999 }
1000
1001 SLIST_INIT(&sc->ti_jfree_listhead);
1002 SLIST_INIT(&sc->ti_jinuse_listhead);
1003
1004 /*
1005 * Now divide it up into 9K pieces and save the addresses
1006 * in an array.

--- 5 unchanged lines hidden (view full) ---

1012 entry = malloc(sizeof(struct ti_jpool_entry),
1013 M_DEVBUF, M_NOWAIT);
1014 if (entry == NULL) {
1015 contigfree(sc->ti_cdata.ti_jumbo_buf, TI_JMEM,
1016 M_DEVBUF);
1017 sc->ti_cdata.ti_jumbo_buf = NULL;
1018 printf("ti%d: no memory for jumbo "
1019 "buffer queue!\n", sc->ti_unit);
1020 return(ENOBUFS);
1020 return (ENOBUFS);
1021 }
1022 entry->slot = i;
1023 SLIST_INSERT_HEAD(&sc->ti_jfree_listhead, entry, jpool_entries);
1024 }
1025
1021 }
1022 entry->slot = i;
1023 SLIST_INSERT_HEAD(&sc->ti_jfree_listhead, entry, jpool_entries);
1024 }
1025
1026 return(0);
1026 return (0);
1027}
1028
1029/*
1030 * Allocate a jumbo buffer.
1031 */
1032static void *ti_jalloc(sc)
1033 struct ti_softc *sc;
1034{
1035 struct ti_jpool_entry *entry;
1036
1037 entry = SLIST_FIRST(&sc->ti_jfree_listhead);
1038
1039 if (entry == NULL) {
1040 printf("ti%d: no free jumbo buffers\n", sc->ti_unit);
1027}
1028
1029/*
1030 * Allocate a jumbo buffer.
1031 */
1032static void *ti_jalloc(sc)
1033 struct ti_softc *sc;
1034{
1035 struct ti_jpool_entry *entry;
1036
1037 entry = SLIST_FIRST(&sc->ti_jfree_listhead);
1038
1039 if (entry == NULL) {
1040 printf("ti%d: no free jumbo buffers\n", sc->ti_unit);
1041 return(NULL);
1041 return (NULL);
1042 }
1043
1044 SLIST_REMOVE_HEAD(&sc->ti_jfree_listhead, jpool_entries);
1045 SLIST_INSERT_HEAD(&sc->ti_jinuse_listhead, entry, jpool_entries);
1042 }
1043
1044 SLIST_REMOVE_HEAD(&sc->ti_jfree_listhead, jpool_entries);
1045 SLIST_INSERT_HEAD(&sc->ti_jinuse_listhead, entry, jpool_entries);
1046 return(sc->ti_cdata.ti_jslots[entry->slot]);
1046 return (sc->ti_cdata.ti_jslots[entry->slot]);
1047}
1048
1049/*
1050 * Release a jumbo buffer.
1051 */
1052static void
1053ti_jfree(buf, args)
1054 void *buf;

--- 36 unchanged lines hidden (view full) ---

1091 struct mbuf *m;
1092{
1093 struct mbuf *m_new = NULL;
1094 struct ti_rx_desc *r;
1095
1096 if (m == NULL) {
1097 MGETHDR(m_new, M_DONTWAIT, MT_DATA);
1098 if (m_new == NULL)
1047}
1048
1049/*
1050 * Release a jumbo buffer.
1051 */
1052static void
1053ti_jfree(buf, args)
1054 void *buf;

--- 36 unchanged lines hidden (view full) ---

1091 struct mbuf *m;
1092{
1093 struct mbuf *m_new = NULL;
1094 struct ti_rx_desc *r;
1095
1096 if (m == NULL) {
1097 MGETHDR(m_new, M_DONTWAIT, MT_DATA);
1098 if (m_new == NULL)
1099 return(ENOBUFS);
1099 return (ENOBUFS);
1100
1101 MCLGET(m_new, M_DONTWAIT);
1102 if (!(m_new->m_flags & M_EXT)) {
1103 m_freem(m_new);
1100
1101 MCLGET(m_new, M_DONTWAIT);
1102 if (!(m_new->m_flags & M_EXT)) {
1103 m_freem(m_new);
1104 return(ENOBUFS);
1104 return (ENOBUFS);
1105 }
1106 m_new->m_len = m_new->m_pkthdr.len = MCLBYTES;
1107 } else {
1108 m_new = m;
1109 m_new->m_len = m_new->m_pkthdr.len = MCLBYTES;
1110 m_new->m_data = m_new->m_ext.ext_buf;
1111 }
1112
1113 m_adj(m_new, ETHER_ALIGN);
1114 sc->ti_cdata.ti_rx_std_chain[i] = m_new;
1115 r = &sc->ti_rdata->ti_rx_std_ring[i];
1116 TI_HOSTADDR(r->ti_addr) = vtophys(mtod(m_new, caddr_t));
1117 r->ti_type = TI_BDTYPE_RECV_BD;
1118 r->ti_flags = 0;
1119 if (sc->arpcom.ac_if.if_hwassist)
1120 r->ti_flags |= TI_BDFLAG_TCP_UDP_CKSUM | TI_BDFLAG_IP_CKSUM;
1121 r->ti_len = m_new->m_len;
1122 r->ti_idx = i;
1123
1105 }
1106 m_new->m_len = m_new->m_pkthdr.len = MCLBYTES;
1107 } else {
1108 m_new = m;
1109 m_new->m_len = m_new->m_pkthdr.len = MCLBYTES;
1110 m_new->m_data = m_new->m_ext.ext_buf;
1111 }
1112
1113 m_adj(m_new, ETHER_ALIGN);
1114 sc->ti_cdata.ti_rx_std_chain[i] = m_new;
1115 r = &sc->ti_rdata->ti_rx_std_ring[i];
1116 TI_HOSTADDR(r->ti_addr) = vtophys(mtod(m_new, caddr_t));
1117 r->ti_type = TI_BDTYPE_RECV_BD;
1118 r->ti_flags = 0;
1119 if (sc->arpcom.ac_if.if_hwassist)
1120 r->ti_flags |= TI_BDFLAG_TCP_UDP_CKSUM | TI_BDFLAG_IP_CKSUM;
1121 r->ti_len = m_new->m_len;
1122 r->ti_idx = i;
1123
1124 return(0);
1124 return (0);
1125}
1126
1127/*
1128 * Intialize a mini receive ring descriptor. This only applies to
1129 * the Tigon 2.
1130 */
1131static int
1132ti_newbuf_mini(sc, i, m)
1133 struct ti_softc *sc;
1134 int i;
1135 struct mbuf *m;
1136{
1137 struct mbuf *m_new = NULL;
1138 struct ti_rx_desc *r;
1139
1140 if (m == NULL) {
1141 MGETHDR(m_new, M_DONTWAIT, MT_DATA);
1142 if (m_new == NULL) {
1125}
1126
1127/*
1128 * Intialize a mini receive ring descriptor. This only applies to
1129 * the Tigon 2.
1130 */
1131static int
1132ti_newbuf_mini(sc, i, m)
1133 struct ti_softc *sc;
1134 int i;
1135 struct mbuf *m;
1136{
1137 struct mbuf *m_new = NULL;
1138 struct ti_rx_desc *r;
1139
1140 if (m == NULL) {
1141 MGETHDR(m_new, M_DONTWAIT, MT_DATA);
1142 if (m_new == NULL) {
1143 return(ENOBUFS);
1143 return (ENOBUFS);
1144 }
1145 m_new->m_len = m_new->m_pkthdr.len = MHLEN;
1146 } else {
1147 m_new = m;
1148 m_new->m_data = m_new->m_pktdat;
1149 m_new->m_len = m_new->m_pkthdr.len = MHLEN;
1150 }
1151
1152 m_adj(m_new, ETHER_ALIGN);
1153 r = &sc->ti_rdata->ti_rx_mini_ring[i];
1154 sc->ti_cdata.ti_rx_mini_chain[i] = m_new;
1155 TI_HOSTADDR(r->ti_addr) = vtophys(mtod(m_new, caddr_t));
1156 r->ti_type = TI_BDTYPE_RECV_BD;
1157 r->ti_flags = TI_BDFLAG_MINI_RING;
1158 if (sc->arpcom.ac_if.if_hwassist)
1159 r->ti_flags |= TI_BDFLAG_TCP_UDP_CKSUM | TI_BDFLAG_IP_CKSUM;
1160 r->ti_len = m_new->m_len;
1161 r->ti_idx = i;
1162
1144 }
1145 m_new->m_len = m_new->m_pkthdr.len = MHLEN;
1146 } else {
1147 m_new = m;
1148 m_new->m_data = m_new->m_pktdat;
1149 m_new->m_len = m_new->m_pkthdr.len = MHLEN;
1150 }
1151
1152 m_adj(m_new, ETHER_ALIGN);
1153 r = &sc->ti_rdata->ti_rx_mini_ring[i];
1154 sc->ti_cdata.ti_rx_mini_chain[i] = m_new;
1155 TI_HOSTADDR(r->ti_addr) = vtophys(mtod(m_new, caddr_t));
1156 r->ti_type = TI_BDTYPE_RECV_BD;
1157 r->ti_flags = TI_BDFLAG_MINI_RING;
1158 if (sc->arpcom.ac_if.if_hwassist)
1159 r->ti_flags |= TI_BDFLAG_TCP_UDP_CKSUM | TI_BDFLAG_IP_CKSUM;
1160 r->ti_len = m_new->m_len;
1161 r->ti_idx = i;
1162
1163 return(0);
1163 return (0);
1164}
1165
1166#ifdef TI_PRIVATE_JUMBOS
1167
1168/*
1169 * Initialize a jumbo receive ring descriptor. This allocates
1170 * a jumbo buffer from the pool managed internally by the driver.
1171 */

--- 7 unchanged lines hidden (view full) ---

1179 struct ti_rx_desc *r;
1180
1181 if (m == NULL) {
1182 caddr_t *buf = NULL;
1183
1184 /* Allocate the mbuf. */
1185 MGETHDR(m_new, M_DONTWAIT, MT_DATA);
1186 if (m_new == NULL) {
1164}
1165
1166#ifdef TI_PRIVATE_JUMBOS
1167
1168/*
1169 * Initialize a jumbo receive ring descriptor. This allocates
1170 * a jumbo buffer from the pool managed internally by the driver.
1171 */

--- 7 unchanged lines hidden (view full) ---

1179 struct ti_rx_desc *r;
1180
1181 if (m == NULL) {
1182 caddr_t *buf = NULL;
1183
1184 /* Allocate the mbuf. */
1185 MGETHDR(m_new, M_DONTWAIT, MT_DATA);
1186 if (m_new == NULL) {
1187 return(ENOBUFS);
1187 return (ENOBUFS);
1188 }
1189
1190 /* Allocate the jumbo buffer */
1191 buf = ti_jalloc(sc);
1192 if (buf == NULL) {
1193 m_freem(m_new);
1194 printf("ti%d: jumbo allocation failed "
1195 "-- packet dropped!\n", sc->ti_unit);
1188 }
1189
1190 /* Allocate the jumbo buffer */
1191 buf = ti_jalloc(sc);
1192 if (buf == NULL) {
1193 m_freem(m_new);
1194 printf("ti%d: jumbo allocation failed "
1195 "-- packet dropped!\n", sc->ti_unit);
1196 return(ENOBUFS);
1196 return (ENOBUFS);
1197 }
1198
1199 /* Attach the buffer to the mbuf. */
1200 m_new->m_data = (void *) buf;
1201 m_new->m_len = m_new->m_pkthdr.len = TI_JUMBO_FRAMELEN;
1202 MEXTADD(m_new, buf, TI_JUMBO_FRAMELEN, ti_jfree,
1203 (struct ti_softc *)sc, 0, EXT_NET_DRV);
1204 } else {

--- 9 unchanged lines hidden (view full) ---

1214 TI_HOSTADDR(r->ti_addr) = vtophys(mtod(m_new, caddr_t));
1215 r->ti_type = TI_BDTYPE_RECV_JUMBO_BD;
1216 r->ti_flags = TI_BDFLAG_JUMBO_RING;
1217 if (sc->arpcom.ac_if.if_hwassist)
1218 r->ti_flags |= TI_BDFLAG_TCP_UDP_CKSUM | TI_BDFLAG_IP_CKSUM;
1219 r->ti_len = m_new->m_len;
1220 r->ti_idx = i;
1221
1197 }
1198
1199 /* Attach the buffer to the mbuf. */
1200 m_new->m_data = (void *) buf;
1201 m_new->m_len = m_new->m_pkthdr.len = TI_JUMBO_FRAMELEN;
1202 MEXTADD(m_new, buf, TI_JUMBO_FRAMELEN, ti_jfree,
1203 (struct ti_softc *)sc, 0, EXT_NET_DRV);
1204 } else {

--- 9 unchanged lines hidden (view full) ---

1214 TI_HOSTADDR(r->ti_addr) = vtophys(mtod(m_new, caddr_t));
1215 r->ti_type = TI_BDTYPE_RECV_JUMBO_BD;
1216 r->ti_flags = TI_BDFLAG_JUMBO_RING;
1217 if (sc->arpcom.ac_if.if_hwassist)
1218 r->ti_flags |= TI_BDFLAG_TCP_UDP_CKSUM | TI_BDFLAG_IP_CKSUM;
1219 r->ti_len = m_new->m_len;
1220 r->ti_idx = i;
1221
1222 return(0);
1222 return (0);
1223}
1224
1225#else
1226#include <vm/vm_page.h>
1227
1228#if (PAGE_SIZE == 4096)
1229#define NPAYLOAD 2
1230#else

--- 108 unchanged lines hidden (view full) ---

1339
1340 r->ti_flags = TI_BDFLAG_JUMBO_RING|TI_RCB_FLAG_USE_EXT_RX_BD;
1341
1342 if (sc->arpcom.ac_if.if_hwassist)
1343 r->ti_flags |= TI_BDFLAG_TCP_UDP_CKSUM|TI_BDFLAG_IP_CKSUM;
1344
1345 r->ti_idx = idx;
1346
1223}
1224
1225#else
1226#include <vm/vm_page.h>
1227
1228#if (PAGE_SIZE == 4096)
1229#define NPAYLOAD 2
1230#else

--- 108 unchanged lines hidden (view full) ---

1339
1340 r->ti_flags = TI_BDFLAG_JUMBO_RING|TI_RCB_FLAG_USE_EXT_RX_BD;
1341
1342 if (sc->arpcom.ac_if.if_hwassist)
1343 r->ti_flags |= TI_BDFLAG_TCP_UDP_CKSUM|TI_BDFLAG_IP_CKSUM;
1344
1345 r->ti_idx = idx;
1346
1347 return(0);
1347 return (0);
1348
1349 nobufs:
1350
1351 /*
1352 * Warning! :
1353 * This can only be called before the mbufs are strung together.
1354 * If the mbufs are strung together, m_freem() will free the chain,
1355 * so that the later mbufs will be freed multiple times.
1356 */
1357 if (m_new)
1358 m_freem(m_new);
1359
1348
1349 nobufs:
1350
1351 /*
1352 * Warning! :
1353 * This can only be called before the mbufs are strung together.
1354 * If the mbufs are strung together, m_freem() will free the chain,
1355 * so that the later mbufs will be freed multiple times.
1356 */
1357 if (m_new)
1358 m_freem(m_new);
1359
1360 for(i = 0; i < 3; i++){
1360 for (i = 0; i < 3; i++) {
1361 if (m[i])
1362 m_freem(m[i]);
1363 if (buf[i])
1364 jumbo_pg_free((vm_offset_t)buf[i]);
1365 }
1366 return ENOBUFS;
1367}
1368#endif

--- 10 unchanged lines hidden (view full) ---

1379ti_init_rx_ring_std(sc)
1380 struct ti_softc *sc;
1381{
1382 register int i;
1383 struct ti_cmd_desc cmd;
1384
1385 for (i = 0; i < TI_SSLOTS; i++) {
1386 if (ti_newbuf_std(sc, i, NULL) == ENOBUFS)
1361 if (m[i])
1362 m_freem(m[i]);
1363 if (buf[i])
1364 jumbo_pg_free((vm_offset_t)buf[i]);
1365 }
1366 return ENOBUFS;
1367}
1368#endif

--- 10 unchanged lines hidden (view full) ---

1379ti_init_rx_ring_std(sc)
1380 struct ti_softc *sc;
1381{
1382 register int i;
1383 struct ti_cmd_desc cmd;
1384
1385 for (i = 0; i < TI_SSLOTS; i++) {
1386 if (ti_newbuf_std(sc, i, NULL) == ENOBUFS)
1387 return(ENOBUFS);
1387 return (ENOBUFS);
1388 };
1389
1390 TI_UPDATE_STDPROD(sc, i - 1);
1391 sc->ti_std = i - 1;
1392
1388 };
1389
1390 TI_UPDATE_STDPROD(sc, i - 1);
1391 sc->ti_std = i - 1;
1392
1393 return(0);
1393 return (0);
1394}
1395
1396static void
1397ti_free_rx_ring_std(sc)
1398 struct ti_softc *sc;
1399{
1400 register int i;
1401

--- 11 unchanged lines hidden (view full) ---

1413ti_init_rx_ring_jumbo(sc)
1414 struct ti_softc *sc;
1415{
1416 register int i;
1417 struct ti_cmd_desc cmd;
1418
1419 for (i = 0; i < TI_JUMBO_RX_RING_CNT; i++) {
1420 if (ti_newbuf_jumbo(sc, i, NULL) == ENOBUFS)
1394}
1395
1396static void
1397ti_free_rx_ring_std(sc)
1398 struct ti_softc *sc;
1399{
1400 register int i;
1401

--- 11 unchanged lines hidden (view full) ---

1413ti_init_rx_ring_jumbo(sc)
1414 struct ti_softc *sc;
1415{
1416 register int i;
1417 struct ti_cmd_desc cmd;
1418
1419 for (i = 0; i < TI_JUMBO_RX_RING_CNT; i++) {
1420 if (ti_newbuf_jumbo(sc, i, NULL) == ENOBUFS)
1421 return(ENOBUFS);
1421 return (ENOBUFS);
1422 };
1423
1424 TI_UPDATE_JUMBOPROD(sc, i - 1);
1425 sc->ti_jumbo = i - 1;
1426
1422 };
1423
1424 TI_UPDATE_JUMBOPROD(sc, i - 1);
1425 sc->ti_jumbo = i - 1;
1426
1427 return(0);
1427 return (0);
1428}
1429
1430static void
1431ti_free_rx_ring_jumbo(sc)
1432 struct ti_softc *sc;
1433{
1434 register int i;
1435

--- 10 unchanged lines hidden (view full) ---

1446static int
1447ti_init_rx_ring_mini(sc)
1448 struct ti_softc *sc;
1449{
1450 register int i;
1451
1452 for (i = 0; i < TI_MSLOTS; i++) {
1453 if (ti_newbuf_mini(sc, i, NULL) == ENOBUFS)
1428}
1429
1430static void
1431ti_free_rx_ring_jumbo(sc)
1432 struct ti_softc *sc;
1433{
1434 register int i;
1435

--- 10 unchanged lines hidden (view full) ---

1446static int
1447ti_init_rx_ring_mini(sc)
1448 struct ti_softc *sc;
1449{
1450 register int i;
1451
1452 for (i = 0; i < TI_MSLOTS; i++) {
1453 if (ti_newbuf_mini(sc, i, NULL) == ENOBUFS)
1454 return(ENOBUFS);
1454 return (ENOBUFS);
1455 };
1456
1457 TI_UPDATE_MINIPROD(sc, i - 1);
1458 sc->ti_mini = i - 1;
1459
1455 };
1456
1457 TI_UPDATE_MINIPROD(sc, i - 1);
1458 sc->ti_mini = i - 1;
1459
1460 return(0);
1460 return (0);
1461}
1462
1463static void
1464ti_free_rx_ring_mini(sc)
1465 struct ti_softc *sc;
1466{
1467 register int i;
1468

--- 28 unchanged lines hidden (view full) ---

1497
1498static int
1499ti_init_tx_ring(sc)
1500 struct ti_softc *sc;
1501{
1502 sc->ti_txcnt = 0;
1503 sc->ti_tx_saved_considx = 0;
1504 CSR_WRITE_4(sc, TI_MB_SENDPROD_IDX, 0);
1461}
1462
1463static void
1464ti_free_rx_ring_mini(sc)
1465 struct ti_softc *sc;
1466{
1467 register int i;
1468

--- 28 unchanged lines hidden (view full) ---

1497
1498static int
1499ti_init_tx_ring(sc)
1500 struct ti_softc *sc;
1501{
1502 sc->ti_txcnt = 0;
1503 sc->ti_tx_saved_considx = 0;
1504 CSR_WRITE_4(sc, TI_MB_SENDPROD_IDX, 0);
1505 return(0);
1505 return (0);
1506}
1507
1508/*
1509 * The Tigon 2 firmware has a new way to add/delete multicast addresses,
1510 * but we have to support the old way too so that Tigon 1 cards will
1511 * work.
1512 */
1513static void
1514ti_add_mcast(sc, addr)
1515 struct ti_softc *sc;
1516 struct ether_addr *addr;
1517{
1518 struct ti_cmd_desc cmd;
1519 u_int16_t *m;
1520 u_int32_t ext[2] = {0, 0};
1521
1522 m = (u_int16_t *)&addr->octet[0];
1523
1506}
1507
1508/*
1509 * The Tigon 2 firmware has a new way to add/delete multicast addresses,
1510 * but we have to support the old way too so that Tigon 1 cards will
1511 * work.
1512 */
1513static void
1514ti_add_mcast(sc, addr)
1515 struct ti_softc *sc;
1516 struct ether_addr *addr;
1517{
1518 struct ti_cmd_desc cmd;
1519 u_int16_t *m;
1520 u_int32_t ext[2] = {0, 0};
1521
1522 m = (u_int16_t *)&addr->octet[0];
1523
1524 switch(sc->ti_hwrev) {
1524 switch (sc->ti_hwrev) {
1525 case TI_HWREV_TIGON:
1526 CSR_WRITE_4(sc, TI_GCR_MAR0, htons(m[0]));
1527 CSR_WRITE_4(sc, TI_GCR_MAR1, (htons(m[1]) << 16) | htons(m[2]));
1528 TI_DO_CMD(TI_CMD_ADD_MCAST_ADDR, 0, 0);
1529 break;
1530 case TI_HWREV_TIGON_II:
1531 ext[0] = htons(m[0]);
1532 ext[1] = (htons(m[1]) << 16) | htons(m[2]);

--- 11 unchanged lines hidden (view full) ---

1544 struct ether_addr *addr;
1545{
1546 struct ti_cmd_desc cmd;
1547 u_int16_t *m;
1548 u_int32_t ext[2] = {0, 0};
1549
1550 m = (u_int16_t *)&addr->octet[0];
1551
1525 case TI_HWREV_TIGON:
1526 CSR_WRITE_4(sc, TI_GCR_MAR0, htons(m[0]));
1527 CSR_WRITE_4(sc, TI_GCR_MAR1, (htons(m[1]) << 16) | htons(m[2]));
1528 TI_DO_CMD(TI_CMD_ADD_MCAST_ADDR, 0, 0);
1529 break;
1530 case TI_HWREV_TIGON_II:
1531 ext[0] = htons(m[0]);
1532 ext[1] = (htons(m[1]) << 16) | htons(m[2]);

--- 11 unchanged lines hidden (view full) ---

1544 struct ether_addr *addr;
1545{
1546 struct ti_cmd_desc cmd;
1547 u_int16_t *m;
1548 u_int32_t ext[2] = {0, 0};
1549
1550 m = (u_int16_t *)&addr->octet[0];
1551
1552 switch(sc->ti_hwrev) {
1552 switch (sc->ti_hwrev) {
1553 case TI_HWREV_TIGON:
1554 CSR_WRITE_4(sc, TI_GCR_MAR0, htons(m[0]));
1555 CSR_WRITE_4(sc, TI_GCR_MAR1, (htons(m[1]) << 16) | htons(m[2]));
1556 TI_DO_CMD(TI_CMD_DEL_MCAST_ADDR, 0, 0);
1557 break;
1558 case TI_HWREV_TIGON_II:
1559 ext[0] = htons(m[0]);
1560 ext[1] = (htons(m[1]) << 16) | htons(m[2]);

--- 75 unchanged lines hidden (view full) ---

1636 struct ti_softc *sc;
1637{
1638 if (!(CSR_READ_4(sc, TI_PCI_STATE) & TI_PCISTATE_32BIT_BUS)) {
1639 CSR_WRITE_4(sc, 0x600, 0);
1640 CSR_WRITE_4(sc, 0x604, 0);
1641 CSR_WRITE_4(sc, 0x600, 0x5555AAAA);
1642 if (CSR_READ_4(sc, 0x604) == 0x5555AAAA) {
1643 if (sc->ti_hwrev == TI_HWREV_TIGON)
1553 case TI_HWREV_TIGON:
1554 CSR_WRITE_4(sc, TI_GCR_MAR0, htons(m[0]));
1555 CSR_WRITE_4(sc, TI_GCR_MAR1, (htons(m[1]) << 16) | htons(m[2]));
1556 TI_DO_CMD(TI_CMD_DEL_MCAST_ADDR, 0, 0);
1557 break;
1558 case TI_HWREV_TIGON_II:
1559 ext[0] = htons(m[0]);
1560 ext[1] = (htons(m[1]) << 16) | htons(m[2]);

--- 75 unchanged lines hidden (view full) ---

1636 struct ti_softc *sc;
1637{
1638 if (!(CSR_READ_4(sc, TI_PCI_STATE) & TI_PCISTATE_32BIT_BUS)) {
1639 CSR_WRITE_4(sc, 0x600, 0);
1640 CSR_WRITE_4(sc, 0x604, 0);
1641 CSR_WRITE_4(sc, 0x600, 0x5555AAAA);
1642 if (CSR_READ_4(sc, 0x604) == 0x5555AAAA) {
1643 if (sc->ti_hwrev == TI_HWREV_TIGON)
1644 return(EINVAL);
1644 return (EINVAL);
1645 else {
1646 TI_SETBIT(sc, TI_PCI_STATE,
1647 TI_PCISTATE_32BIT_BUS);
1645 else {
1646 TI_SETBIT(sc, TI_PCI_STATE,
1647 TI_PCISTATE_32BIT_BUS);
1648 return(0);
1648 return (0);
1649 }
1650 }
1651 }
1652
1649 }
1650 }
1651 }
1652
1653 return(0);
1653 return (0);
1654}
1655
1656/*
1657 * Do endian, PCI and DMA initialization. Also check the on-board ROM
1658 * self-test results.
1659 */
1660static int
1661ti_chipinit(sc)

--- 18 unchanged lines hidden (view full) ---

1680#else
1681 CSR_WRITE_4(sc, TI_MISC_HOST_CTL,
1682 TI_MHC_LITTLEENDIAN_INIT | (TI_MHC_LITTLEENDIAN_INIT << 24));
1683#endif
1684
1685 /* Check the ROM failed bit to see if self-tests passed. */
1686 if (CSR_READ_4(sc, TI_CPU_STATE) & TI_CPUSTATE_ROMFAIL) {
1687 printf("ti%d: board self-diagnostics failed!\n", sc->ti_unit);
1654}
1655
1656/*
1657 * Do endian, PCI and DMA initialization. Also check the on-board ROM
1658 * self-test results.
1659 */
1660static int
1661ti_chipinit(sc)

--- 18 unchanged lines hidden (view full) ---

1680#else
1681 CSR_WRITE_4(sc, TI_MISC_HOST_CTL,
1682 TI_MHC_LITTLEENDIAN_INIT | (TI_MHC_LITTLEENDIAN_INIT << 24));
1683#endif
1684
1685 /* Check the ROM failed bit to see if self-tests passed. */
1686 if (CSR_READ_4(sc, TI_CPU_STATE) & TI_CPUSTATE_ROMFAIL) {
1687 printf("ti%d: board self-diagnostics failed!\n", sc->ti_unit);
1688 return(ENODEV);
1688 return (ENODEV);
1689 }
1690
1691 /* Halt the CPU. */
1692 TI_SETBIT(sc, TI_CPU_STATE, TI_CPUSTATE_HALT);
1693
1694 /* Figure out the hardware revision. */
1689 }
1690
1691 /* Halt the CPU. */
1692 TI_SETBIT(sc, TI_CPU_STATE, TI_CPUSTATE_HALT);
1693
1694 /* Figure out the hardware revision. */
1695 switch(CSR_READ_4(sc, TI_MISC_HOST_CTL) & TI_MHC_CHIP_REV_MASK) {
1695 switch (CSR_READ_4(sc, TI_MISC_HOST_CTL) & TI_MHC_CHIP_REV_MASK) {
1696 case TI_REV_TIGON_I:
1697 sc->ti_hwrev = TI_HWREV_TIGON;
1698 break;
1699 case TI_REV_TIGON_II:
1700 sc->ti_hwrev = TI_HWREV_TIGON_II;
1701 break;
1702 default:
1703 printf("ti%d: unsupported chip revision\n", sc->ti_unit);
1696 case TI_REV_TIGON_I:
1697 sc->ti_hwrev = TI_HWREV_TIGON;
1698 break;
1699 case TI_REV_TIGON_II:
1700 sc->ti_hwrev = TI_HWREV_TIGON_II;
1701 break;
1702 default:
1703 printf("ti%d: unsupported chip revision\n", sc->ti_unit);
1704 return(ENODEV);
1704 return (ENODEV);
1705 }
1706
1707 /* Do special setup for Tigon 2. */
1708 if (sc->ti_hwrev == TI_HWREV_TIGON_II) {
1709 TI_SETBIT(sc, TI_CPU_CTL_B, TI_CPUSTATE_HALT);
1710 TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_SRAM_BANK_512K);
1711 TI_SETBIT(sc, TI_MISC_CONF, TI_MCR_SRAM_SYNCHRONOUS);
1712 }

--- 25 unchanged lines hidden (view full) ---

1738
1739 /*
1740 * If the system has set enabled the PCI memory write
1741 * and invalidate command in the command register, set
1742 * the write max parameter accordingly. This is necessary
1743 * to use MWI with the Tigon 2.
1744 */
1745 if (CSR_READ_4(sc, TI_PCI_CMDSTAT) & PCIM_CMD_MWIEN) {
1705 }
1706
1707 /* Do special setup for Tigon 2. */
1708 if (sc->ti_hwrev == TI_HWREV_TIGON_II) {
1709 TI_SETBIT(sc, TI_CPU_CTL_B, TI_CPUSTATE_HALT);
1710 TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_SRAM_BANK_512K);
1711 TI_SETBIT(sc, TI_MISC_CONF, TI_MCR_SRAM_SYNCHRONOUS);
1712 }

--- 25 unchanged lines hidden (view full) ---

1738
1739 /*
1740 * If the system has set enabled the PCI memory write
1741 * and invalidate command in the command register, set
1742 * the write max parameter accordingly. This is necessary
1743 * to use MWI with the Tigon 2.
1744 */
1745 if (CSR_READ_4(sc, TI_PCI_CMDSTAT) & PCIM_CMD_MWIEN) {
1746 switch(cacheline) {
1746 switch (cacheline) {
1747 case 1:
1748 case 4:
1749 case 8:
1750 case 16:
1751 case 32:
1752 case 64:
1753 break;
1754 default:

--- 52 unchanged lines hidden (view full) ---

1807
1808 /* Recommended settings from Tigon manual. */
1809 CSR_WRITE_4(sc, TI_GCR_DMA_WRITECFG, TI_DMA_STATE_THRESH_8W);
1810 CSR_WRITE_4(sc, TI_GCR_DMA_READCFG, TI_DMA_STATE_THRESH_8W);
1811
1812 if (ti_64bitslot_war(sc)) {
1813 printf("ti%d: bios thinks we're in a 64 bit slot, "
1814 "but we aren't", sc->ti_unit);
1747 case 1:
1748 case 4:
1749 case 8:
1750 case 16:
1751 case 32:
1752 case 64:
1753 break;
1754 default:

--- 52 unchanged lines hidden (view full) ---

1807
1808 /* Recommended settings from Tigon manual. */
1809 CSR_WRITE_4(sc, TI_GCR_DMA_WRITECFG, TI_DMA_STATE_THRESH_8W);
1810 CSR_WRITE_4(sc, TI_GCR_DMA_READCFG, TI_DMA_STATE_THRESH_8W);
1811
1812 if (ti_64bitslot_war(sc)) {
1813 printf("ti%d: bios thinks we're in a 64 bit slot, "
1814 "but we aren't", sc->ti_unit);
1815 return(EINVAL);
1815 return (EINVAL);
1816 }
1817
1816 }
1817
1818 return(0);
1818 return (0);
1819}
1820
1821/*
1822 * Initialize the general information block and firmware, and
1823 * start the CPU(s) running.
1824 */
1825static int
1826ti_gibinit(sc)

--- 157 unchanged lines hidden (view full) ---

1984
1985 /* Turn interrupts on. */
1986 CSR_WRITE_4(sc, TI_GCR_MASK_INTRS, 0);
1987 CSR_WRITE_4(sc, TI_MB_HOSTINTR, 0);
1988
1989 /* Start CPU. */
1990 TI_CLRBIT(sc, TI_CPU_STATE, (TI_CPUSTATE_HALT|TI_CPUSTATE_STEP));
1991
1819}
1820
1821/*
1822 * Initialize the general information block and firmware, and
1823 * start the CPU(s) running.
1824 */
1825static int
1826ti_gibinit(sc)

--- 157 unchanged lines hidden (view full) ---

1984
1985 /* Turn interrupts on. */
1986 CSR_WRITE_4(sc, TI_GCR_MASK_INTRS, 0);
1987 CSR_WRITE_4(sc, TI_MB_HOSTINTR, 0);
1988
1989 /* Start CPU. */
1990 TI_CLRBIT(sc, TI_CPU_STATE, (TI_CPUSTATE_HALT|TI_CPUSTATE_STEP));
1991
1992 return(0);
1992 return (0);
1993}
1994
1995/*
1996 * Probe for a Tigon chip. Check the PCI vendor and device IDs
1997 * against our list and return its name if we find a match.
1998 */
1999static int
2000ti_probe(dev)
2001 device_t dev;
2002{
2003 struct ti_type *t;
2004
2005 t = ti_devs;
2006
1993}
1994
1995/*
1996 * Probe for a Tigon chip. Check the PCI vendor and device IDs
1997 * against our list and return its name if we find a match.
1998 */
1999static int
2000ti_probe(dev)
2001 device_t dev;
2002{
2003 struct ti_type *t;
2004
2005 t = ti_devs;
2006
2007 while(t->ti_name != NULL) {
2007 while (t->ti_name != NULL) {
2008 if ((pci_get_vendor(dev) == t->ti_vid) &&
2009 (pci_get_device(dev) == t->ti_did)) {
2010 device_set_desc(dev, t->ti_name);
2008 if ((pci_get_vendor(dev) == t->ti_vid) &&
2009 (pci_get_device(dev) == t->ti_did)) {
2010 device_set_desc(dev, t->ti_name);
2011 return(0);
2011 return (0);
2012 }
2013 t++;
2014 }
2015
2012 }
2013 t++;
2014 }
2015
2016 return(ENXIO);
2016 return (ENXIO);
2017}
2018
2019static int
2020ti_attach(dev)
2021 device_t dev;
2022{
2023 struct ifnet *ifp;
2024 struct ti_softc *sc;

--- 194 unchanged lines hidden (view full) ---

2219 ether_ifdetach(ifp);
2220 goto fail;
2221 }
2222
2223fail:
2224 if (sc && error)
2225 ti_detach(dev);
2226
2017}
2018
2019static int
2020ti_attach(dev)
2021 device_t dev;
2022{
2023 struct ifnet *ifp;
2024 struct ti_softc *sc;

--- 194 unchanged lines hidden (view full) ---

2219 ether_ifdetach(ifp);
2220 goto fail;
2221 }
2222
2223fail:
2224 if (sc && error)
2225 ti_detach(dev);
2226
2227 return(error);
2227 return (error);
2228}
2229
2230/*
2231 * Shutdown hardware and free up resources. This can be called any
2232 * time after the mutex has been initialized. It is called in both
2233 * the error case in attach and the normal detach case so it needs
2234 * to be careful about only freeing resources that have actually been
2235 * allocated.

--- 33 unchanged lines hidden (view full) ---

2269 contigfree(sc->ti_cdata.ti_jumbo_buf, TI_JMEM, M_DEVBUF);
2270#endif
2271 if (sc->ti_rdata)
2272 contigfree(sc->ti_rdata, sizeof(struct ti_ring_data), M_DEVBUF);
2273
2274 TI_UNLOCK(sc);
2275 mtx_destroy(&sc->ti_mtx);
2276
2228}
2229
2230/*
2231 * Shutdown hardware and free up resources. This can be called any
2232 * time after the mutex has been initialized. It is called in both
2233 * the error case in attach and the normal detach case so it needs
2234 * to be careful about only freeing resources that have actually been
2235 * allocated.

--- 33 unchanged lines hidden (view full) ---

2269 contigfree(sc->ti_cdata.ti_jumbo_buf, TI_JMEM, M_DEVBUF);
2270#endif
2271 if (sc->ti_rdata)
2272 contigfree(sc->ti_rdata, sizeof(struct ti_ring_data), M_DEVBUF);
2273
2274 TI_UNLOCK(sc);
2275 mtx_destroy(&sc->ti_mtx);
2276
2277 return(0);
2277 return (0);
2278}
2279
2280#ifdef TI_JUMBO_HDRSPLIT
2281/*
2282 * If hdr_len is 0, that means that header splitting wasn't done on
2283 * this packet for some reason. The two most likely reasons are that
2284 * the protocol isn't a supported protocol for splitting, or this
2285 * packet had a fragment offset that wasn't 0.

--- 65 unchanged lines hidden (view full) ---

2351{
2352 struct ifnet *ifp;
2353 struct ti_cmd_desc cmd;
2354
2355 TI_LOCK_ASSERT(sc);
2356
2357 ifp = &sc->arpcom.ac_if;
2358
2278}
2279
2280#ifdef TI_JUMBO_HDRSPLIT
2281/*
2282 * If hdr_len is 0, that means that header splitting wasn't done on
2283 * this packet for some reason. The two most likely reasons are that
2284 * the protocol isn't a supported protocol for splitting, or this
2285 * packet had a fragment offset that wasn't 0.

--- 65 unchanged lines hidden (view full) ---

2351{
2352 struct ifnet *ifp;
2353 struct ti_cmd_desc cmd;
2354
2355 TI_LOCK_ASSERT(sc);
2356
2357 ifp = &sc->arpcom.ac_if;
2358
2359 while(sc->ti_rx_saved_considx != sc->ti_return_prodidx.ti_idx) {
2359 while (sc->ti_rx_saved_considx != sc->ti_return_prodidx.ti_idx) {
2360 struct ti_rx_desc *cur_rx;
2361 u_int32_t rxidx;
2362 struct mbuf *m = NULL;
2363 u_int16_t vlan_tag = 0;
2364 int have_tag = 0;
2365
2366 cur_rx =
2367 &sc->ti_rdata->ti_rx_return_ring[sc->ti_rx_saved_considx];

--- 270 unchanged lines hidden (view full) ---

2638 f->ti_vlan_tag = 0;
2639 }
2640
2641 /*
2642 * Sanity check: avoid coming within 16 descriptors
2643 * of the end of the ring.
2644 */
2645 if ((TI_TX_RING_CNT - (sc->ti_txcnt + cnt)) < 16)
2360 struct ti_rx_desc *cur_rx;
2361 u_int32_t rxidx;
2362 struct mbuf *m = NULL;
2363 u_int16_t vlan_tag = 0;
2364 int have_tag = 0;
2365
2366 cur_rx =
2367 &sc->ti_rdata->ti_rx_return_ring[sc->ti_rx_saved_considx];

--- 270 unchanged lines hidden (view full) ---

2638 f->ti_vlan_tag = 0;
2639 }
2640
2641 /*
2642 * Sanity check: avoid coming within 16 descriptors
2643 * of the end of the ring.
2644 */
2645 if ((TI_TX_RING_CNT - (sc->ti_txcnt + cnt)) < 16)
2646 return(ENOBUFS);
2646 return (ENOBUFS);
2647 cur = frag;
2648 TI_INC(frag, TI_TX_RING_CNT);
2649 cnt++;
2650 }
2651 }
2652
2653 if (m != NULL)
2647 cur = frag;
2648 TI_INC(frag, TI_TX_RING_CNT);
2649 cnt++;
2650 }
2651 }
2652
2653 if (m != NULL)
2654 return(ENOBUFS);
2654 return (ENOBUFS);
2655
2656 if (frag == sc->ti_tx_saved_considx)
2655
2656 if (frag == sc->ti_tx_saved_considx)
2657 return(ENOBUFS);
2657 return (ENOBUFS);
2658
2659 if (sc->ti_hwrev == TI_HWREV_TIGON)
2660 sc->ti_rdata->ti_tx_ring_nic[cur % 128].ti_flags |=
2661 TI_BDFLAG_END;
2662 else
2663 sc->ti_rdata->ti_tx_ring[cur].ti_flags |= TI_BDFLAG_END;
2664 sc->ti_cdata.ti_tx_chain[cur] = m_head;
2665 sc->ti_txcnt += cnt;
2666
2667 *txidx = frag;
2668
2658
2659 if (sc->ti_hwrev == TI_HWREV_TIGON)
2660 sc->ti_rdata->ti_tx_ring_nic[cur % 128].ti_flags |=
2661 TI_BDFLAG_END;
2662 else
2663 sc->ti_rdata->ti_tx_ring[cur].ti_flags |= TI_BDFLAG_END;
2664 sc->ti_cdata.ti_tx_chain[cur] = m_head;
2665 sc->ti_txcnt += cnt;
2666
2667 *txidx = frag;
2668
2669 return(0);
2669 return (0);
2670}
2671
2672/*
2673 * Main transmit routine. To avoid having to do mbuf copies, we put pointers
2674 * to the mbuf data regions directly in the transmit descriptors.
2675 */
2676static void
2677ti_start(ifp)
2678 struct ifnet *ifp;
2679{
2680 struct ti_softc *sc;
2681 struct mbuf *m_head = NULL;
2682 u_int32_t prodidx = 0;
2683
2684 sc = ifp->if_softc;
2685 TI_LOCK(sc);
2686
2687 prodidx = CSR_READ_4(sc, TI_MB_SENDPROD_IDX);
2688
2670}
2671
2672/*
2673 * Main transmit routine. To avoid having to do mbuf copies, we put pointers
2674 * to the mbuf data regions directly in the transmit descriptors.
2675 */
2676static void
2677ti_start(ifp)
2678 struct ifnet *ifp;
2679{
2680 struct ti_softc *sc;
2681 struct mbuf *m_head = NULL;
2682 u_int32_t prodidx = 0;
2683
2684 sc = ifp->if_softc;
2685 TI_LOCK(sc);
2686
2687 prodidx = CSR_READ_4(sc, TI_MB_SENDPROD_IDX);
2688
2689 while(sc->ti_cdata.ti_tx_chain[prodidx] == NULL) {
2689 while (sc->ti_cdata.ti_tx_chain[prodidx] == NULL) {
2690 IF_DEQUEUE(&ifp->if_snd, m_head);
2691 if (m_head == NULL)
2692 break;
2693
2694 /*
2695 * XXX
2696 * safety overkill. If this is a fragmented packet chain
2697 * with delayed TCP/UDP checksums, then only encapsulate

--- 153 unchanged lines hidden (view full) ---

2851 struct ifmedia *ifm;
2852 struct ti_cmd_desc cmd;
2853 u_int32_t flowctl;
2854
2855 sc = ifp->if_softc;
2856 ifm = &sc->ifmedia;
2857
2858 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
2690 IF_DEQUEUE(&ifp->if_snd, m_head);
2691 if (m_head == NULL)
2692 break;
2693
2694 /*
2695 * XXX
2696 * safety overkill. If this is a fragmented packet chain
2697 * with delayed TCP/UDP checksums, then only encapsulate

--- 153 unchanged lines hidden (view full) ---

2851 struct ifmedia *ifm;
2852 struct ti_cmd_desc cmd;
2853 u_int32_t flowctl;
2854
2855 sc = ifp->if_softc;
2856 ifm = &sc->ifmedia;
2857
2858 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
2859 return(EINVAL);
2859 return (EINVAL);
2860
2861 flowctl = 0;
2862
2860
2861 flowctl = 0;
2862
2863 switch(IFM_SUBTYPE(ifm->ifm_media)) {
2863 switch (IFM_SUBTYPE(ifm->ifm_media)) {
2864 case IFM_AUTO:
2865 /*
2866 * Transmit flow control doesn't work on the Tigon 1.
2867 */
2868 flowctl = TI_GLNK_RX_FLOWCTL_Y;
2869
2870 /*
2871 * Transmit flow control can also cause problems on the

--- 62 unchanged lines hidden (view full) ---

2934 } else {
2935 TI_SETBIT(sc, TI_GCR_LINK, TI_LNK_HALF_DUPLEX);
2936 }
2937 TI_DO_CMD(TI_CMD_LINK_NEGOTIATION,
2938 TI_CMD_CODE_NEGOTIATE_10_100, 0);
2939 break;
2940 }
2941
2864 case IFM_AUTO:
2865 /*
2866 * Transmit flow control doesn't work on the Tigon 1.
2867 */
2868 flowctl = TI_GLNK_RX_FLOWCTL_Y;
2869
2870 /*
2871 * Transmit flow control can also cause problems on the

--- 62 unchanged lines hidden (view full) ---

2934 } else {
2935 TI_SETBIT(sc, TI_GCR_LINK, TI_LNK_HALF_DUPLEX);
2936 }
2937 TI_DO_CMD(TI_CMD_LINK_NEGOTIATION,
2938 TI_CMD_CODE_NEGOTIATE_10_100, 0);
2939 break;
2940 }
2941
2942 return(0);
2942 return (0);
2943}
2944
2945/*
2946 * Report current media status.
2947 */
2948static void
2949ti_ifmedia_sts(ifp, ifmr)
2950 struct ifnet *ifp;

--- 50 unchanged lines hidden (view full) ---

3001{
3002 struct ti_softc *sc = ifp->if_softc;
3003 struct ifreq *ifr = (struct ifreq *) data;
3004 int mask, error = 0;
3005 struct ti_cmd_desc cmd;
3006
3007 TI_LOCK(sc);
3008
2943}
2944
2945/*
2946 * Report current media status.
2947 */
2948static void
2949ti_ifmedia_sts(ifp, ifmr)
2950 struct ifnet *ifp;

--- 50 unchanged lines hidden (view full) ---

3001{
3002 struct ti_softc *sc = ifp->if_softc;
3003 struct ifreq *ifr = (struct ifreq *) data;
3004 int mask, error = 0;
3005 struct ti_cmd_desc cmd;
3006
3007 TI_LOCK(sc);
3008
3009 switch(command) {
3009 switch (command) {
3010 case SIOCSIFMTU:
3011 if (ifr->ifr_mtu > TI_JUMBO_MTU)
3012 error = EINVAL;
3013 else {
3014 ifp->if_mtu = ifr->ifr_mtu;
3015 ti_init(sc);
3016 }
3017 break;

--- 52 unchanged lines hidden (view full) ---

3070 break;
3071 default:
3072 error = ether_ioctl(ifp, command, data);
3073 break;
3074 }
3075
3076 TI_UNLOCK(sc);
3077
3010 case SIOCSIFMTU:
3011 if (ifr->ifr_mtu > TI_JUMBO_MTU)
3012 error = EINVAL;
3013 else {
3014 ifp->if_mtu = ifr->ifr_mtu;
3015 ti_init(sc);
3016 }
3017 break;

--- 52 unchanged lines hidden (view full) ---

3070 break;
3071 default:
3072 error = ether_ioctl(ifp, command, data);
3073 break;
3074 }
3075
3076 TI_UNLOCK(sc);
3077
3078 return(error);
3078 return (error);
3079}
3080
3081static int
3082ti_open(struct cdev *dev, int flags, int fmt, struct thread *td)
3083{
3084 struct ti_softc *sc;
3085
3086 sc = dev->si_drv1;
3087 if (sc == NULL)
3079}
3080
3081static int
3082ti_open(struct cdev *dev, int flags, int fmt, struct thread *td)
3083{
3084 struct ti_softc *sc;
3085
3086 sc = dev->si_drv1;
3087 if (sc == NULL)
3088 return(ENODEV);
3088 return (ENODEV);
3089
3090 TI_LOCK(sc);
3091 sc->ti_flags |= TI_FLAG_DEBUGING;
3092 TI_UNLOCK(sc);
3093
3089
3090 TI_LOCK(sc);
3091 sc->ti_flags |= TI_FLAG_DEBUGING;
3092 TI_UNLOCK(sc);
3093
3094 return(0);
3094 return (0);
3095}
3096
3097static int
3098ti_close(struct cdev *dev, int flag, int fmt, struct thread *td)
3099{
3100 struct ti_softc *sc;
3101
3102 sc = dev->si_drv1;
3103 if (sc == NULL)
3095}
3096
3097static int
3098ti_close(struct cdev *dev, int flag, int fmt, struct thread *td)
3099{
3100 struct ti_softc *sc;
3101
3102 sc = dev->si_drv1;
3103 if (sc == NULL)
3104 return(ENODEV);
3104 return (ENODEV);
3105
3106 TI_LOCK(sc);
3107 sc->ti_flags &= ~TI_FLAG_DEBUGING;
3108 TI_UNLOCK(sc);
3109
3105
3106 TI_LOCK(sc);
3107 sc->ti_flags &= ~TI_FLAG_DEBUGING;
3108 TI_UNLOCK(sc);
3109
3110 return(0);
3110 return (0);
3111}
3112
3113/*
3114 * This ioctl routine goes along with the Tigon character device.
3115 */
3116static int
3117ti_ioctl2(struct cdev *dev, u_long cmd, caddr_t addr, int flag, struct thread *td)
3118{
3119 int error;
3120 struct ti_softc *sc;
3121
3122 sc = dev->si_drv1;
3123 if (sc == NULL)
3111}
3112
3113/*
3114 * This ioctl routine goes along with the Tigon character device.
3115 */
3116static int
3117ti_ioctl2(struct cdev *dev, u_long cmd, caddr_t addr, int flag, struct thread *td)
3118{
3119 int error;
3120 struct ti_softc *sc;
3121
3122 sc = dev->si_drv1;
3123 if (sc == NULL)
3124 return(ENODEV);
3124 return (ENODEV);
3125
3126 error = 0;
3127
3125
3126 error = 0;
3127
3128 switch(cmd) {
3128 switch (cmd) {
3129 case TIIOCGETSTATS:
3130 {
3131 struct ti_stats *outstats;
3132
3133 outstats = (struct ti_stats *)addr;
3134
3135 bcopy(&sc->ti_rdata->ti_info.ti_stats, outstats,
3136 sizeof(struct ti_stats));

--- 229 unchanged lines hidden (view full) ---

3366 }
3367
3368 break;
3369 }
3370 default:
3371 error = ENOTTY;
3372 break;
3373 }
3129 case TIIOCGETSTATS:
3130 {
3131 struct ti_stats *outstats;
3132
3133 outstats = (struct ti_stats *)addr;
3134
3135 bcopy(&sc->ti_rdata->ti_info.ti_stats, outstats,
3136 sizeof(struct ti_stats));

--- 229 unchanged lines hidden (view full) ---

3366 }
3367
3368 break;
3369 }
3370 default:
3371 error = ENOTTY;
3372 break;
3373 }
3374 return(error);
3374 return (error);
3375}
3376
3377static void
3378ti_watchdog(ifp)
3379 struct ifnet *ifp;
3380{
3381 struct ti_softc *sc;
3382

--- 84 unchanged lines hidden ---
3375}
3376
3377static void
3378ti_watchdog(ifp)
3379 struct ifnet *ifp;
3380{
3381 struct ti_softc *sc;
3382

--- 84 unchanged lines hidden ---