1/*- 2 * Copyright (c) 1997, 1998, 1999 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 63 unchanged lines hidden (view full) --- 72 * - Raymond Lee of Netgear, for providing a pair of Netgear 73 * GA620 Tigon 2 boards for testing 74 * - Ulf Zimmermann, for bringing the GA260 to my attention and 75 * convincing me to write this driver. 76 * - Andrew Gallatin for providing FreeBSD/Alpha support. 77 */ 78 79#include <sys/cdefs.h> |
80__FBSDID("$FreeBSD: head/sys/dev/ti/if_ti.c 143903 2005-03-21 07:17:27Z scottl $"); |
81 82#include "opt_ti.h" 83 84#include <sys/param.h> 85#include <sys/systm.h> 86#include <sys/sockio.h> 87#include <sys/mbuf.h> 88#include <sys/malloc.h> --- 1734 unchanged lines hidden (view full) --- 1823 printf("ti%d: bios thinks we're in a 64 bit slot, " 1824 "but we aren't", sc->ti_unit); 1825 return (EINVAL); 1826 } 1827 1828 return (0); 1829} 1830 |
1831#define TI_RD_OFF(x) offsetof(struct ti_ring_data, x) 1832 |
1833/* 1834 * Initialize the general information block and firmware, and 1835 * start the CPU(s) running. 1836 */ 1837static int 1838ti_gibinit(sc) 1839 struct ti_softc *sc; 1840{ 1841 struct ti_rcb *rcb; 1842 int i; 1843 struct ifnet *ifp; |
1844 uint32_t rdphys; |
1845 1846 ifp = &sc->arpcom.ac_if; |
1847 rdphys = sc->ti_rdata_phys; |
1848 1849 /* Disable interrupts for now. */ 1850 CSR_WRITE_4(sc, TI_MB_HOSTINTR, 1); 1851 |
1852 /* 1853 * Tell the chip where to find the general information block. 1854 * While this struct could go into >4GB memory, we allocate it in a 1855 * single slab with the other descriptors, and those don't seem to 1856 * support being located in a 64-bit region. 1857 */ |
1858 CSR_WRITE_4(sc, TI_GCR_GENINFO_HI, 0); |
1859 CSR_WRITE_4(sc, TI_GCR_GENINFO_LO, rdphys + TI_RD_OFF(ti_info)); |
1860 1861 /* Load the firmware into SRAM. */ 1862 ti_loadfw(sc); 1863 1864 /* Set up the contents of the general info and ring control blocks. */ 1865 1866 /* Set up the event ring and producer pointer. */ 1867 rcb = &sc->ti_rdata->ti_info.ti_ev_rcb; 1868 |
1869 TI_HOSTADDR(rcb->ti_hostaddr) = rdphys + TI_RD_OFF(ti_event_ring); |
1870 rcb->ti_flags = 0; 1871 TI_HOSTADDR(sc->ti_rdata->ti_info.ti_ev_prodidx_ptr) = |
1872 rdphys + TI_RD_OFF(ti_ev_prodidx_r); |
1873 sc->ti_ev_prodidx.ti_idx = 0; 1874 CSR_WRITE_4(sc, TI_GCR_EVENTCONS_IDX, 0); 1875 sc->ti_ev_saved_considx = 0; 1876 1877 /* Set up the command ring and producer mailbox. */ 1878 rcb = &sc->ti_rdata->ti_info.ti_cmd_rcb; 1879 1880 sc->ti_rdata->ti_cmd_ring = --- 9 unchanged lines hidden (view full) --- 1890 sc->ti_cmd_saved_prodidx = 0; 1891 1892 /* 1893 * Assign the address of the stats refresh buffer. 1894 * We re-use the current stats buffer for this to 1895 * conserve memory. 1896 */ 1897 TI_HOSTADDR(sc->ti_rdata->ti_info.ti_refresh_stats_ptr) = |
1898 rdphys + TI_RD_OFF(ti_info.ti_stats); |
1899 1900 /* Set up the standard receive ring. */ 1901 rcb = &sc->ti_rdata->ti_info.ti_std_rx_rcb; |
1902 TI_HOSTADDR(rcb->ti_hostaddr) = rdphys + TI_RD_OFF(ti_rx_std_ring); |
1903 rcb->ti_max_len = TI_FRAMELEN; 1904 rcb->ti_flags = 0; 1905 if (sc->arpcom.ac_if.if_hwassist) 1906 rcb->ti_flags |= TI_RCB_FLAG_TCP_UDP_CKSUM | 1907 TI_RCB_FLAG_IP_CKSUM | TI_RCB_FLAG_NO_PHDR_CKSUM; 1908 rcb->ti_flags |= TI_RCB_FLAG_VLAN_ASSIST; 1909 1910 /* Set up the jumbo receive ring. */ 1911 rcb = &sc->ti_rdata->ti_info.ti_jumbo_rx_rcb; |
1912 TI_HOSTADDR(rcb->ti_hostaddr) = rdphys + TI_RD_OFF(ti_rx_jumbo_ring); |
1913 1914#ifdef TI_PRIVATE_JUMBOS 1915 rcb->ti_max_len = TI_JUMBO_FRAMELEN; 1916 rcb->ti_flags = 0; 1917#else 1918 rcb->ti_max_len = PAGE_SIZE; 1919 rcb->ti_flags = TI_RCB_FLAG_USE_EXT_RX_BD; 1920#endif 1921 if (sc->arpcom.ac_if.if_hwassist) 1922 rcb->ti_flags |= TI_RCB_FLAG_TCP_UDP_CKSUM | 1923 TI_RCB_FLAG_IP_CKSUM | TI_RCB_FLAG_NO_PHDR_CKSUM; 1924 rcb->ti_flags |= TI_RCB_FLAG_VLAN_ASSIST; 1925 1926 /* 1927 * Set up the mini ring. Only activated on the 1928 * Tigon 2 but the slot in the config block is 1929 * still there on the Tigon 1. 1930 */ 1931 rcb = &sc->ti_rdata->ti_info.ti_mini_rx_rcb; |
1932 TI_HOSTADDR(rcb->ti_hostaddr) = rdphys + TI_RD_OFF(ti_rx_mini_ring); |
1933 rcb->ti_max_len = MHLEN - ETHER_ALIGN; 1934 if (sc->ti_hwrev == TI_HWREV_TIGON) 1935 rcb->ti_flags = TI_RCB_FLAG_RING_DISABLED; 1936 else 1937 rcb->ti_flags = 0; 1938 if (sc->arpcom.ac_if.if_hwassist) 1939 rcb->ti_flags |= TI_RCB_FLAG_TCP_UDP_CKSUM | 1940 TI_RCB_FLAG_IP_CKSUM | TI_RCB_FLAG_NO_PHDR_CKSUM; 1941 rcb->ti_flags |= TI_RCB_FLAG_VLAN_ASSIST; 1942 1943 /* 1944 * Set up the receive return ring. 1945 */ 1946 rcb = &sc->ti_rdata->ti_info.ti_return_rcb; |
1947 TI_HOSTADDR(rcb->ti_hostaddr) = rdphys + TI_RD_OFF(ti_rx_return_ring); |
1948 rcb->ti_flags = 0; 1949 rcb->ti_max_len = TI_RETURN_RING_CNT; 1950 TI_HOSTADDR(sc->ti_rdata->ti_info.ti_return_prodidx_ptr) = |
1951 rdphys + TI_RD_OFF(ti_return_prodidx_r); |
1952 1953 /* 1954 * Set up the tx ring. Note: for the Tigon 2, we have the option 1955 * of putting the transmit ring in the host's address space and 1956 * letting the chip DMA it instead of leaving the ring in the NIC's 1957 * memory and accessing it through the shared memory region. We 1958 * do this for the Tigon 2, but it doesn't work on the Tigon 1, 1959 * so we have to revert to the shared memory scheme if we detect --- 14 unchanged lines hidden (view full) --- 1974 rcb->ti_flags |= TI_RCB_FLAG_VLAN_ASSIST; 1975 if (sc->arpcom.ac_if.if_hwassist) 1976 rcb->ti_flags |= TI_RCB_FLAG_TCP_UDP_CKSUM | 1977 TI_RCB_FLAG_IP_CKSUM | TI_RCB_FLAG_NO_PHDR_CKSUM; 1978 rcb->ti_max_len = TI_TX_RING_CNT; 1979 if (sc->ti_hwrev == TI_HWREV_TIGON) 1980 TI_HOSTADDR(rcb->ti_hostaddr) = TI_TX_RING_BASE; 1981 else |
1982 TI_HOSTADDR(rcb->ti_hostaddr) = rdphys + TI_RD_OFF(ti_tx_ring); |
1983 TI_HOSTADDR(sc->ti_rdata->ti_info.ti_tx_considx_ptr) = |
1984 rdphys + TI_RD_OFF(ti_tx_considx_r); |
1985 1986 /* Set up tuneables */ 1987#if 0 1988 if (ifp->if_mtu > (ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN)) 1989 CSR_WRITE_4(sc, TI_GCR_RX_COAL_TICKS, 1990 (sc->ti_rx_coal_ticks / 10)); 1991 else 1992#endif --- 9 unchanged lines hidden (view full) --- 2002 CSR_WRITE_4(sc, TI_MB_HOSTINTR, 0); 2003 2004 /* Start CPU. */ 2005 TI_CLRBIT(sc, TI_CPU_STATE, (TI_CPUSTATE_HALT|TI_CPUSTATE_STEP)); 2006 2007 return (0); 2008} 2009 |
2010static void 2011ti_rdata_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error) 2012{ 2013 struct ti_softc *sc; 2014 2015 sc = arg; 2016 if (error || nseg != 1) 2017 return; 2018 2019 /* 2020 * All of the Tigon data structures need to live at <4GB. This 2021 * cast is fine since busdma was told about this constraint. 2022 */ 2023 sc->ti_rdata_phys = (uint32_t)segs[0].ds_addr; 2024 return; 2025} 2026 |
2027/* 2028 * Probe for a Tigon chip. Check the PCI vendor and device IDs 2029 * against our list and return its name if we find a match. 2030 */ 2031static int 2032ti_probe(dev) 2033 device_t dev; 2034{ --- 90 unchanged lines hidden (view full) --- 2125 if (ti_read_eeprom(sc, (caddr_t)&sc->arpcom.ac_enaddr, 2126 TI_EE_MAC_OFFSET + 2, ETHER_ADDR_LEN)) { 2127 printf("ti%d: failed to read station address\n", unit); 2128 error = ENXIO; 2129 goto fail; 2130 } 2131 2132 /* Allocate the general information block and ring buffers. */ |
2133 if (bus_dma_tag_create(NULL, /* parent */ 2134 1, 0, /* algnmnt, boundary */ 2135 BUS_SPACE_MAXADDR, /* lowaddr */ 2136 BUS_SPACE_MAXADDR, /* highaddr */ 2137 NULL, NULL, /* filter, filterarg */ 2138 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 2139 0, /* nsegments */ 2140 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ 2141 0, /* flags */ 2142 NULL, NULL, /* lockfunc, lockarg */ 2143 &sc->ti_parent_dmat) != 0) { 2144 printf("ti%d: Failed to allocate parent dmat\n", sc->ti_unit); 2145 error = ENOMEM; 2146 goto fail; 2147 } |
2148 |
2149 if (bus_dma_tag_create(sc->ti_parent_dmat, /* parent */ 2150 PAGE_SIZE, 0, /* algnmnt, boundary */ 2151 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 2152 BUS_SPACE_MAXADDR, /* highaddr */ 2153 NULL, NULL, /* filter, filterarg */ 2154 sizeof(struct ti_ring_data), /* maxsize */ 2155 1, /* nsegments */ 2156 sizeof(struct ti_ring_data), /* maxsegsize */ 2157 0, /* flags */ 2158 NULL, NULL, /* lockfunc, lockarg */ 2159 &sc->ti_rdata_dmat) != 0) { 2160 printf("ti%d: Failed to allocate rdata dmat\n", sc->ti_unit); 2161 error = ENOMEM; |
2162 goto fail; 2163 } 2164 |
2165 if (bus_dmamem_alloc(sc->ti_rdata_dmat, (void**)&sc->ti_rdata, 2166 BUS_DMA_NOWAIT, &sc->ti_rdata_dmamap) != 0) { 2167 printf("ti%d: Failed to allocate rdata memory\n", sc->ti_unit); 2168 error = ENOMEM; 2169 goto fail; 2170 } 2171 2172 if (bus_dmamap_load(sc->ti_rdata_dmat, sc->ti_rdata_dmamap, 2173 sc->ti_rdata, sizeof(struct ti_ring_data), 2174 ti_rdata_cb, sc, BUS_DMA_NOWAIT) != 0) { 2175 printf("ti%d: Failed to load rdata segments\n", sc->ti_unit); 2176 error = ENOMEM; 2177 goto fail; 2178 } 2179 |
2180 bzero(sc->ti_rdata, sizeof(struct ti_ring_data)); 2181 2182 /* Try to allocate memory for jumbo buffers. */ 2183#ifdef TI_PRIVATE_JUMBOS 2184 if (ti_alloc_jumbo_mem(sc)) { 2185 printf("ti%d: jumbo buffer allocation failed\n", sc->ti_unit); 2186 error = ENXIO; 2187 goto fail; --- 127 unchanged lines hidden (view full) --- 2315 /* These should only be active if attach succeeded */ 2316 if (device_is_attached(dev)) { 2317 ti_stop(sc); 2318 ether_ifdetach(ifp); 2319 bus_generic_detach(dev); 2320 } 2321 ifmedia_removeall(&sc->ifmedia); 2322 |
2323 if (sc->ti_rdata) 2324 bus_dmamem_free(sc->ti_rdata_dmat, sc->ti_rdata, 2325 sc->ti_rdata_dmamap); 2326 if (sc->ti_rdata_dmat) 2327 bus_dma_tag_destroy(sc->ti_rdata_dmat); 2328 if (sc->ti_parent_dmat) 2329 bus_dma_tag_destroy(sc->ti_parent_dmat); |
2330 if (sc->ti_intrhand) 2331 bus_teardown_intr(dev, sc->ti_irq, sc->ti_intrhand); 2332 if (sc->ti_irq) 2333 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->ti_irq); 2334 if (sc->ti_res) { 2335 bus_release_resource(dev, SYS_RES_MEMORY, TI_PCI_LOMEM, 2336 sc->ti_res); 2337 } --- 1200 unchanged lines hidden --- |