1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * Copyright (C) 2016 Michal Simek <michal.simek@amd.com> 4 * Copyright (C) 2015 Nathan Rossi <nathan@nathanrossi.com> 5 * 6 * The following Boot Header format/structures and values are defined in the 7 * following documents: 8 * * ug1085 ZynqMP TRM doc v1.4 (Chapter 11, Table 11-4) 9 * * ug1137 ZynqMP Software Developer Guide v6.0 (Chapter 16) 10 */ 11 12#ifndef _ZYNQMPIMAGE_H_ 13#define _ZYNQMPIMAGE_H_ 14 15#include <stdint.h> 16 17#define HEADER_INTERRUPT_DEFAULT (cpu_to_le32(0xeafffffe)) 18#define HEADER_REGINIT_NULL (cpu_to_le32(0xffffffff)) 19#define HEADER_WIDTHDETECTION (cpu_to_le32(0xaa995566)) 20#define HEADER_IMAGEIDENTIFIER (cpu_to_le32(0x584c4e58)) 21#define HEADER_CPU_SELECT_MASK (0x3 << 10) 22#define HEADER_CPU_SELECT_R5_SINGLE (0x0 << 10) 23#define HEADER_CPU_SELECT_A53_32BIT (0x1 << 10) 24#define HEADER_CPU_SELECT_A53_64BIT (0x2 << 10) 25#define HEADER_CPU_SELECT_R5_DUAL (0x3 << 10) 26 27enum { 28 ENCRYPTION_EFUSE = 0xa5c3c5a3, 29 ENCRYPTION_OEFUSE = 0xa5c3c5a7, 30 ENCRYPTION_BBRAM = 0x3a5c3c5a, 31 ENCRYPTION_OBBRAM = 0xa35c7ca5, 32 ENCRYPTION_NONE = 0x0, 33}; 34 35struct zynqmp_reginit { 36 uint32_t address; 37 uint32_t data; 38}; 39 40#define HEADER_INTERRUPT_VECTORS 8 41#define HEADER_REGINITS 256 42 43struct image_header_table { 44 uint32_t version; /* 0x00 */ 45 uint32_t nr_parts; /* 0x04 */ 46 uint32_t partition_header_offset; /* 0x08, divided by 4 */ 47 uint32_t image_header_offset; /* 0x0c, divided by 4 */ 48 uint32_t auth_certificate_offset; /* 0x10 */ 49 uint32_t boot_device; /* 0x14 */ 50 uint32_t __reserved1[9]; /* 0x18 - 0x38 */ 51 uint32_t checksum; /* 0x3c */ 52}; 53 54struct image_header { 55 uint32_t next_image_header_offset; /* 0x00 */ 56 uint32_t corresponding_partition_header; /* 0x04 */ 57 uint32_t __reserved1; /* 0x08 */ 58 uint32_t partition_count; /* 0x0c */ 59 uint32_t image_name[]; /* 0x10 */ 60}; 61 62#define PART_ATTR_VEC_LOCATION 0x800000 63#define PART_ATTR_BS_BLOCK_SIZE_MASK 0x700000 64#define PART_ATTR_BS_BLOCK_SIZE_DEFAULT 0x000000 65#define PART_ATTR_BS_BLOCK_SIZE_8MB 0x400000 66#define PART_ATTR_BIG_ENDIAN 0x040000 67#define PART_ATTR_PART_OWNER_MASK 0x030000 68#define PART_ATTR_PART_OWNER_FSBL 0x000000 69#define PART_ATTR_PART_OWNER_UBOOT 0x010000 70#define PART_ATTR_RSA_SIG 0x008000 71#define PART_ATTR_CHECKSUM_MASK 0x007000 72#define PART_ATTR_CHECKSUM_NONE 0x000000 73#define PART_ATTR_CHECKSUM_MD5 0x001000 74#define PART_ATTR_CHECKSUM_SHA2 0x002000 75#define PART_ATTR_CHECKSUM_SHA3 0x003000 76#define PART_ATTR_DEST_CPU_SHIFT 8 77#define PART_ATTR_DEST_CPU_MASK 0x000f00 78#define PART_ATTR_DEST_CPU_NONE 0x000000 79#define PART_ATTR_DEST_CPU_A53_0 0x000100 80#define PART_ATTR_DEST_CPU_A53_1 0x000200 81#define PART_ATTR_DEST_CPU_A53_2 0x000300 82#define PART_ATTR_DEST_CPU_A53_3 0x000400 83#define PART_ATTR_DEST_CPU_R5_0 0x000500 84#define PART_ATTR_DEST_CPU_R5_1 0x000600 85#define PART_ATTR_DEST_CPU_R5_L 0x000700 86#define PART_ATTR_DEST_CPU_PMU 0x000800 87#define PART_ATTR_ENCRYPTED 0x000080 88#define PART_ATTR_DEST_DEVICE_SHIFT 4 89#define PART_ATTR_DEST_DEVICE_MASK 0x000070 90#define PART_ATTR_DEST_DEVICE_NONE 0x000000 91#define PART_ATTR_DEST_DEVICE_PS 0x000010 92#define PART_ATTR_DEST_DEVICE_PL 0x000020 93#define PART_ATTR_DEST_DEVICE_PMU 0x000030 94#define PART_ATTR_DEST_DEVICE_XIP 0x000040 95#define PART_ATTR_A53_EXEC_AARCH32 0x000008 96#define PART_ATTR_TARGET_EL_SHIFT 1 97#define PART_ATTR_TARGET_EL_MASK 0x000006 98#define PART_ATTR_TZ_SECURE 0x000001 99 100static const char *dest_cpus[0x10] = { 101 "none", "a5x-0", "a5x-1", "a5x-2", "a5x-3", "r5-0", "r5-1", 102 "r5-lockstep", "pmu", "unknown", "unknown", "unknown", "unknown", 103 "unknown", "unknown", "unknown" 104}; 105 106struct partition_header { 107 uint32_t len_enc; /* 0x00, divided by 4 */ 108 uint32_t len_unenc; /* 0x04, divided by 4 */ 109 uint32_t len; /* 0x08, divided by 4 */ 110 uint32_t next_partition_offset; /* 0x0c */ 111 uint64_t entry_point; /* 0x10 */ 112 uint64_t load_address; /* 0x18 */ 113 uint32_t offset; /* 0x20, divided by 4 */ 114 uint32_t attributes; /* 0x24 */ 115 uint32_t __reserved1; /* 0x28 */ 116 uint32_t checksum_offset; /* 0x2c, divided by 4 */ 117 uint32_t __reserved2; /* 0x30 */ 118 uint32_t auth_certificate_offset; /* 0x34 */ 119 uint32_t __reserved3; /* 0x38 */ 120 uint32_t checksum; /* 0x3c */ 121}; 122 123struct zynqmp_header { 124 uint32_t interrupt_vectors[HEADER_INTERRUPT_VECTORS]; /* 0x0 */ 125 uint32_t width_detection; /* 0x20 */ 126 uint32_t image_identifier; /* 0x24 */ 127 uint32_t encryption; /* 0x28 */ 128 uint32_t image_load; /* 0x2c */ 129 uint32_t image_offset; /* 0x30 */ 130 uint32_t pfw_image_length; /* 0x34 */ 131 uint32_t total_pfw_image_length; /* 0x38 */ 132 uint32_t image_size; /* 0x3c */ 133 uint32_t image_stored_size; /* 0x40 */ 134 uint32_t image_attributes; /* 0x44 */ 135 uint32_t checksum; /* 0x48 */ 136 uint32_t __reserved1[19]; /* 0x4c */ 137 uint32_t image_header_table_offset; /* 0x98 */ 138 uint32_t __reserved2[7]; /* 0x9c */ 139 struct zynqmp_reginit register_init[HEADER_REGINITS]; /* 0xb8 */ 140 uint32_t __reserved4[66]; /* 0x9c0 */ 141}; 142 143void zynqmpimage_default_header(struct zynqmp_header *ptr); 144void zynqmpimage_print_header(const void *ptr, struct image_tool_params *params); 145 146static inline struct image_header_table * 147zynqmp_get_iht(const struct zynqmp_header *zynqhdr) 148{ 149 if (!zynqhdr->image_header_table_offset) 150 return NULL; 151 return (struct image_header_table *)((void *)zynqhdr + zynqhdr->image_header_table_offset); 152} 153 154static inline void *zynqmp_get_offset(const struct zynqmp_header *zynqhdr, 155 uint32_t offset) 156{ 157 uint32_t offset_cpu = le32_to_cpu(offset); 158 159 if (!offset_cpu) 160 return NULL; 161 return (void *)zynqhdr + offset_cpu * 4; 162} 163 164static inline struct partition_header * 165zynqmp_part_first(const struct zynqmp_header *zynqhdr) 166{ 167 struct image_header_table *iht; 168 169 iht = zynqmp_get_iht(zynqhdr); 170 if (!iht) 171 return NULL; 172 173 return zynqmp_get_offset(zynqhdr, iht->partition_header_offset); 174} 175 176static inline struct partition_header * 177zynqmp_part_next(const struct zynqmp_header *zynqhdr, 178 const struct partition_header *ph) 179{ 180 return zynqmp_get_offset(zynqhdr, ph->next_partition_offset); 181} 182 183static inline size_t zynqmp_part_count(const struct zynqmp_header *zynqhdr) 184{ 185 struct image_header_table *iht; 186 187 iht = zynqmp_get_iht(zynqhdr); 188 if (!iht) 189 return 0; 190 191 return le32_to_cpu(iht->nr_parts); 192} 193 194#define _for_each_zynqmp_part(_zynqhdr, _iter, _ph, _start, _count) \ 195 for (_iter = 0, _ph = _start; \ 196 _iter < (_count) && _ph; \ 197 _iter++, _ph = zynqmp_part_next(_zynqhdr, _ph)) 198 199#define for_each_zynqmp_part(_zynqhdr, _iter, _ph) \ 200 _for_each_zynqmp_part(_zynqhdr, _iter, _ph, \ 201 zynqmp_part_first(_zynqhdr), \ 202 zynqmp_part_count(_zynqhdr)) 203 204static inline struct partition_header * 205zynqmp_part_in_image_first(const struct zynqmp_header *zynqhdr, 206 const struct image_header *ih) 207{ 208 return zynqmp_get_offset(zynqhdr, ih->corresponding_partition_header); 209} 210 211static inline size_t zynqmp_part_in_image_count(const struct image_header *ih) 212{ 213 return le32_to_cpu(ih->partition_count); 214} 215 216#define for_each_zynqmp_part_in_image(_zynqhdr, _iter, _ph, _ih) \ 217 _for_each_zynqmp_part(_zynqhdr, _iter, _ph, \ 218 zynqmp_part_in_image_first(_zynqhdr, _ih), \ 219 zynqmp_part_in_image_count(_ih)) 220 221static inline struct image_header * 222zynqmp_image_first(const struct zynqmp_header *zynqhdr) 223{ 224 struct image_header_table *iht; 225 226 iht = zynqmp_get_iht(zynqhdr); 227 if (!iht) 228 return NULL; 229 230 return zynqmp_get_offset(zynqhdr, iht->image_header_offset); 231} 232 233static inline struct image_header * 234zynqmp_image_next(const struct zynqmp_header *zynqhdr, 235 const struct image_header *ih) 236{ 237 return zynqmp_get_offset(zynqhdr, ih->next_image_header_offset); 238} 239 240#define for_each_zynqmp_image(_zynqhdr, _ih) \ 241 for (_ih = zynqmp_image_first(_zynqhdr); \ 242 _ih; \ 243 _ih = zynqmp_image_next(_zynqhdr, _ih)) 244 245#endif /* _ZYNQMPIMAGE_H_ */ 246