1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2017-2018 Texas Instruments Incorporated - https://www.ti.com/
4 * Jean-Jacques Hiblot <jjhiblot@ti.com>
5 */
6
7#include <common.h>
8#include <dm.h>
9#include <mux.h>
10#include <regmap.h>
11#include <syscon.h>
12#include <asm/test.h>
13#include <dm/test.h>
14#include <dm/device-internal.h>
15#include <test/ut.h>
16
17static int dm_test_mux_mmio_select(struct unit_test_state *uts)
18{
19	struct udevice *dev, *dev_b;
20	struct regmap *map;
21	struct mux_control *ctl0_a, *ctl0_b;
22	struct mux_control *ctl1;
23	struct mux_control *ctl_err;
24	u32 val;
25	int i;
26
27	sandbox_set_enable_memio(true);
28
29	ut_assertok(uclass_get_device_by_name(UCLASS_TEST_FDT, "a-test",
30					      &dev));
31	ut_assertok(uclass_get_device_by_name(UCLASS_TEST_FDT, "b-test",
32					      &dev_b));
33	map = syscon_regmap_lookup_by_phandle(dev, "mux-syscon");
34	ut_assertok_ptr(map);
35	ut_assert(map);
36
37	ut_assertok(mux_control_get(dev, "mux0", &ctl0_a));
38	ut_assertok(mux_control_get(dev, "mux1", &ctl1));
39	ut_asserteq(-ERANGE, mux_control_get(dev, "mux3", &ctl_err));
40	ut_asserteq(-ENODATA, mux_control_get(dev, "dummy", &ctl_err));
41	ut_assertok(mux_control_get(dev_b, "mux0", &ctl0_b));
42
43	for (i = 0; i < mux_control_states(ctl0_a); i++) {
44		/* Select a new state and verify the value in the regmap. */
45		ut_assertok(mux_control_select(ctl0_a, i));
46		ut_assertok(regmap_read(map, 0, &val));
47		ut_asserteq(i, (val & 0x30) >> 4);
48		/*
49		 * Deselect the mux and verify that the value in the regmap
50		 * reflects the idle state (fixed to MUX_IDLE_AS_IS).
51		 */
52		ut_assertok(mux_control_deselect(ctl0_a));
53		ut_assertok(regmap_read(map, 0, &val));
54		ut_asserteq(i, (val & 0x30) >> 4);
55	}
56
57	for (i = 0; i < mux_control_states(ctl1); i++) {
58		/* Select a new state and verify the value in the regmap. */
59		ut_assertok(mux_control_select(ctl1, i));
60		ut_assertok(regmap_read(map, 0xc, &val));
61		ut_asserteq(i, (val & 0x1E) >> 1);
62		/*
63		 * Deselect the mux and verify that the value in the regmap
64		 * reflects the idle state (fixed to 2).
65		 */
66		ut_assertok(mux_control_deselect(ctl1));
67		ut_assertok(regmap_read(map, 0xc, &val));
68		ut_asserteq(2, (val & 0x1E) >> 1);
69	}
70
71	/* Try unbalanced selection/deselection. */
72	ut_assertok(mux_control_select(ctl0_a, 0));
73	ut_asserteq(-EBUSY, mux_control_select(ctl0_a, 1));
74	ut_asserteq(-EBUSY, mux_control_select(ctl0_a, 0));
75	ut_assertok(mux_control_deselect(ctl0_a));
76
77	/* Try concurrent selection. */
78	ut_assertok(mux_control_select(ctl0_a, 0));
79	ut_assert(mux_control_select(ctl0_b, 0));
80	ut_assertok(mux_control_deselect(ctl0_a));
81	ut_assertok(mux_control_select(ctl0_b, 0));
82	ut_assert(mux_control_select(ctl0_a, 0));
83	ut_assertok(mux_control_deselect(ctl0_b));
84	ut_assertok(mux_control_select(ctl0_a, 0));
85	ut_assertok(mux_control_deselect(ctl0_a));
86
87	return 0;
88}
89DM_TEST(dm_test_mux_mmio_select, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
90
91/* Test that managed API for mux work correctly */
92static int dm_test_devm_mux_mmio(struct unit_test_state *uts)
93{
94	struct udevice *dev, *dev_b;
95	struct mux_control *ctl0_a, *ctl0_b;
96	struct mux_control *ctl1;
97	struct mux_control *ctl_err;
98
99	sandbox_set_enable_memio(true);
100
101	ut_assertok(uclass_get_device_by_name(UCLASS_TEST_FDT, "a-test",
102					      &dev));
103	ut_assertok(uclass_get_device_by_name(UCLASS_TEST_FDT, "b-test",
104					      &dev_b));
105
106	ctl0_a = devm_mux_control_get(dev, "mux0");
107	ut_assertok_ptr(ctl0_a);
108	ut_assert(ctl0_a);
109	ctl1 = devm_mux_control_get(dev, "mux1");
110	ut_assertok_ptr(ctl1);
111	ut_assert(ctl1);
112	ctl_err = devm_mux_control_get(dev, "mux3");
113	ut_asserteq(-ERANGE, PTR_ERR(ctl_err));
114	ctl_err = devm_mux_control_get(dev, "dummy");
115	ut_asserteq(-ENODATA, PTR_ERR(ctl_err));
116
117	ctl0_b = devm_mux_control_get(dev_b, "mux0");
118	ut_assertok_ptr(ctl0_b);
119	ut_assert(ctl0_b);
120
121	/* Try concurrent selection. */
122	ut_assertok(mux_control_select(ctl0_a, 0));
123	ut_assert(mux_control_select(ctl0_b, 0));
124	ut_assertok(mux_control_deselect(ctl0_a));
125	ut_assertok(mux_control_select(ctl0_b, 0));
126	ut_assert(mux_control_select(ctl0_a, 0));
127	ut_assertok(mux_control_deselect(ctl0_b));
128
129	/* Remove one device and check that the mux is released. */
130	ut_assertok(mux_control_select(ctl0_a, 0));
131	ut_assert(mux_control_select(ctl0_b, 0));
132	device_remove(dev, DM_REMOVE_NORMAL);
133	ut_assertok(mux_control_select(ctl0_b, 0));
134
135	device_remove(dev_b, DM_REMOVE_NORMAL);
136	return 0;
137}
138DM_TEST(dm_test_devm_mux_mmio, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
139