1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2019
4 * Alex Marginean, NXP
5 */
6
7#include <dm.h>
8#include <miiphy.h>
9#include <misc.h>
10#include <dm/test.h>
11#include <test/test.h>
12#include <test/ut.h>
13
14/* macros copied over from mdio_sandbox.c */
15#define SANDBOX_PHY_ADDR	5
16#define SANDBOX_PHY_REG_CNT	2
17
18#define TEST_REG_VALUE		0xabcd
19
20static int dm_test_mdio_mux(struct unit_test_state *uts)
21{
22	struct uclass *uc;
23	struct udevice *mux;
24	struct udevice *mdio_ch0, *mdio_ch1, *mdio;
25	struct mdio_ops *ops, *ops_parent;
26	struct mdio_mux_ops *mmops;
27	u16 reg;
28
29	ut_assertok(uclass_get(UCLASS_MDIO_MUX, &uc));
30
31	ut_assertok(uclass_get_device_by_name(UCLASS_MDIO_MUX, "mdio-mux-test",
32					      &mux));
33
34	ut_assertok(uclass_get_device_by_name(UCLASS_MDIO, "mdio-ch-test@0",
35					      &mdio_ch0));
36	ut_assertok(uclass_get_device_by_name(UCLASS_MDIO, "mdio-ch-test@1",
37					      &mdio_ch1));
38
39	ut_assertok(uclass_get_device_by_name(UCLASS_MDIO, "mdio-test", &mdio));
40
41	ops = mdio_get_ops(mdio_ch0);
42	ut_assertnonnull(ops);
43	ut_assertnonnull(ops->read);
44	ut_assertnonnull(ops->write);
45
46	mmops = mdio_mux_get_ops(mux);
47	ut_assertnonnull(mmops);
48	ut_assertnonnull(mmops->select);
49
50	ops_parent = mdio_get_ops(mdio);
51	ut_assertnonnull(ops);
52	ut_assertnonnull(ops->read);
53
54	/*
55	 * mux driver sets last register on the emulated PHY whenever a group
56	 * is selected to the selection #.  Just reading that register from
57	 * either of the child buses should return the id of the child bus
58	 */
59	reg = dm_mdio_read(mdio_ch0, SANDBOX_PHY_ADDR, MDIO_DEVAD_NONE,
60			   SANDBOX_PHY_REG_CNT - 1);
61	ut_asserteq(reg, 0);
62
63	reg = dm_mdio_read(mdio_ch1, SANDBOX_PHY_ADDR, MDIO_DEVAD_NONE,
64			   SANDBOX_PHY_REG_CNT - 1);
65	ut_asserteq(reg, 1);
66
67	mmops->select(mux, MDIO_MUX_SELECT_NONE, 5);
68	reg = dm_mdio_read(mdio, SANDBOX_PHY_ADDR, MDIO_DEVAD_NONE,
69			   SANDBOX_PHY_REG_CNT - 1);
70	ut_asserteq(reg, 5);
71
72	mmops->deselect(mux, 5);
73	reg = dm_mdio_read(mdio, SANDBOX_PHY_ADDR, MDIO_DEVAD_NONE,
74			   SANDBOX_PHY_REG_CNT - 1);
75	ut_asserteq(reg, (u16)MDIO_MUX_SELECT_NONE);
76
77	return 0;
78}
79
80DM_TEST(dm_test_mdio_mux, UT_TESTF_SCAN_FDT);
81