1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * (C) Copyright 2002 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 */ 6#ifndef _CPU_ASM_H 7#define _CPU_ASM_H 8 9#define BIT_C 0x00000001 10 11#define OP_BLR 0x4e800020 12#define OP_EXTSB 0x7c000774 13#define OP_EXTSH 0x7c000734 14#define OP_NEG 0x7c0000d0 15#define OP_CNTLZW 0x7c000034 16#define OP_ADD 0x7c000214 17#define OP_ADDC 0x7c000014 18#define OP_ADDME 0x7c0001d4 19#define OP_ADDZE 0x7c000194 20#define OP_ADDE 0x7c000114 21#define OP_ADDI 0x38000000 22#define OP_SUBF 0x7c000050 23#define OP_SUBFC 0x7c000010 24#define OP_SUBFE 0x7c000110 25#define OP_SUBFME 0x7c0001d0 26#define OP_SUBFZE 0x7c000190 27#define OP_MFCR 0x7c000026 28#define OP_MTCR 0x7c0ff120 29#define OP_MFXER 0x7c0102a6 30#define OP_MTXER 0x7c0103a6 31#define OP_MCRXR 0x7c000400 32#define OP_MCRF 0x4c000000 33#define OP_CRAND 0x4c000202 34#define OP_CRANDC 0x4c000102 35#define OP_CROR 0x4c000382 36#define OP_CRORC 0x4c000342 37#define OP_CRXOR 0x4c000182 38#define OP_CRNAND 0x4c0001c2 39#define OP_CRNOR 0x4c000042 40#define OP_CREQV 0x4c000242 41#define OP_CMPW 0x7c000000 42#define OP_CMPLW 0x7c000040 43#define OP_CMPWI 0x2c000000 44#define OP_CMPLWI 0x28000000 45#define OP_MULLW 0x7c0001d6 46#define OP_MULHW 0x7c000096 47#define OP_MULHWU 0x7c000016 48#define OP_DIVW 0x7c0003d6 49#define OP_DIVWU 0x7c000396 50#define OP_OR 0x7c000378 51#define OP_ORC 0x7c000338 52#define OP_XOR 0x7c000278 53#define OP_NAND 0x7c0003b8 54#define OP_NOR 0x7c0000f8 55#define OP_EQV 0x7c000238 56#define OP_SLW 0x7c000030 57#define OP_SRW 0x7c000430 58#define OP_SRAW 0x7c000630 59#define OP_ORI 0x60000000 60#define OP_ORIS 0x64000000 61#define OP_XORI 0x68000000 62#define OP_XORIS 0x6c000000 63#define OP_ANDI_ 0x70000000 64#define OP_ANDIS_ 0x74000000 65#define OP_SRAWI 0x7c000670 66#define OP_RLWINM 0x54000000 67#define OP_RLWNM 0x5c000000 68#define OP_RLWIMI 0x50000000 69#define OP_LWZ 0x80000000 70#define OP_LHZ 0xa0000000 71#define OP_LHA 0xa8000000 72#define OP_LBZ 0x88000000 73#define OP_LWZU 0x84000000 74#define OP_LHZU 0xa4000000 75#define OP_LHAU 0xac000000 76#define OP_LBZU 0x8c000000 77#define OP_LWZX 0x7c00002e 78#define OP_LHZX 0x7c00022e 79#define OP_LHAX 0x7c0002ae 80#define OP_LBZX 0x7c0000ae 81#define OP_LWZUX 0x7c00006e 82#define OP_LHZUX 0x7c00026e 83#define OP_LHAUX 0x7c0002ee 84#define OP_LBZUX 0x7c0000ee 85#define OP_STW 0x90000000 86#define OP_STH 0xb0000000 87#define OP_STB 0x98000000 88#define OP_STWU 0x94000000 89#define OP_STHU 0xb4000000 90#define OP_STBU 0x9c000000 91#define OP_STWX 0x7c00012e 92#define OP_STHX 0x7c00032e 93#define OP_STBX 0x7c0001ae 94#define OP_STWUX 0x7c00016e 95#define OP_STHUX 0x7c00036e 96#define OP_STBUX 0x7c0001ee 97#define OP_B 0x48000000 98#define OP_BL 0x48000001 99#define OP_BC 0x40000000 100#define OP_BCL 0x40000001 101#define OP_MTLR 0x7c0803a6 102#define OP_MFLR 0x7c0802a6 103#define OP_MTCTR 0x7c0903a6 104#define OP_MFCTR 0x7c0902a6 105#define OP_LMW 0xb8000000 106#define OP_STMW 0xbc000000 107#define OP_LSWI 0x7c0004aa 108#define OP_LSWX 0x7c00042a 109#define OP_STSWI 0x7c0005aa 110#define OP_STSWX 0x7c00052a 111 112#define ASM_0(opcode) (opcode) 113#define ASM_1(opcode, rd) ((opcode) + \ 114 ((rd) << 21)) 115#define ASM_1C(opcode, cr) ((opcode) + \ 116 ((cr) << 23)) 117#define ASM_11(opcode, rd, rs) ((opcode) + \ 118 ((rd) << 21) + \ 119 ((rs) << 16)) 120#define ASM_11C(opcode, cd, cs) ((opcode) + \ 121 ((cd) << 23) + \ 122 ((cs) << 18)) 123#define ASM_11X(opcode, rd, rs) ((opcode) + \ 124 ((rs) << 21) + \ 125 ((rd) << 16)) 126#define ASM_11I(opcode, rd, rs, simm) ((opcode) + \ 127 ((rd) << 21) + \ 128 ((rs) << 16) + \ 129 ((simm) & 0xffff)) 130#define ASM_11IF(opcode, rd, rs, simm) ((opcode) + \ 131 ((rd) << 21) + \ 132 ((rs) << 16) + \ 133 ((simm) << 11)) 134#define ASM_11S(opcode, rd, rs, sh) ((opcode) + \ 135 ((rs) << 21) + \ 136 ((rd) << 16) + \ 137 ((sh) << 11)) 138#define ASM_11IX(opcode, rd, rs, imm) ((opcode) + \ 139 ((rs) << 21) + \ 140 ((rd) << 16) + \ 141 ((imm) & 0xffff)) 142#define ASM_12(opcode, rd, rs1, rs2) ((opcode) + \ 143 ((rd) << 21) + \ 144 ((rs1) << 16) + \ 145 ((rs2) << 11)) 146#define ASM_12F(opcode, fd, fs1, fs2) ((opcode) + \ 147 ((fd) << 21) + \ 148 ((fs1) << 16) + \ 149 ((fs2) << 11)) 150#define ASM_12X(opcode, rd, rs1, rs2) ((opcode) + \ 151 ((rs1) << 21) + \ 152 ((rd) << 16) + \ 153 ((rs2) << 11)) 154#define ASM_2C(opcode, cr, rs1, rs2) ((opcode) + \ 155 ((cr) << 23) + \ 156 ((rs1) << 16) + \ 157 ((rs2) << 11)) 158#define ASM_1IC(opcode, cr, rs, imm) ((opcode) + \ 159 ((cr) << 23) + \ 160 ((rs) << 16) + \ 161 ((imm) & 0xffff)) 162#define ASM_122(opcode, rd, rs1, rs2, imm1, imm2) \ 163 ((opcode) + \ 164 ((rs1) << 21) + \ 165 ((rd) << 16) + \ 166 ((rs2) << 11) + \ 167 ((imm1) << 6) + \ 168 ((imm2) << 1)) 169#define ASM_113(opcode, rd, rs, imm1, imm2, imm3) \ 170 ((opcode) + \ 171 ((rs) << 21) + \ 172 ((rd) << 16) + \ 173 ((imm1) << 11) + \ 174 ((imm2) << 6) + \ 175 ((imm3) << 1)) 176#define ASM_1O(opcode, off) ((opcode) + (off)) 177#define ASM_3O(opcode, bo, bi, off) ((opcode) + \ 178 ((bo) << 21) + \ 179 ((bi) << 16) + \ 180 (off)) 181 182#define ASM_ADDI(rd, rs, simm) ASM_11I(OP_ADDI, rd, rs, simm) 183#define ASM_BLR ASM_0(OP_BLR) 184#define ASM_STW(rd, rs, simm) ASM_11I(OP_STW, rd, rs, simm) 185#define ASM_LWZ(rd, rs, simm) ASM_11I(OP_LWZ, rd, rs, simm) 186#define ASM_MFCR(rd) ASM_1(OP_MFCR, rd) 187#define ASM_MTCR(rd) ASM_1(OP_MTCR, rd) 188#define ASM_MFXER(rd) ASM_1(OP_MFXER, rd) 189#define ASM_MTXER(rd) ASM_1(OP_MTXER, rd) 190#define ASM_MFCTR(rd) ASM_1(OP_MFCTR, rd) 191#define ASM_MTCTR(rd) ASM_1(OP_MTCTR, rd) 192#define ASM_MCRXR(cr) ASM_1C(OP_MCRXR, cr) 193#define ASM_MCRF(cd, cs) ASM_11C(OP_MCRF, cd, cs) 194#define ASM_B(off) ASM_1O(OP_B, off) 195#define ASM_BL(off) ASM_1O(OP_BL, off) 196#define ASM_MFLR(rd) ASM_1(OP_MFLR, rd) 197#define ASM_MTLR(rd) ASM_1(OP_MTLR, rd) 198#define ASM_LI(rd, imm) ASM_ADDI(rd, 0, imm) 199#define ASM_LMW(rd, rs, simm) ASM_11I(OP_LMW, rd, rs, simm) 200#define ASM_STMW(rd, rs, simm) ASM_11I(OP_STMW, rd, rs, simm) 201#define ASM_LSWI(rd, rs, simm) ASM_11IF(OP_LSWI, rd, rs, simm) 202#define ASM_LSWX(rd, rs1, rs2) ASM_12(OP_LSWX, rd, rs1, rs2) 203#define ASM_STSWI(rd, rs, simm) ASM_11IF(OP_STSWI, rd, rs, simm) 204#define ASM_STSWX(rd, rs1, rs2) ASM_12(OP_STSWX, rd, rs1, rs2) 205 206 207#endif /* _CPU_ASM_H */ 208