1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * (C) Copyright 2015 Xilinx, Inc,
4 * Michal Simek <michal.simek@amd.com>
5 */
6
7#ifndef _ZYNQMPPL_H_
8#define _ZYNQMPPL_H_
9
10#include <xilinx.h>
11#include <linux/bitops.h>
12
13#define ZYNQMP_FPGA_OP_INIT			(1 << 0)
14#define ZYNQMP_FPGA_OP_LOAD			(1 << 1)
15#define ZYNQMP_FPGA_OP_DONE			(1 << 2)
16
17#define ZYNQMP_FPGA_FLAG_AUTHENTICATED		BIT(2)
18#define ZYNQMP_FPGA_FLAG_ENCRYPTED		BIT(3)
19
20#define ZYNQMP_CSU_IDCODE_DEVICE_CODE_SHIFT	15
21#define ZYNQMP_CSU_IDCODE_DEVICE_CODE_MASK	(0xf << \
22					ZYNQMP_CSU_IDCODE_DEVICE_CODE_SHIFT)
23#define ZYNQMP_CSU_IDCODE_SVD_SHIFT	12
24#define ZYNQMP_CSU_IDCODE_SVD_MASK	(0x7 << ZYNQMP_CSU_IDCODE_SVD_SHIFT)
25
26extern struct xilinx_fpga_op zynqmp_op;
27
28#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
29#define ZYNQMP_FPGA_FLAGS	(FPGA_LEGACY | \
30				 FPGA_XILINX_ZYNQMP_DDRAUTH | \
31				 FPGA_XILINX_ZYNQMP_ENC)
32#else
33#define ZYNQMP_FPGA_FLAGS	(FPGA_LEGACY)
34#endif
35
36#endif /* _ZYNQMPPL_H_ */
37