#
174d7284 |
|
10-Jul-2023 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Switch to amd.com emails Update my and DPs email address to match current setup. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/aba5b19b9c5a95608829e86ad5cc4671c940f1bb.1688992543.git.michal.simek@amd.com |
#
b524f8fb |
|
22-Jul-2022 |
Adrian Fiergolski <adrian.fiergolski@fastree3d.com> |
fpga: zynqmp: support loading encrypted bitfiles Add supporting new compatible string "u-boot,zynqmp-fpga-enc" to handle loading encrypted bitfiles. This feature requires encrypted FSBL, as according to UG1085: "The CSU automatically locks out the AES key, stored in either BBRAM or eFUSEs, as a key source to the AES engine if the FSBL is not encrypted. This prevents using the BBRAM or eFUSE as the key source to the AES engine during run-time applications." Signed-off-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com> Co-developed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com> Link: https://lore.kernel.org/r/20220722141614.297383-14-oleksandr.suvorov@foundries.io Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
a3a1afb7 |
|
22-Jul-2022 |
Oleksandr Suvorov <oleksandr.suvorov@foundries.io> |
fpga: zynqmp: support loading authenticated images Add supporting new compatible string "u-boot,zynqmp-fpga-ddrauth" to handle loading authenticated images (DDR). Based on solution by Jorge Ramirez-Ortiz <jorge@foundries.io> Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Tested-by: Ricardo Salveti <ricardo@foundries.io> Link: https://lore.kernel.org/r/20220722141614.297383-13-oleksandr.suvorov@foundries.io Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
d7fcbfc1 |
|
22-Jul-2022 |
Oleksandr Suvorov <oleksandr.suvorov@foundries.io> |
fpga: xilinx: add bitstream flags to driver desc Store a set of supported bitstream types in xilinx_desc structure. It will be used to determine whether an FPGA image is able to be loaded with a given driver. Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Tested-by: Ricardo Salveti <ricardo@foundries.io> Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com> Link: https://lore.kernel.org/r/20220722141614.297383-4-oleksandr.suvorov@foundries.io Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
b7d4518e |
|
09-Sep-2020 |
Michal Simek <michal.simek@amd.com> |
fpga: zynqmp: Get rid of ZYNQMP_SIP_SVC* macros There is no need to use these macros because enum pm_api_id can be used instead. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a18d09ea |
|
31-May-2018 |
Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com> |
fpga: zynqmp: Add secure bitstream loading for ZynqMP This patch adds support for loading secure bitstreams on ZynqMP platforms. The secure bitstream images has to be generated using Xilinx bootgen tool. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b32e11a7 |
|
16-Feb-2018 |
Nitin Jain <nitin.jain@xilinx.com> |
fpga: zynqmp: Add support to get the PCAP status for fpga info command This patch adds support for ZynqMP platform to print FPGA PCAP status for "fpga status" command. Signed-off-by: Nitin Jain <nitinj@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
92687047 |
|
28-Jun-2017 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Fix SVD mask for getting chip ID Mask should start from the first bit - using 0xe is just wrong. 3bits are used that's why 0x7 mask is correct. This patch is fixing silicon ID code detection. Previous behavior was that bit0 was completely ignored. Issue was found on 2eg chip detection. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
0cba6abb |
|
29-Sep-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
ARM64: zynqmp: Adjust to new SMC interface to get silicon version The new FW interface returns the IDCODE and version register, leaving extracting bitfields to the caller. Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
47e60cbd |
|
01-Feb-2016 |
Michal Simek <michal.simek@amd.com> |
ARM64: zynqmp: Add support for chip ID detection Chip ID needs to be known for loading bitstream because U-Boot checks ID from bitstream header in BIT format. BIN format is completely unchecked. The chipid is get from ATF via SMC. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
6b245014 |
|
13-Jan-2016 |
Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com> |
fpga: xilinx: zynqmp: Add PL bitstream download support for ZynqMP Add PL bitstream dowload support for ZynqMP Bitstream will be validated by uboot and loaded to PL by invoking an smc instruction to ATF which route this request to PMU FW which will take care of loading it to PL Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
b524f8fb |
|
22-Jul-2022 |
Adrian Fiergolski <adrian.fiergolski@fastree3d.com> |
fpga: zynqmp: support loading encrypted bitfiles Add supporting new compatible string "u-boot,zynqmp-fpga-enc" to handle loading encrypted bitfiles. This feature requires encrypted FSBL, as according to UG1085: "The CSU automatically locks out the AES key, stored in either BBRAM or eFUSEs, as a key source to the AES engine if the FSBL is not encrypted. This prevents using the BBRAM or eFUSE as the key source to the AES engine during run-time applications." Signed-off-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com> Co-developed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com> Link: https://lore.kernel.org/r/20220722141614.297383-14-oleksandr.suvorov@foundries.io Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
a3a1afb7 |
|
22-Jul-2022 |
Oleksandr Suvorov <oleksandr.suvorov@foundries.io> |
fpga: zynqmp: support loading authenticated images Add supporting new compatible string "u-boot,zynqmp-fpga-ddrauth" to handle loading authenticated images (DDR). Based on solution by Jorge Ramirez-Ortiz <jorge@foundries.io> Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Tested-by: Ricardo Salveti <ricardo@foundries.io> Link: https://lore.kernel.org/r/20220722141614.297383-13-oleksandr.suvorov@foundries.io Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
d7fcbfc1 |
|
22-Jul-2022 |
Oleksandr Suvorov <oleksandr.suvorov@foundries.io> |
fpga: xilinx: add bitstream flags to driver desc Store a set of supported bitstream types in xilinx_desc structure. It will be used to determine whether an FPGA image is able to be loaded with a given driver. Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Tested-by: Ricardo Salveti <ricardo@foundries.io> Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com> Link: https://lore.kernel.org/r/20220722141614.297383-4-oleksandr.suvorov@foundries.io Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
b7d4518e |
|
09-Sep-2020 |
Michal Simek <michal.simek@amd.com> |
fpga: zynqmp: Get rid of ZYNQMP_SIP_SVC* macros There is no need to use these macros because enum pm_api_id can be used instead. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a18d09ea |
|
31-May-2018 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
fpga: zynqmp: Add secure bitstream loading for ZynqMP This patch adds support for loading secure bitstreams on ZynqMP platforms. The secure bitstream images has to be generated using Xilinx bootgen tool. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b32e11a7 |
|
16-Feb-2018 |
Nitin Jain <nitin.jain@xilinx.com> |
fpga: zynqmp: Add support to get the PCAP status for fpga info command This patch adds support for ZynqMP platform to print FPGA PCAP status for "fpga status" command. Signed-off-by: Nitin Jain <nitinj@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
92687047 |
|
28-Jun-2017 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Fix SVD mask for getting chip ID Mask should start from the first bit - using 0xe is just wrong. 3bits are used that's why 0x7 mask is correct. This patch is fixing silicon ID code detection. Previous behavior was that bit0 was completely ignored. Issue was found on 2eg chip detection. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
0cba6abb |
|
29-Sep-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
ARM64: zynqmp: Adjust to new SMC interface to get silicon version The new FW interface returns the IDCODE and version register, leaving extracting bitfields to the caller. Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
47e60cbd |
|
01-Feb-2016 |
Michal Simek <michal.simek@amd.com> |
ARM64: zynqmp: Add support for chip ID detection Chip ID needs to be known for loading bitstream because U-Boot checks ID from bitstream header in BIT format. BIN format is completely unchecked. The chipid is get from ATF via SMC. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
6b245014 |
|
13-Jan-2016 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
fpga: xilinx: zynqmp: Add PL bitstream download support for ZynqMP Add PL bitstream dowload support for ZynqMP Bitstream will be validated by uboot and loaded to PL by invoking an smc instruction to ATF which route this request to PMU FW which will take care of loading it to PL Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
b7d4518e |
|
09-Sep-2020 |
Michal Simek <michal.simek@xilinx.com> |
fpga: zynqmp: Get rid of ZYNQMP_SIP_SVC* macros There is no need to use these macros because enum pm_api_id can be used instead. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a18d09ea |
|
31-May-2018 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
fpga: zynqmp: Add secure bitstream loading for ZynqMP This patch adds support for loading secure bitstreams on ZynqMP platforms. The secure bitstream images has to be generated using Xilinx bootgen tool. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b32e11a7 |
|
16-Feb-2018 |
Nitin Jain <nitin.jain@xilinx.com> |
fpga: zynqmp: Add support to get the PCAP status for fpga info command This patch adds support for ZynqMP platform to print FPGA PCAP status for "fpga status" command. Signed-off-by: Nitin Jain <nitinj@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
92687047 |
|
28-Jun-2017 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Fix SVD mask for getting chip ID Mask should start from the first bit - using 0xe is just wrong. 3bits are used that's why 0x7 mask is correct. This patch is fixing silicon ID code detection. Previous behavior was that bit0 was completely ignored. Issue was found on 2eg chip detection. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
0cba6abb |
|
29-Sep-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
ARM64: zynqmp: Adjust to new SMC interface to get silicon version The new FW interface returns the IDCODE and version register, leaving extracting bitfields to the caller. Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
47e60cbd |
|
01-Feb-2016 |
Michal Simek <michal.simek@xilinx.com> |
ARM64: zynqmp: Add support for chip ID detection Chip ID needs to be known for loading bitstream because U-Boot checks ID from bitstream header in BIT format. BIN format is completely unchecked. The chipid is get from ATF via SMC. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
6b245014 |
|
13-Jan-2016 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
fpga: xilinx: zynqmp: Add PL bitstream download support for ZynqMP Add PL bitstream dowload support for ZynqMP Bitstream will be validated by uboot and loaded to PL by invoking an smc instruction to ATF which route this request to PMU FW which will take care of loading it to PL Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a18d09ea |
|
31-May-2018 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
fpga: zynqmp: Add secure bitstream loading for ZynqMP This patch adds support for loading secure bitstreams on ZynqMP platforms. The secure bitstream images has to be generated using Xilinx bootgen tool. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b32e11a7 |
|
16-Feb-2018 |
Nitin Jain <nitin.jain@xilinx.com> |
fpga: zynqmp: Add support to get the PCAP status for fpga info command This patch adds support for ZynqMP platform to print FPGA PCAP status for "fpga status" command. Signed-off-by: Nitin Jain <nitinj@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
92687047 |
|
28-Jun-2017 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Fix SVD mask for getting chip ID Mask should start from the first bit - using 0xe is just wrong. 3bits are used that's why 0x7 mask is correct. This patch is fixing silicon ID code detection. Previous behavior was that bit0 was completely ignored. Issue was found on 2eg chip detection. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
0cba6abb |
|
29-Sep-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
ARM64: zynqmp: Adjust to new SMC interface to get silicon version The new FW interface returns the IDCODE and version register, leaving extracting bitfields to the caller. Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
47e60cbd |
|
01-Feb-2016 |
Michal Simek <michal.simek@xilinx.com> |
ARM64: zynqmp: Add support for chip ID detection Chip ID needs to be known for loading bitstream because U-Boot checks ID from bitstream header in BIT format. BIN format is completely unchecked. The chipid is get from ATF via SMC. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
6b245014 |
|
13-Jan-2016 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
fpga: xilinx: zynqmp: Add PL bitstream download support for ZynqMP Add PL bitstream dowload support for ZynqMP Bitstream will be validated by uboot and loaded to PL by invoking an smc instruction to ATF which route this request to PMU FW which will take care of loading it to PL Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
a18d09ea |
|
31-May-2018 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
fpga: zynqmp: Add secure bitstream loading for ZynqMP This patch adds support for loading secure bitstreams on ZynqMP platforms. The secure bitstream images has to be generated using Xilinx bootgen tool. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
b32e11a7 |
|
16-Feb-2018 |
Nitin Jain <nitin.jain@xilinx.com> |
fpga: zynqmp: Add support to get the PCAP status for fpga info command This patch adds support for ZynqMP platform to print FPGA PCAP status for "fpga status" command. Signed-off-by: Nitin Jain <nitinj@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92687047 |
|
28-Jun-2017 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Fix SVD mask for getting chip ID Mask should start from the first bit - using 0xe is just wrong. 3bits are used that's why 0x7 mask is correct. This patch is fixing silicon ID code detection. Previous behavior was that bit0 was completely ignored. Issue was found on 2eg chip detection. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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0cba6abb |
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29-Sep-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
ARM64: zynqmp: Adjust to new SMC interface to get silicon version The new FW interface returns the IDCODE and version register, leaving extracting bitfields to the caller. Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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47e60cbd |
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01-Feb-2016 |
Michal Simek <michal.simek@xilinx.com> |
ARM64: zynqmp: Add support for chip ID detection Chip ID needs to be known for loading bitstream because U-Boot checks ID from bitstream header in BIT format. BIN format is completely unchecked. The chipid is get from ATF via SMC. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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6b245014 |
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13-Jan-2016 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
fpga: xilinx: zynqmp: Add PL bitstream download support for ZynqMP Add PL bitstream dowload support for ZynqMP Bitstream will be validated by uboot and loaded to PL by invoking an smc instruction to ATF which route this request to PMU FW which will take care of loading it to PL Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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