1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright (c) 2015 Google, Inc
4 * Written by Simon Glass <sjg@chromium.org>
5 */
6
7#ifndef __pch_h
8#define __pch_h
9
10#include <linux/bitops.h>
11#define PCH_RCBA		0xf0
12
13#define BIOS_CTRL_BIOSWE	BIT(0)
14
15/* All the supported PCH ioctls */
16enum pch_req_t {
17	/* Returns HDA config info if Azalia V1CTL enabled, -ENOENT if not */
18	PCH_REQ_HDA_CONFIG,
19
20	/* Fills out a struct pch_pmbase_info if available */
21	PCH_REQ_PMBASE_INFO,
22
23	PCH_REQ_TEST1,		/* Test requests for sandbox driver */
24	PCH_REQ_TEST2,
25	PCH_REQ_TEST3,
26
27	PCH_REQ_COUNT,		/* Number of ioctrls supported */
28};
29
30/**
31 * struct pch_pmbase_info - Information filled in by PCH_REQ_PMBASE_INFO
32 *
33 * @pmbase: IO address of power-management controller
34 * @gpio0_en_ofs: Offset of GPIO0 enable register
35 * @pm1_sts_ofs: Offset of status register
36 * @pm1_cnt_ofs: Offset of control register
37 */
38struct pch_pmbase_info {
39	u16 base;
40	u8 gpio0_en_ofs;
41	u8 pm1_sts_ofs;
42	u8 pm1_cnt_ofs;
43};
44
45/**
46 * struct pch_ops - Operations for the Platform Controller Hub
47 *
48 * Consider using ioctl() to add rarely used or driver-specific operations.
49 */
50struct pch_ops {
51	/**
52	 * get_spi_base() - get the address of SPI base
53	 *
54	 * @dev:	PCH device to check
55	 * @sbasep:	Returns address of SPI base if available, else 0
56	 * @return 0 if OK, -ve on error (e.g. there is no SPI base)
57	 */
58	int (*get_spi_base)(struct udevice *dev, ulong *sbasep);
59
60	/**
61	 * set_spi_protect() - set whether SPI flash is protected or not
62	 *
63	 * @dev:	PCH device to adjust
64	 * @protect:	true to protect, false to unprotect
65	 *
66	 * @return 0 on success, -ENOSYS if not implemented
67	 */
68	int (*set_spi_protect)(struct udevice *dev, bool protect);
69
70	/**
71	 * get_gpio_base() - get the address of GPIO base
72	 *
73	 * @dev:	PCH device to check
74	 * @gbasep:	Returns address of GPIO base if available, else 0
75	 * @return 0 if OK, -ve on error (e.g. there is no GPIO base)
76	 */
77	int (*get_gpio_base)(struct udevice *dev, u32 *gbasep);
78
79	/**
80	 * get_io_base() - get the address of IO base
81	 *
82	 * @dev:	PCH device to check
83	 * @iobasep:	Returns address of IO base if available, else 0
84	 * @return 0 if OK, -ve on error (e.g. there is no IO base)
85	 */
86	int (*get_io_base)(struct udevice *dev, u32 *iobasep);
87
88	/**
89	 * ioctl() - perform misc read/write operations
90	 *
91	 * This is a catch-all operation intended to avoid adding lots of
92	 * methods to this uclass, of which few are commonly used. Uncommon
93	 * operations that pertain only to a few devices in this uclass should
94	 * use this method instead of adding new methods.
95	 *
96	 * @dev:	PCH device to check
97	 * @req:	PCH request ID
98	 * @data:	Input/output data
99	 * @size:	Size of input data (and maximum size of output data)
100	 * @return size of output data on sucesss, -ve on error
101	 */
102	int (*ioctl)(struct udevice *dev, enum pch_req_t req, void *data,
103		     int size);
104};
105
106#define pch_get_ops(dev)        ((struct pch_ops *)(dev)->driver->ops)
107
108/**
109 * pch_get_spi_base() - get the address of SPI base
110 *
111 * @dev:	PCH device to check
112 * @sbasep:	Returns address of SPI base if available, else 0
113 * Return: 0 if OK, -ve on error (e.g. there is no SPI base)
114 */
115int pch_get_spi_base(struct udevice *dev, ulong *sbasep);
116
117/**
118 * set_spi_protect() - set whether SPI flash is protected or not
119 *
120 * @dev:	PCH device to adjust
121 * @protect:	true to protect, false to unprotect
122 *
123 * Return: 0 on success, -ENOSYS if not implemented
124 */
125int pch_set_spi_protect(struct udevice *dev, bool protect);
126
127/**
128 * pch_get_gpio_base() - get the address of GPIO base
129 *
130 * @dev:	PCH device to check
131 * @gbasep:	Returns address of GPIO base if available, else 0
132 * Return: 0 if OK, -ve on error (e.g. there is no GPIO base)
133 */
134int pch_get_gpio_base(struct udevice *dev, u32 *gbasep);
135
136/**
137 * pch_get_io_base() - get the address of IO base
138 *
139 * @dev:	PCH device to check
140 * @iobasep:	Returns address of IO base if available, else 0
141 * Return: 0 if OK, -ve on error (e.g. there is no IO base)
142 */
143int pch_get_io_base(struct udevice *dev, u32 *iobasep);
144
145/**
146 * pch_ioctl() - perform misc read/write operations
147 *
148 * This is a catch-all operation intended to avoid adding lots of
149 * methods to this uclass, of which few are commonly used. Uncommon
150 * operations that pertain only to a few devices in this uclass should
151 * use this method instead of adding new methods.
152 *
153 * @dev:	PCH device to check
154 * @req:	PCH request ID
155 * @data:	Input/output data
156 * @size:	Size of input data (and maximum size of output data)
157 * Return: size of output data on sucesss, -ve on error
158 */
159int pch_ioctl(struct udevice *dev, ulong req, void *data, int size);
160
161#endif
162