1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright 2017 NXP
4 */
5
6#ifndef __FSL_QBMAN_H__
7#define __FSL_QBMAN_H__
8void fdt_fixup_qportals(void *blob);
9void fdt_fixup_bportals(void *blob);
10void inhibit_portals(void __iomem *addr, int max_portals,
11		     int arch_max_portals, int portal_cinh_size);
12void setup_qbman_portals(void);
13
14struct ccsr_qman {
15#ifdef CONFIG_SYS_FSL_QMAN_V3
16	u8	res0[0x200];
17#else
18	struct {
19		u32	qcsp_lio_cfg;	/* 0x0 - SW Portal n LIO cfg */
20		u32	qcsp_io_cfg;	/* 0x4 - SW Portal n IO cfg */
21		u32	res;
22		u32	qcsp_dd_cfg;	/* 0xc - SW Portal Dynamic Debug cfg */
23	} qcsp[32];
24#endif
25	/* Not actually reserved, but irrelevant to u-boot */
26	u8	res[0xbf8 - 0x200];
27	u32	ip_rev_1;
28	u32	ip_rev_2;
29	u32	fqd_bare;	/* FQD Extended Base Addr Register */
30	u32	fqd_bar;	/* FQD Base Addr Register */
31	u8	res1[0x8];
32	u32	fqd_ar;		/* FQD Attributes Register */
33	u8	res2[0xc];
34	u32	pfdr_bare;	/* PFDR Extended Base Addr Register */
35	u32	pfdr_bar;	/* PFDR Base Addr Register */
36	u8	res3[0x8];
37	u32	pfdr_ar;	/* PFDR Attributes Register */
38	u8	res4[0x4c];
39	u32	qcsp_bare;	/* QCSP Extended Base Addr Register */
40	u32	qcsp_bar;	/* QCSP Base Addr Register */
41	u8	res5[0x78];
42	u32	ci_sched_cfg;	/* Initiator Scheduling Configuration */
43	u32	srcidr;		/* Source ID Register */
44	u32	liodnr;		/* LIODN Register */
45	u8	res6[4];
46	u32	ci_rlm_cfg;	/* Initiator Read Latency Monitor Cfg */
47	u32	ci_rlm_avg;	/* Initiator Read Latency Monitor Avg */
48	u8	res7[0x2e8];
49#ifdef CONFIG_SYS_FSL_QMAN_V3
50	struct {
51		u32	qcsp_lio_cfg;	/* 0x0 - SW Portal n LIO cfg */
52		u32	qcsp_io_cfg;	/* 0x4 - SW Portal n IO cfg */
53		u32	res;
54		u32	qcsp_dd_cfg;	/* 0xc - SW Portal n Dynamic Debug cfg*/
55	} qcsp[50];
56#endif
57};
58
59struct ccsr_bman {
60	/* Not actually reserved, but irrelevant to u-boot */
61	u8	res[0xbf8];
62	u32	ip_rev_1;
63	u32	ip_rev_2;
64	u32	fbpr_bare;	/* FBPR Extended Base Addr Register */
65	u32	fbpr_bar;	/* FBPR Base Addr Register */
66	u8	res1[0x8];
67	u32	fbpr_ar;	/* FBPR Attributes Register */
68	u8	res2[0xf0];
69	u32	srcidr;		/* Source ID Register */
70	u32	liodnr;		/* LIODN Register */
71	u8	res7[0x2f4];
72};
73
74#endif /* __FSL_QBMAN_H__ */
75