1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * (C) Copyright 2000-2005 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 */ 6 7#ifndef _FLASH_H_ 8#define _FLASH_H_ 9 10/*----------------------------------------------------------------------- 11 * FLASH Info: contains chip specific data, per FLASH bank 12 */ 13 14typedef struct { 15 ulong size; /* total bank size in bytes */ 16 ushort sector_count; /* number of erase units */ 17 ulong flash_id; /* combined device & manufacturer code */ 18 ulong start[CONFIG_SYS_MAX_FLASH_SECT]; /* virtual sector start address */ 19 uchar protect[CONFIG_SYS_MAX_FLASH_SECT]; /* sector protection status */ 20 uchar portwidth; /* the width of the port */ 21 uchar chipwidth; /* the width of the chip */ 22 uchar chip_lsb; /* extra Least Significant Bit in the */ 23 /* address of chip */ 24 ushort buffer_size; /* # of bytes in write buffer */ 25 ulong erase_blk_tout; /* maximum block erase timeout */ 26 ulong write_tout; /* maximum write timeout */ 27 ulong buffer_write_tout; /* maximum buffer write timeout */ 28 ushort vendor; /* the primary vendor id */ 29 ushort cmd_reset; /* vendor specific reset command */ 30 uchar cmd_erase_sector; /* vendor specific erase sect. command */ 31 ushort interface; /* used for x8/x16 adjustments */ 32 ushort legacy_unlock; /* support Intel legacy (un)locking */ 33 ushort manufacturer_id; /* manufacturer id */ 34 ushort device_id; /* device id */ 35 ushort device_id2; /* extended device id */ 36 ushort ext_addr; /* extended query table address */ 37 ushort cfi_version; /* cfi version */ 38 ushort cfi_offset; /* offset for cfi query */ 39 ulong addr_unlock1; /* unlock address 1 for AMD flash roms */ 40 ulong addr_unlock2; /* unlock address 2 for AMD flash roms */ 41 uchar sr_supported; /* status register supported */ 42 const char *name; /* human-readable name */ 43#ifdef CONFIG_DM_MTD 44 struct mtd_info *mtd; 45#endif 46#ifdef CONFIG_CFI_FLASH /* DM-specific parts */ 47 struct udevice *dev; 48 phys_addr_t base; 49 phys_size_t addr_size; 50#endif 51} flash_info_t; 52 53extern flash_info_t flash_info[]; /* info for FLASH chips */ 54 55typedef unsigned long flash_sect_t; 56 57/* 58 * Values for the width of the port 59 */ 60#define FLASH_CFI_8BIT 0x01 61#define FLASH_CFI_16BIT 0x02 62#define FLASH_CFI_32BIT 0x04 63#define FLASH_CFI_64BIT 0x08 64/* 65 * Values for the width of the chip 66 */ 67#define FLASH_CFI_BY8 0x01 68#define FLASH_CFI_BY16 0x02 69#define FLASH_CFI_BY32 0x04 70#define FLASH_CFI_BY64 0x08 71/* 72 * Values for the flash device interface 73 */ 74#define FLASH_CFI_X8 0x00 75#define FLASH_CFI_X16 0x01 76#define FLASH_CFI_X8X16 0x02 77#define FLASH_CFI_X16X32 0x05 78 79/* convert between bit value and numeric value */ 80#define CFI_FLASH_SHIFT_WIDTH 3 81 82/* Prototypes */ 83 84unsigned long flash_init(void); 85void flash_print_info(flash_info_t *info); 86int flash_erase(flash_info_t *info, int s_first, int s_last); 87int flash_sect_erase(ulong addr_first, ulong addr_last); 88int flash_sect_protect(int flag, ulong addr_first, ulong addr_last); 89int flash_sect_roundb(ulong *addr); 90unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect); 91void flash_cmd_reset(flash_info_t *info); 92void flash_set_verbose(uint v); 93 94/* common/flash.c */ 95void flash_protect(int flag, ulong from, ulong to, flash_info_t *info); 96int flash_write(char *src, ulong addr, ulong cnt); 97flash_info_t *addr2info(ulong addr); 98int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt); 99 100/* drivers/mtd/cfi_mtd.c */ 101#ifdef CONFIG_FLASH_CFI_MTD 102extern int cfi_mtd_init(void); 103#endif 104 105/* board/?/flash.c */ 106#if defined(CONFIG_SYS_FLASH_PROTECTION) 107extern int flash_real_protect(flash_info_t *info, long sector, int prot); 108extern void flash_read_user_serial(flash_info_t * info, void * buffer, int offset, int len); 109extern void flash_read_factory_serial(flash_info_t * info, void * buffer, int offset, int len); 110#endif /* CONFIG_SYS_FLASH_PROTECTION */ 111 112#ifdef CONFIG_FLASH_CFI_LEGACY 113extern ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info); 114extern int jedec_flash_match(flash_info_t *info, ulong base); 115#define CFI_CMDSET_AMD_LEGACY 0xFFF0 116#endif 117 118/** 119 * flash_perror() - Print a flash error 120 * 121 * @err: Error number of message to print (ERR_... as below) 122 */ 123void flash_perror(int err); 124 125/*----------------------------------------------------------------------- 126 * return codes from flash_write(): 127 */ 128#define ERR_OK 0 129#define ERR_TIMEOUT 1 130#define ERR_NOT_ERASED 2 131#define ERR_PROTECTED 4 132#define ERR_INVAL 8 133#define ERR_ALIGN 16 134#define ERR_UNKNOWN_FLASH_VENDOR 32 135#define ERR_UNKNOWN_FLASH_TYPE 64 136#define ERR_PROG_ERROR 128 137#define ERR_ABORTED 256 138 139/*----------------------------------------------------------------------- 140 * Protection Flags for flash_protect(): 141 */ 142#define FLAG_PROTECT_SET 0x01 143#define FLAG_PROTECT_CLEAR 0x02 144#define FLAG_PROTECT_INVALID 0x03 145/*----------------------------------------------------------------------- 146 * Set Environment according to label: 147 */ 148#define FLAG_SETENV 0x80 149 150/*----------------------------------------------------------------------- 151 * Device IDs 152 */ 153 154/* Manufacturers inside bank 0 have ids like 0x00xx00xx */ 155#define AMD_MANUFACT 0x00010001 /* AMD manuf. ID in D23..D16, D7..D0 */ 156#define FUJ_MANUFACT 0x00040004 /* FUJITSU manuf. ID in D23..D16, D7..D0 */ 157#define ATM_MANUFACT 0x001F001F /* ATMEL */ 158#define STM_MANUFACT 0x00200020 /* STM (Thomson) manuf. ID in D23.. -"- */ 159#define SST_MANUFACT 0x00BF00BF /* SST manuf. ID in D23..D16, D7..D0 */ 160#define MT_MANUFACT 0x00890089 /* MT manuf. ID in D23..D16, D7..D0 */ 161#define INTEL_MANUFACT 0x00890089 /* INTEL manuf. ID in D23..D16, D7..D0 */ 162#define INTEL_ALT_MANU 0x00B000B0 /* alternate INTEL namufacturer ID */ 163#define MX_MANUFACT 0x00C200C2 /* MXIC manuf. ID in D23..D16, D7..D0 */ 164#define TOSH_MANUFACT 0x00980098 /* TOSHIBA manuf. ID in D23..D16, D7..D0 */ 165#define MT2_MANUFACT 0x002C002C /* alternate MICRON manufacturer ID*/ 166#define EXCEL_MANUFACT 0x004A004A /* Excel Semiconductor */ 167#define AMIC_MANUFACT 0x00370037 /* AMIC manuf. ID in D23..D16, D7..D0 */ 168#define WINB_MANUFACT 0x00DA00DA /* Winbond manuf. ID in D23..D16, D7..D0 */ 169#define EON_ALT_MANU 0x001C001C /* EON manuf. ID in D23..D16, D7..D0 */ 170 171/* Manufacturers inside bank 1 have ids like 0x01xx01xx */ 172#define EON_MANUFACT 0x011C011C /* EON manuf. ID in D23..D16, D7..D0 */ 173 174/* Manufacturers inside bank 2 have ids like 0x02xx02xx */ 175 176 /* Micron Technologies (INTEL compat.) */ 177#define MT_ID_28F400_T 0x44704470 /* 28F400B3 ID ( 4 M, top boot sector) */ 178#define MT_ID_28F400_B 0x44714471 /* 28F400B3 ID ( 4 M, bottom boot sect) */ 179 180#define AMD_ID_LV040B 0x4F /* 29LV040B ID */ 181 /* 4 Mbit, 512K x 8, */ 182 /* 8 64K x 8 uniform sectors */ 183#define AMD_ID_F033C 0xA3 /* 29LV033C ID */ 184 /* 32 Mbit, 4Mbits x 8, */ 185 /* 64 64K x 8 uniform sectors */ 186#define AMD_ID_F065D 0x93 /* 29LV065D ID */ 187 /* 64 Mbit, 8Mbits x 8, */ 188 /* 126 64K x 8 uniform sectors */ 189#define ATM_ID_LV040 0x13 /* 29LV040B ID */ 190 /* 4 Mbit, 512K x 8, */ 191 /* 8 64K x 8 uniform sectors */ 192#define AMD_ID_F040B 0xA4 /* 29F040B ID */ 193 /* 4 Mbit, 512K x 8, */ 194 /* 8 64K x 8 uniform sectors */ 195#define STM_ID_M29W040B 0xE3 /* M29W040B ID */ 196 /* 4 Mbit, 512K x 8, */ 197 /* 8 64K x 8 uniform sectors */ 198#define AMD_ID_F080B 0xD5 /* 29F080 ID ( 1 M) */ 199 /* 8 Mbit, 512K x 16, */ 200 /* 8 64K x 16 uniform sectors */ 201#define AMD_ID_F016D 0xAD /* 29F016 ID ( 2 M x 8) */ 202#define AMD_ID_F032B 0x41 /* 29F032 ID ( 4 M x 8) */ 203#define AMD_ID_LV116DT 0xC7 /* 29LV116DT ( 2 M x 8, top boot sect) */ 204#define AMD_ID_LV116DB 0x4C /* 29LV116DB ( 2 M x 8, bottom boot sect) */ 205#define AMD_ID_LV016B 0xc8 /* 29LV016 ID ( 2 M x 8) */ 206 207#define AMD_ID_PL160CB 0x22452245 /* 29PL160CB ID (16 M, bottom boot sect */ 208 209#define AMD_ID_LV400T 0x22B922B9 /* 29LV400T ID ( 4 M, top boot sector) */ 210#define AMD_ID_LV400B 0x22BA22BA /* 29LV400B ID ( 4 M, bottom boot sect) */ 211 212#define AMD_ID_LV033C 0xA3 /* 29LV033C ID ( 4 M x 8) */ 213#define AMD_ID_LV065D 0x93 /* 29LV065D ID ( 8 M x 8) */ 214 215#define AMD_ID_LV800T 0x22DA22DA /* 29LV800T ID ( 8 M, top boot sector) */ 216#define AMD_ID_LV800B 0x225B225B /* 29LV800B ID ( 8 M, bottom boot sect) */ 217 218#define AMD_ID_LV160T 0x22C422C4 /* 29LV160T ID (16 M, top boot sector) */ 219#define AMD_ID_LV160B 0x22492249 /* 29LV160B ID (16 M, bottom boot sect) */ 220 221#define AMD_ID_DL163T 0x22282228 /* 29DL163T ID (16 M, top boot sector) */ 222#define AMD_ID_DL163B 0x222B222B /* 29DL163B ID (16 M, bottom boot sect) */ 223 224#define AMD_ID_LV320T 0x22F622F6 /* 29LV320T ID (32 M, top boot sector) */ 225#define MX_ID_LV320T 0x22A722A7 /* 29LV320T by Macronix, AMD compatible */ 226#define AMD_ID_LV320B 0x22F922F9 /* 29LV320B ID (32 M, bottom boot sect) */ 227#define MX_ID_LV320B 0x22A822A8 /* 29LV320B by Macronix, AMD compatible */ 228 229#define AMD_ID_DL322T 0x22552255 /* 29DL322T ID (32 M, top boot sector) */ 230#define AMD_ID_DL322B 0x22562256 /* 29DL322B ID (32 M, bottom boot sect) */ 231#define AMD_ID_DL323T 0x22502250 /* 29DL323T ID (32 M, top boot sector) */ 232#define AMD_ID_DL323B 0x22532253 /* 29DL323B ID (32 M, bottom boot sect) */ 233#define AMD_ID_DL324T 0x225C225C /* 29DL324T ID (32 M, top boot sector) */ 234#define AMD_ID_DL324B 0x225F225F /* 29DL324B ID (32 M, bottom boot sect) */ 235 236#define AMD_ID_DL640 0x227E227E /* 29DL640D ID (64 M, dual boot sectors)*/ 237#define AMD_ID_MIRROR 0x227E227E /* 1st ID word for MirrorBit family */ 238#define AMD_ID_DL640G_2 0x22022202 /* 2nd ID word for AM29DL640G at 0x38 */ 239#define AMD_ID_DL640G_3 0x22012201 /* 3rd ID word for AM29DL640G at 0x3c */ 240#define AMD_ID_LV640U_2 0x220C220C /* 2nd ID word for AM29LV640M at 0x38 */ 241#define AMD_ID_LV640U_3 0x22012201 /* 3rd ID word for AM29LV640M at 0x3c */ 242#define AMD_ID_LV640MT_2 0x22102210 /* 2nd ID word for AM29LV640MT at 0x38 */ 243#define AMD_ID_LV640MT_3 0x22012201 /* 3rd ID word for AM29LV640MT at 0x3c */ 244#define AMD_ID_LV640MB_2 0x22102210 /* 2nd ID word for AM29LV640MB at 0x38 */ 245#define AMD_ID_LV640MB_3 0x22002200 /* 3rd ID word for AM29LV640MB at 0x3c */ 246#define AMD_ID_LV128U_2 0x22122212 /* 2nd ID word for AM29LV128M at 0x38 */ 247#define AMD_ID_LV128U_3 0x22002200 /* 3rd ID word for AM29LV128M at 0x3c */ 248#define AMD_ID_LV256U_2 0x22122212 /* 2nd ID word for AM29LV256M at 0x38 */ 249#define AMD_ID_LV256U_3 0x22012201 /* 3rd ID word for AM29LV256M at 0x3c */ 250#define AMD_ID_GL064M_2 0x22132213 /* 2nd ID word for S29GL064M-R6 */ 251#define AMD_ID_GL064M_3 0x22012201 /* 3rd ID word for S29GL064M-R6 */ 252#define AMD_ID_GL064MT_2 0x22102210 /* 2nd ID word for S29GL064M-R3 (top boot sector) */ 253#define AMD_ID_GL064MT_3 0x22012201 /* 3rd ID word for S29GL064M-R3 (top boot sector) */ 254#define AMD_ID_GL128N_2 0x22212221 /* 2nd ID word for S29GL128N */ 255#define AMD_ID_GL128N_3 0x22012201 /* 3rd ID word for S29GL128N */ 256 257 258#define AMD_ID_LV320B_2 0x221A221A /* 2d ID word for AM29LV320MB at 0x38 */ 259#define AMD_ID_LV320B_3 0x22002200 /* 3d ID word for AM29LV320MB at 0x3c */ 260 261#define AMD_ID_LV640U 0x22D722D7 /* 29LV640U ID (64 M, uniform sectors) */ 262#define AMD_ID_LV650U 0x22D722D7 /* 29LV650U ID (64 M, uniform sectors) */ 263 264#define ATM_ID_BV1614 0x000000C0 /* 49BV1614 ID */ 265#define ATM_ID_BV1614A 0x000000C8 /* 49BV1614A ID */ 266#define ATM_ID_BV6416 0x000000D6 /* 49BV6416 ID */ 267 268#define FUJI_ID_29F800BA 0x22582258 /* MBM29F800BA ID (8M) */ 269#define FUJI_ID_29F800TA 0x22D622D6 /* MBM29F800TA ID (8M) */ 270#define FUJI_ID_29LV650UE 0x22d722d7 /* MBM29LV650UE/651UE ID (8M = 128 x 32kWord) */ 271 272#define SST_ID_xF200A 0x27892789 /* 39xF200A ID ( 2M = 128K x 16 ) */ 273#define SST_ID_xF400A 0x27802780 /* 39xF400A ID ( 4M = 256K x 16 ) */ 274#define SST_ID_xF800A 0x27812781 /* 39xF800A ID ( 8M = 512K x 16 ) */ 275#define SST_ID_xF160A 0x27822782 /* 39xF800A ID (16M = 1M x 16 ) */ 276#define SST_ID_xF1601 0x234B234B /* 39xF1601 ID (16M = 1M x 16 ) */ 277#define SST_ID_xF1602 0x234A234A /* 39xF1602 ID (16M = 1M x 16 ) */ 278#define SST_ID_xF3201 0x235B235B /* 39xF3201 ID (32M = 2M x 16 ) */ 279#define SST_ID_xF3202 0x235A235A /* 39xF3202 ID (32M = 2M x 16 ) */ 280#define SST_ID_xF6401 0x236B236B /* 39xF6401 ID (64M = 4M x 16 ) */ 281#define SST_ID_xF6402 0x236A236A /* 39xF6402 ID (64M = 4M x 16 ) */ 282#define SST_ID_xF020 0xBFD6BFD6 /* 39xF020 ID (256KB = 2Mbit x 8) */ 283#define SST_ID_xF040 0xBFD7BFD7 /* 39xF040 ID (512KB = 4Mbit x 8) */ 284 285#define STM_ID_F040B 0xE2 /* M29F040B ID ( 4M = 512K x 8 ) */ 286 /* 8 64K x 8 uniform sectors */ 287 288#define STM_ID_x800AB 0x005B005B /* M29W800AB ID (8M = 512K x 16 ) */ 289#define STM_ID_29W320DT 0x22CA22CA /* M29W320DT ID (32 M, top boot sector) */ 290#define STM_ID_29W320DB 0x22CB22CB /* M29W320DB ID (32 M, bottom boot sect) */ 291#define STM_ID_29W320ET 0x22562256 /* M29W320ET ID (32 M, top boot sector) */ 292#define STM_ID_29W320EB 0x22572257 /* M29W320EB ID (32 M, bottom boot sect)*/ 293#define STM_ID_29W040B 0x00E300E3 /* M29W040B ID (4M = 512K x 8) */ 294#define FLASH_PSD4256GV 0x00E9 /* PSD4256 Flash and CPLD combination */ 295 296#define INTEL_ID_28F016S 0x66a066a0 /* 28F016S[VS] ID (16M = 512k x 16) */ 297#define INTEL_ID_28F800B3T 0x88928892 /* 8M = 512K x 16 top boot sector */ 298#define INTEL_ID_28F800B3B 0x88938893 /* 8M = 512K x 16 bottom boot sector */ 299#define INTEL_ID_28F160B3T 0x88908890 /* 16M = 1M x 16 top boot sector */ 300#define INTEL_ID_28F160B3B 0x88918891 /* 16M = 1M x 16 bottom boot sector */ 301#define INTEL_ID_28F320B3T 0x88968896 /* 32M = 2M x 16 top boot sector */ 302#define INTEL_ID_28F320B3B 0x88978897 /* 32M = 2M x 16 bottom boot sector */ 303#define INTEL_ID_28F640B3T 0x88988898 /* 64M = 4M x 16 top boot sector */ 304#define INTEL_ID_28F640B3B 0x88998899 /* 64M = 4M x 16 bottom boot sector */ 305#define INTEL_ID_28F160F3B 0x88F488F4 /* 16M = 1M x 16 bottom boot sector */ 306 307#define INTEL_ID_28F800C3T 0x88C088C0 /* 8M = 512K x 16 top boot sector */ 308#define INTEL_ID_28F800C3B 0x88C188C1 /* 8M = 512K x 16 bottom boot sector */ 309#define INTEL_ID_28F160C3T 0x88C288C2 /* 16M = 1M x 16 top boot sector */ 310#define INTEL_ID_28F160C3B 0x88C388C3 /* 16M = 1M x 16 bottom boot sector */ 311#define INTEL_ID_28F320C3T 0x88C488C4 /* 32M = 2M x 16 top boot sector */ 312#define INTEL_ID_28F320C3B 0x88C588C5 /* 32M = 2M x 16 bottom boot sector */ 313#define INTEL_ID_28F640C3T 0x88CC88CC /* 64M = 4M x 16 top boot sector */ 314#define INTEL_ID_28F640C3B 0x88CD88CD /* 64M = 4M x 16 bottom boot sector */ 315 316#define INTEL_ID_28F128J3 0x89188918 /* 16M = 8M x 16 x 128 */ 317#define INTEL_ID_28F320J5 0x00140014 /* 32M = 128K x 32 */ 318#define INTEL_ID_28F640J5 0x00150015 /* 64M = 128K x 64 */ 319#define INTEL_ID_28F320J3A 0x00160016 /* 32M = 128K x 32 */ 320#define INTEL_ID_28F640J3A 0x00170017 /* 64M = 128K x 64 */ 321#define INTEL_ID_28F128J3A 0x00180018 /* 128M = 128K x 128 */ 322#define INTEL_ID_28F256J3A 0x001D001D /* 256M = 128K x 256 */ 323#define INTEL_ID_28F256L18T 0x880D880D /* 256M = 128K x 255 + 32k x 4 */ 324#define INTEL_ID_28F64K3 0x88018801 /* 64M = 32K x 255 + 32k x 4 */ 325#define INTEL_ID_28F128K3 0x88028802 /* 128M = 64K x 255 + 32k x 4 */ 326#define INTEL_ID_28F256K3 0x88038803 /* 256M = 128K x 255 + 32k x 4 */ 327#define INTEL_ID_28F64P30T 0x88178817 /* 64M = 32K x 255 + 32k x 4 */ 328#define INTEL_ID_28F64P30B 0x881A881A /* 64M = 32K x 255 + 32k x 4 */ 329#define INTEL_ID_28F128P30T 0x88188818 /* 128M = 64K x 255 + 32k x 4 */ 330#define INTEL_ID_28F128P30B 0x881B881B /* 128M = 64K x 255 + 32k x 4 */ 331#define INTEL_ID_28F256P30T 0x88198819 /* 256M = 128K x 255 + 32k x 4 */ 332#define INTEL_ID_28F256P30B 0x881C881C /* 256M = 128K x 255 + 32k x 4 */ 333 334#define INTEL_ID_28F160S3 0x00D000D0 /* 16M = 512K x 32 (64kB x 32) */ 335#define INTEL_ID_28F320S3 0x00D400D4 /* 32M = 512K x 64 (64kB x 64) */ 336 337/* Note that the Sharp 28F016SC is compatible with the Intel E28F016SC */ 338#define SHARP_ID_28F016SCL 0xAAAAAAAA /* LH28F016SCT-L95 2Mx8, 32 64k blocks */ 339#define SHARP_ID_28F016SCZ 0xA0A0A0A0 /* LH28F016SCT-Z4 2Mx8, 32 64k blocks */ 340#define SHARP_ID_28F008SC 0xA6A6A6A6 /* LH28F008SCT-L12 1Mx8, 16 64k blocks */ 341 /* LH28F008SCR-L85 1Mx8, 16 64k blocks */ 342 343#define TOSH_ID_FVT160 0xC2 /* TC58FVT160 ID (16 M, top ) */ 344#define TOSH_ID_FVB160 0x43 /* TC58FVT160 ID (16 M, bottom ) */ 345#define NUMONYX_256MBIT 0x8922 /* Numonyx P33/30 256MBit 65nm */ 346 347/*----------------------------------------------------------------------- 348 * Internal FLASH identification codes 349 * 350 * Be careful when adding new type! Odd numbers are "bottom boot sector" types! 351 */ 352 353#define FLASH_AM040 0x0001 /* AMD Am29F040B, Am29LV040B */ 354 /* Bright Micro BM29F040 */ 355 /* Fujitsu MBM29F040A */ 356 /* STM M29W040B */ 357 /* SGS Thomson M29F040B */ 358 /* 8 64K x 8 uniform sectors */ 359#define FLASH_AM400T 0x0002 /* AMD AM29LV400 */ 360#define FLASH_AM400B 0x0003 361#define FLASH_AM800T 0x0004 /* AMD AM29LV800 */ 362#define FLASH_AM800B 0x0005 363#define FLASH_AM116DT 0x0026 /* AMD AM29LV116DT (2Mx8bit) */ 364#define FLASH_AM116DB 0x0027 /* AMD AM29LV116DB (2Mx8bit) */ 365#define FLASH_AM160T 0x0006 /* AMD AM29LV160 */ 366#define FLASH_AM160LV 0x0046 /* AMD29LV160DB (2M = 2Mx8bit ) */ 367#define FLASH_AM160B 0x0007 368#define FLASH_AM320T 0x0008 /* AMD AM29LV320 */ 369#define FLASH_AM320B 0x0009 370 371#define FLASH_AM080 0x000A /* AMD Am29F080B */ 372 /* 16 64K x 8 uniform sectors */ 373 374#define FLASH_AMDL322T 0x0010 /* AMD AM29DL322 */ 375#define FLASH_AMDL322B 0x0011 376#define FLASH_AMDL323T 0x0012 /* AMD AM29DL323 */ 377#define FLASH_AMDL323B 0x0013 378#define FLASH_AMDL324T 0x0014 /* AMD AM29DL324 */ 379#define FLASH_AMDL324B 0x0015 380 381#define FLASH_AMDLV033C 0x0018 382#define FLASH_AMDLV065D 0x001A 383 384#define FLASH_AMDL640 0x0016 /* AMD AM29DL640D */ 385#define FLASH_AMD016 0x0018 /* AMD AM29F016D */ 386#define FLASH_AMDL640MB 0x0019 /* AMD AM29LV640MB (64M, bottom boot sect)*/ 387#define FLASH_AMDL640MT 0x001A /* AMD AM29LV640MT (64M, top boot sect) */ 388 389#define FLASH_SST200A 0x0040 /* SST 39xF200A ID ( 2M = 128K x 16 ) */ 390#define FLASH_SST400A 0x0042 /* SST 39xF400A ID ( 4M = 256K x 16 ) */ 391#define FLASH_SST800A 0x0044 /* SST 39xF800A ID ( 8M = 512K x 16 ) */ 392#define FLASH_SST160A 0x0046 /* SST 39xF160A ID ( 16M = 1M x 16 ) */ 393#define FLASH_SST320 0x0048 /* SST 39xF160A ID ( 16M = 1M x 16 ) */ 394#define FLASH_SST640 0x004A /* SST 39xF160A ID ( 16M = 1M x 16 ) */ 395#define FLASH_SST020 0x0024 /* SST 39xF020 ID (256KB = 2Mbit x 8 ) */ 396#define FLASH_SST040 0x000E /* SST 39xF040 ID (512KB = 4Mbit x 8 ) */ 397 398#define FLASH_STM800AB 0x0051 /* STM M29WF800AB ( 8M = 512K x 16 ) */ 399#define FLASH_STMW320DT 0x0052 /* STM M29W320DT (32 M, top boot sector) */ 400#define FLASH_STMW320DB 0x0053 /* STM M29W320DB (32 M, bottom boot sect)*/ 401#define FLASH_STM320DB 0x00CB /* STM M29W320DB (4M = 64K x 64, bottom)*/ 402#define FLASH_STM800DT 0x00D7 /* STM M29W800DT (1M = 64K x 16, top) */ 403#define FLASH_STM800DB 0x005B /* STM M29W800DB (1M = 64K x 16, bottom)*/ 404 405#define FLASH_MCHP100T 0x0060 /* MCHP internal (1M = 64K x 16) */ 406#define FLASH_MCHP100B 0x0061 /* MCHP internal (1M = 64K x 16) */ 407 408#define FLASH_28F400_T 0x0062 /* MT 28F400B3 ID ( 4M = 256K x 16 ) */ 409#define FLASH_28F400_B 0x0063 /* MT 28F400B3 ID ( 4M = 256K x 16 ) */ 410 411#define FLASH_INTEL800T 0x0074 /* INTEL 28F800B3T ( 8M = 512K x 16 ) */ 412#define FLASH_INTEL800B 0x0075 /* INTEL 28F800B3B ( 8M = 512K x 16 ) */ 413#define FLASH_INTEL160T 0x0076 /* INTEL 28F160B3T ( 16M = 1 M x 16 ) */ 414#define FLASH_INTEL160B 0x0077 /* INTEL 28F160B3B ( 16M = 1 M x 16 ) */ 415#define FLASH_INTEL320T 0x0078 /* INTEL 28F320B3T ( 32M = 2 M x 16 ) */ 416#define FLASH_INTEL320B 0x0079 /* INTEL 28F320B3B ( 32M = 2 M x 16 ) */ 417#define FLASH_INTEL640T 0x007A /* INTEL 28F320B3T ( 64M = 4 M x 16 ) */ 418#define FLASH_INTEL640B 0x007B /* INTEL 28F320B3B ( 64M = 4 M x 16 ) */ 419 420#define FLASH_28F008S5 0x0080 /* Intel 28F008S5 ( 1M = 64K x 16 ) */ 421#define FLASH_28F016SV 0x0081 /* Intel 28F016SV ( 16M = 512k x 32 ) */ 422#define FLASH_28F800_B 0x0083 /* Intel E28F800B ( 1M = ? ) */ 423#define FLASH_AM29F800B 0x0084 /* AMD Am29F800BB ( 1M = ? ) */ 424#define FLASH_28F320J5 0x0085 /* Intel 28F320J5 ( 4M = 128K x 32 ) */ 425#define FLASH_28F160S3 0x0086 /* Intel 28F160S3 ( 16M = 512K x 32 ) */ 426#define FLASH_28F320S3 0x0088 /* Intel 28F320S3 ( 32M = 512K x 64 ) */ 427#define FLASH_AM640U 0x0090 /* AMD Am29LV640U ( 64M = 4M x 16 ) */ 428#define FLASH_AM033C 0x0091 /* AMD AM29LV033 ( 32M = 4M x 8 ) */ 429#define FLASH_LH28F016SCT 0x0092 /* Sharp 28F016SCT ( 8 Meg Flash SIMM ) */ 430#define FLASH_28F160F3B 0x0093 /* Intel 28F160F3B ( 16M = 1M x 16 ) */ 431#define FLASH_AM065D 0x0093 432 433#define FLASH_28F640J5 0x0099 /* INTEL 28F640J5 ( 64M = 128K x 64) */ 434 435#define FLASH_28F800C3T 0x009A /* Intel 28F800C3T ( 8M = 512K x 16 ) */ 436#define FLASH_28F800C3B 0x009B /* Intel 28F800C3B ( 8M = 512K x 16 ) */ 437#define FLASH_28F160C3T 0x009C /* Intel 28F160C3T ( 16M = 1M x 16 ) */ 438#define FLASH_28F160C3B 0x009D /* Intel 28F160C3B ( 16M = 1M x 16 ) */ 439#define FLASH_28F320C3T 0x009E /* Intel 28F320C3T ( 32M = 2M x 16 ) */ 440#define FLASH_28F320C3B 0x009F /* Intel 28F320C3B ( 32M = 2M x 16 ) */ 441#define FLASH_28F640C3T 0x00A0 /* Intel 28F640C3T ( 64M = 4M x 16 ) */ 442#define FLASH_28F640C3B 0x00A1 /* Intel 28F640C3B ( 64M = 4M x 16 ) */ 443#define FLASH_AMLV320U 0x00A2 /* AMD 29LV320M ( 32M = 2M x 16 ) */ 444 445#define FLASH_AM033 0x00A3 /* AMD AmL033C90V1 (32M = 4M x 8) */ 446#define FLASH_AM065 0x0093 /* AMD AmL065DU12RI (64M = 8M x 8) */ 447#define FLASH_AT040 0x00A5 /* Amtel AT49LV040 (4M = 512K x 8) */ 448 449#define FLASH_AMLV640U 0x00A4 /* AMD 29LV640M ( 64M = 4M x 16 ) */ 450#define FLASH_AMLV128U 0x00A6 /* AMD 29LV128M ( 128M = 8M x 16 ) */ 451#define FLASH_AMLV320B 0x00A7 /* AMD 29LV320MB ( 32M = 2M x 16 ) */ 452#define FLASH_AMLV320T 0x00A8 /* AMD 29LV320MT ( 32M = 2M x 16 ) */ 453#define FLASH_AMLV256U 0x00AA /* AMD 29LV256M ( 256M = 16M x 16 ) */ 454#define FLASH_MXLV320B 0x00AB /* MX 29LV320MB ( 32M = 2M x 16 ) */ 455#define FLASH_MXLV320T 0x00AC /* MX 29LV320MT ( 32M = 2M x 16 ) */ 456#define FLASH_28F256L18T 0x00B0 /* Intel 28F256L18T 256M = 128K x 255 + 32k x 4 */ 457#define FLASH_AMDL163T 0x00B2 /* AMD AM29DL163T (2M x 16 ) */ 458#define FLASH_AMDL163B 0x00B3 459#define FLASH_28F64K3 0x00B4 /* Intel 28F64K3 ( 64M) */ 460#define FLASH_28F128K3 0x00B6 /* Intel 28F128K3 ( 128M = 8M x 16 ) */ 461#define FLASH_28F256K3 0x00B8 /* Intel 28F256K3 ( 256M = 16M x 16 ) */ 462 463#define FLASH_28F320J3A 0x00C0 /* INTEL 28F320J3A ( 32M = 128K x 32) */ 464#define FLASH_28F640J3A 0x00C2 /* INTEL 28F640J3A ( 64M = 128K x 64) */ 465#define FLASH_28F128J3A 0x00C4 /* INTEL 28F128J3A (128M = 128K x 128) */ 466#define FLASH_28F256J3A 0x00C6 /* INTEL 28F256J3A (256M = 128K x 256) */ 467 468#define FLASH_FUJLV650 0x00D0 /* Fujitsu MBM 29LV650UE/651UE */ 469#define FLASH_MT28S4M16LC 0x00E1 /* Micron MT28S4M16LC */ 470#define FLASH_S29GL064M 0x00F0 /* Spansion S29GL064M-R6 */ 471#define FLASH_S29GL128N 0x00F1 /* Spansion S29GL128N */ 472 473#define FLASH_STM32 0x00F2 /* STM32 Embedded Flash */ 474 475#define FLASH_UNKNOWN 0xFFFF /* unknown flash type */ 476 477 478/* manufacturer offsets 479 */ 480#define FLASH_MAN_AMD 0x00000000 /* AMD */ 481#define FLASH_MAN_FUJ 0x00010000 /* Fujitsu */ 482#define FLASH_MAN_BM 0x00020000 /* Bright Microelectronics */ 483#define FLASH_MAN_MX 0x00030000 /* MXIC */ 484#define FLASH_MAN_STM 0x00040000 485#define FLASH_MAN_TOSH 0x00050000 /* Toshiba */ 486#define FLASH_MAN_EXCEL 0x00060000 /* Excel Semiconductor */ 487#define FLASH_MAN_SST 0x00100000 488#define FLASH_MAN_INTEL 0x00300000 489#define FLASH_MAN_MT 0x00400000 490#define FLASH_MAN_SHARP 0x00500000 491#define FLASH_MAN_ATM 0x00600000 492#define FLASH_MAN_CFI 0x01000000 493#define FLASH_MAN_MCHP 0x02000000 /* Microchip Technology */ 494 495#define FLASH_TYPEMASK 0x0000FFFF /* extract FLASH type information */ 496#define FLASH_VENDMASK 0xFFFF0000 /* extract FLASH vendor information */ 497 498#define FLASH_AMD_COMP 0x000FFFFF /* Up to this ID, FLASH is compatible */ 499 /* with AMD, Fujitsu and SST */ 500 /* (JEDEC standard commands ?) */ 501 502#define FLASH_BTYPE 0x0001 /* mask for bottom boot sector type */ 503 504/*----------------------------------------------------------------------- 505 * Timeout constants: 506 * 507 * We can't find any specifications for maximum chip erase times, 508 * so these values are guestimates. 509 */ 510#define FLASH_ERASE_TIMEOUT 120000 /* timeout for erasing in ms */ 511#define FLASH_WRITE_TIMEOUT 500 /* timeout for writes in ms */ 512 513#endif /* _FLASH_H_ */ 514