1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * Common board functions for siemens AT91SAM9G45 based boards 4 * (C) Copyright 2013 Siemens AG 5 * 6 * Based on: 7 * U-Boot file: include/configs/at91sam9m10g45ek.h 8 * (C) Copyright 2007-2008 9 * Stelian Pop <stelian@popies.net> 10 * Lead Tech Design <www.leadtechdesign.com> 11 */ 12 13#ifndef __CONFIG_H 14#define __CONFIG_H 15 16#include <asm/hardware.h> 17#include <linux/sizes.h> 18 19/* 20 * Warning: changing CONFIG_TEXT_BASE requires 21 * adapting the initial boot program. 22 * Since the linker has to swallow that define, we must use a pure 23 * hex number here! 24 */ 25 26/* ARM asynchronous clock */ 27#define CFG_SYS_AT91_SLOW_CLOCK 32768 28#define CFG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ 29 30/* serial console */ 31#define CFG_USART_BASE ATMEL_BASE_DBGU 32#define CFG_USART_ID ATMEL_ID_SYS 33 34/* SDRAM */ 35#define CFG_SYS_SDRAM_BASE ATMEL_BASE_CS6 36#define CFG_SYS_SDRAM_SIZE 0x08000000 37 38/* NAND flash */ 39#ifdef CONFIG_CMD_NAND 40#define CFG_SYS_NAND_BASE ATMEL_BASE_CS3 41/* our ALE is AD21 */ 42#define CFG_SYS_NAND_MASK_ALE (1 << 21) 43/* our CLE is AD22 */ 44#define CFG_SYS_NAND_MASK_CLE (1 << 22) 45#define CFG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 46#define CFG_SYS_NAND_READY_PIN AT91_PIN_PC8 47#endif 48 49/* DFU class support */ 50#define DFU_MANIFEST_POLL_TIMEOUT 25000 51 52/* bootstrap + u-boot + env in nandflash */ 53 54/* Defines for SPL */ 55 56#define CFG_SYS_NAND_U_BOOT_SIZE 0x80000 57#define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE 58#define CFG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE 59 60#define CFG_SYS_NAND_ECCSIZE 256 61#define CFG_SYS_NAND_ECCBYTES 3 62#define CFG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ 63 48, 49, 50, 51, 52, 53, 54, 55, \ 64 56, 57, 58, 59, 60, 61, 62, 63, } 65 66#define CFG_SYS_MASTER_CLOCK 132096000 67#define AT91_PLL_LOCK_TIMEOUT 1000000 68#define CFG_SYS_AT91_PLLA 0x20c73f03 69#define CFG_SYS_MCKR 0x1301 70#define CFG_SYS_MCKR_CSS 0x1302 71 72#endif 73