1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Amlogic Meson Video Processing Unit driver
4 *
5 * Copyright (c) 2018 BayLibre, SAS.
6 * Author: Neil Armstrong <narmstrong@baylibre.com>
7 */
8
9#include <common.h>
10#include <display.h>
11#include <dm.h>
12#include <efi_loader.h>
13#include <fdt_support.h>
14#include <log.h>
15#include <part.h>
16#include <linux/sizes.h>
17#include <asm/arch/mem.h>
18#include <asm/global_data.h>
19#include <dm/device-internal.h>
20#include <dm/uclass-internal.h>
21
22#include "meson_vpu.h"
23#include "meson_registers.h"
24#include "simplefb_common.h"
25
26#define MESON_VPU_OVERSCAN SZ_64K
27
28/* Static variable for use in meson_vpu_rsv_fb() */
29static struct meson_framebuffer {
30	u64 base;
31	u64 fb_size;
32	unsigned int xsize;
33	unsigned int ysize;
34	bool is_cvbs;
35} meson_fb = { 0 };
36
37bool meson_vpu_is_compatible(struct meson_vpu_priv *priv,
38			     enum vpu_compatible family)
39{
40	enum vpu_compatible compat = dev_get_driver_data(priv->dev);
41
42	return compat == family;
43}
44
45static int meson_vpu_setup_mode(struct udevice *dev, struct udevice *disp)
46{
47	struct video_uc_plat *uc_plat = dev_get_uclass_plat(dev);
48	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
49	struct display_timing timing;
50	bool is_cvbs = false;
51	int ret = 0;
52
53	if (disp) {
54		ret = display_read_timing(disp, &timing);
55		if (ret) {
56			debug("%s: Failed to read timings\n", __func__);
57			goto cvbs;
58		}
59
60		uc_priv->xsize = timing.hactive.typ;
61		uc_priv->ysize = timing.vactive.typ;
62
63		ret = display_enable(disp, 0, &timing);
64		if (ret)
65			goto cvbs;
66	} else {
67cvbs:
68		/* CVBS has a fixed 720x480i (NTSC) and 720x576i (PAL) */
69		is_cvbs = true;
70		timing.flags = DISPLAY_FLAGS_INTERLACED;
71		uc_priv->xsize = 720;
72		uc_priv->ysize = 576;
73	}
74
75	uc_priv->bpix = VPU_MAX_LOG2_BPP;
76
77	meson_fb.is_cvbs = is_cvbs;
78	meson_fb.xsize = uc_priv->xsize;
79	meson_fb.ysize = uc_priv->ysize;
80
81	/* Move the framebuffer to the end of addressable ram */
82	meson_fb.fb_size = ALIGN(meson_fb.xsize * meson_fb.ysize *
83				 ((1 << VPU_MAX_LOG2_BPP) / 8) +
84				 MESON_VPU_OVERSCAN, EFI_PAGE_SIZE);
85	meson_fb.base = gd->bd->bi_dram[0].start +
86			gd->bd->bi_dram[0].size - meson_fb.fb_size;
87
88	/* Override the framebuffer address */
89	uc_plat->base = meson_fb.base;
90
91	meson_vpu_setup_plane(dev, timing.flags & DISPLAY_FLAGS_INTERLACED);
92	meson_vpu_setup_venc(dev, &timing, is_cvbs);
93	meson_vpu_setup_vclk(dev, &timing, is_cvbs);
94
95	video_set_flush_dcache(dev, 1);
96
97	return 0;
98}
99
100static const struct udevice_id meson_vpu_ids[] = {
101	{ .compatible = "amlogic,meson-gxbb-vpu", .data = VPU_COMPATIBLE_GXBB },
102	{ .compatible = "amlogic,meson-gxl-vpu", .data = VPU_COMPATIBLE_GXL },
103	{ .compatible = "amlogic,meson-gxm-vpu", .data = VPU_COMPATIBLE_GXM },
104	{ .compatible = "amlogic,meson-g12a-vpu", .data = VPU_COMPATIBLE_G12A },
105	{ }
106};
107
108static int meson_vpu_probe(struct udevice *dev)
109{
110	struct meson_vpu_priv *priv = dev_get_priv(dev);
111	struct udevice *disp;
112	int ret;
113
114	/* Before relocation we don't need to do anything */
115	if (!(gd->flags & GD_FLG_RELOC))
116		return 0;
117
118	priv->dev = dev;
119
120	priv->io_base = dev_remap_addr_index(dev, 0);
121	if (!priv->io_base)
122		return -EINVAL;
123
124	priv->hhi_base = dev_remap_addr_index(dev, 1);
125	if (!priv->hhi_base)
126		return -EINVAL;
127
128	priv->dmc_base = dev_remap_addr_index(dev, 2);
129	if (!priv->dmc_base)
130		return -EINVAL;
131
132	meson_vpu_init(dev);
133
134	/* probe the display */
135	ret = uclass_get_device(UCLASS_DISPLAY, 0, &disp);
136
137	return meson_vpu_setup_mode(dev, ret ? NULL : disp);
138}
139
140static int meson_vpu_bind(struct udevice *dev)
141{
142	struct video_uc_plat *plat = dev_get_uclass_plat(dev);
143
144	plat->size = VPU_MAX_WIDTH * VPU_MAX_HEIGHT *
145		(1 << VPU_MAX_LOG2_BPP) / 8;
146
147	return 0;
148}
149
150#if defined(CONFIG_VIDEO_DT_SIMPLEFB)
151static void meson_vpu_setup_simplefb(void *fdt)
152{
153	const char *pipeline = NULL;
154	u64 mem_start, mem_size;
155	int offset, ret;
156
157	if (meson_fb.is_cvbs)
158		pipeline = "vpu-cvbs";
159	else
160		pipeline = "vpu-hdmi";
161
162	offset = meson_simplefb_fdt_match(fdt, pipeline);
163	if (offset < 0) {
164		eprintf("Cannot setup simplefb: node not found\n");
165
166		/* If simplefb is missing, add it as reserved memory */
167		meson_board_add_reserved_memory(fdt, meson_fb.base,
168						meson_fb.fb_size);
169
170		return;
171	}
172
173	/*
174	 * SimpleFB will try to iomap the framebuffer, so we can't use
175	 * fdt_add_mem_rsv on the memory area. Instead, the FB is stored
176	 * at the end of the RAM and we strip this portion from the kernel
177	 * allowed region
178	 */
179	mem_start = gd->bd->bi_dram[0].start;
180	mem_size = gd->bd->bi_dram[0].size - meson_fb.fb_size;
181	ret = fdt_fixup_memory_banks(fdt, &mem_start, &mem_size, 1);
182	if (ret) {
183		eprintf("Cannot setup simplefb: Error reserving memory\n");
184		return;
185	}
186
187	ret = fdt_setup_simplefb_node(fdt, offset, meson_fb.base,
188				      meson_fb.xsize, meson_fb.ysize,
189				      meson_fb.xsize * 4, "x8r8g8b8");
190	if (ret)
191		eprintf("Cannot setup simplefb: Error setting properties\n");
192}
193#endif
194
195void meson_vpu_rsv_fb(void *fdt)
196{
197	if (!meson_fb.base || !meson_fb.xsize || !meson_fb.ysize)
198		return;
199
200#if defined(CONFIG_EFI_LOADER)
201	efi_add_memory_map(meson_fb.base, meson_fb.fb_size,
202			   EFI_RESERVED_MEMORY_TYPE);
203#endif
204#if defined(CONFIG_VIDEO_DT_SIMPLEFB)
205	meson_vpu_setup_simplefb(fdt);
206#endif
207}
208
209U_BOOT_DRIVER(meson_vpu) = {
210	.name = "meson_vpu",
211	.id = UCLASS_VIDEO,
212	.of_match = meson_vpu_ids,
213	.probe = meson_vpu_probe,
214	.bind = meson_vpu_bind,
215	.priv_auto	= sizeof(struct meson_vpu_priv),
216	.flags  = DM_FLAG_PRE_RELOC | DM_FLAG_LEAVE_PD_ON,
217};
218