1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * drivers/usb/gadget/dwc2_udc_otg.c
4 * Designware DWC2 on-chip full/high speed USB OTG 2.0 device controllers
5 *
6 * Copyright (C) 2008 for Samsung Electronics
7 *
8 * BSP Support for Samsung's UDC driver
9 * available at:
10 * git://git.kernel.org/pub/scm/linux/kernel/git/kki_ap/linux-2.6-samsung.git
11 *
12 * State machine bugfixes:
13 * Marek Szyprowski <m.szyprowski@samsung.com>
14 *
15 * Ported to u-boot:
16 * Marek Szyprowski <m.szyprowski@samsung.com>
17 * Lukasz Majewski <l.majewski@samsumg.com>
18 */
19#undef DEBUG
20#include <common.h>
21#include <clk.h>
22#include <dm.h>
23#include <generic-phy.h>
24#include <log.h>
25#include <malloc.h>
26#include <reset.h>
27#include <dm/device_compat.h>
28#include <dm/devres.h>
29#include <linux/bug.h>
30#include <linux/delay.h>
31#include <linux/printk.h>
32
33#include <linux/errno.h>
34#include <linux/list.h>
35
36#include <linux/usb/ch9.h>
37#include <linux/usb/otg.h>
38#include <linux/usb/gadget.h>
39
40#include <phys2bus.h>
41#include <asm/byteorder.h>
42#include <asm/unaligned.h>
43#include <asm/io.h>
44
45#include <asm/mach-types.h>
46
47#include <power/regulator.h>
48
49#include "dwc2_udc_otg_regs.h"
50#include "dwc2_udc_otg_priv.h"
51
52/***********************************************************/
53
54#define OTG_DMA_MODE		1
55
56#define DEBUG_SETUP 0
57#define DEBUG_EP0 0
58#define DEBUG_ISR 0
59#define DEBUG_OUT_EP 0
60#define DEBUG_IN_EP 0
61
62#include <usb/dwc2_udc.h>
63
64#define EP0_CON		0
65#define EP_MASK		0xF
66
67static char *state_names[] = {
68	"WAIT_FOR_SETUP",
69	"DATA_STATE_XMIT",
70	"DATA_STATE_NEED_ZLP",
71	"WAIT_FOR_OUT_STATUS",
72	"DATA_STATE_RECV",
73	"WAIT_FOR_COMPLETE",
74	"WAIT_FOR_OUT_COMPLETE",
75	"WAIT_FOR_IN_COMPLETE",
76	"WAIT_FOR_NULL_COMPLETE",
77};
78
79#define DRIVER_VERSION "15 March 2009"
80
81struct dwc2_udc	*the_controller;
82
83static const char driver_name[] = "dwc2-udc";
84static const char ep0name[] = "ep0-control";
85
86/* Max packet size*/
87static unsigned int ep0_fifo_size = 64;
88static unsigned int ep_fifo_size =  512;
89static unsigned int ep_fifo_size2 = 1024;
90static int reset_available = 1;
91
92static struct usb_ctrlrequest *usb_ctrl;
93static dma_addr_t usb_ctrl_dma_addr;
94
95/*
96  Local declarations.
97*/
98static int dwc2_ep_enable(struct usb_ep *ep,
99			 const struct usb_endpoint_descriptor *);
100static int dwc2_ep_disable(struct usb_ep *ep);
101static struct usb_request *dwc2_alloc_request(struct usb_ep *ep,
102					     gfp_t gfp_flags);
103static void dwc2_free_request(struct usb_ep *ep, struct usb_request *);
104
105static int dwc2_queue(struct usb_ep *ep, struct usb_request *, gfp_t gfp_flags);
106static int dwc2_dequeue(struct usb_ep *ep, struct usb_request *);
107static int dwc2_fifo_status(struct usb_ep *ep);
108static void dwc2_fifo_flush(struct usb_ep *ep);
109static void dwc2_ep0_read(struct dwc2_udc *dev);
110static void dwc2_ep0_kick(struct dwc2_udc *dev, struct dwc2_ep *ep);
111static void dwc2_handle_ep0(struct dwc2_udc *dev);
112static int dwc2_ep0_write(struct dwc2_udc *dev);
113static int write_fifo_ep0(struct dwc2_ep *ep, struct dwc2_request *req);
114static void done(struct dwc2_ep *ep, struct dwc2_request *req, int status);
115static void stop_activity(struct dwc2_udc *dev,
116			  struct usb_gadget_driver *driver);
117static int udc_enable(struct dwc2_udc *dev);
118static void udc_set_address(struct dwc2_udc *dev, unsigned char address);
119static void reconfig_usbd(struct dwc2_udc *dev);
120static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed);
121static void nuke(struct dwc2_ep *ep, int status);
122static int dwc2_udc_set_halt(struct usb_ep *_ep, int value);
123static void dwc2_udc_set_nak(struct dwc2_ep *ep);
124
125void set_udc_gadget_private_data(void *p)
126{
127	debug_cond(DEBUG_SETUP != 0,
128		   "%s: the_controller: 0x%p, p: 0x%p\n", __func__,
129		   the_controller, p);
130	the_controller->gadget.dev.device_data = p;
131}
132
133void *get_udc_gadget_private_data(struct usb_gadget *gadget)
134{
135	return gadget->dev.device_data;
136}
137
138static struct usb_ep_ops dwc2_ep_ops = {
139	.enable = dwc2_ep_enable,
140	.disable = dwc2_ep_disable,
141
142	.alloc_request = dwc2_alloc_request,
143	.free_request = dwc2_free_request,
144
145	.queue = dwc2_queue,
146	.dequeue = dwc2_dequeue,
147
148	.set_halt = dwc2_udc_set_halt,
149	.fifo_status = dwc2_fifo_status,
150	.fifo_flush = dwc2_fifo_flush,
151};
152
153#define create_proc_files() do {} while (0)
154#define remove_proc_files() do {} while (0)
155
156/***********************************************************/
157
158struct dwc2_usbotg_reg *reg;
159
160bool dfu_usb_get_reset(void)
161{
162	return !!(readl(&reg->gintsts) & INT_RESET);
163}
164
165__weak void otg_phy_init(struct dwc2_udc *dev) {}
166__weak void otg_phy_off(struct dwc2_udc *dev) {}
167
168/***********************************************************/
169
170#include "dwc2_udc_otg_xfer_dma.c"
171
172/*
173 *	udc_disable - disable USB device controller
174 */
175static void udc_disable(struct dwc2_udc *dev)
176{
177	debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
178
179	udc_set_address(dev, 0);
180
181	dev->ep0state = WAIT_FOR_SETUP;
182	dev->gadget.speed = USB_SPEED_UNKNOWN;
183	dev->usb_address = 0;
184
185	otg_phy_off(dev);
186}
187
188/*
189 *	udc_reinit - initialize software state
190 */
191static void udc_reinit(struct dwc2_udc *dev)
192{
193	unsigned int i;
194
195	debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
196
197	/* device/ep0 records init */
198	INIT_LIST_HEAD(&dev->gadget.ep_list);
199	INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
200	dev->ep0state = WAIT_FOR_SETUP;
201
202	/* basic endpoint records init */
203	for (i = 0; i < DWC2_MAX_ENDPOINTS; i++) {
204		struct dwc2_ep *ep = &dev->ep[i];
205
206		if (i != 0)
207			list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
208
209		ep->desc = 0;
210		ep->stopped = 0;
211		INIT_LIST_HEAD(&ep->queue);
212		ep->pio_irqs = 0;
213	}
214
215	/* the rest was statically initialized, and is read-only */
216}
217
218#define BYTES2MAXP(x)	(x / 8)
219#define MAXP2BYTES(x)	(x * 8)
220
221/* until it's enabled, this UDC should be completely invisible
222 * to any USB host.
223 */
224static int udc_enable(struct dwc2_udc *dev)
225{
226	debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
227
228	otg_phy_init(dev);
229	reconfig_usbd(dev);
230
231	debug_cond(DEBUG_SETUP != 0,
232		   "DWC2 USB 2.0 OTG Controller Core Initialized : 0x%x\n",
233		    readl(&reg->gintmsk));
234
235	dev->gadget.speed = USB_SPEED_UNKNOWN;
236
237	return 0;
238}
239
240static int dwc2_gadget_pullup(struct usb_gadget *g, int is_on)
241{
242	clrsetbits_le32(&reg->dctl, SOFT_DISCONNECT,
243			is_on ? 0 : SOFT_DISCONNECT);
244
245	return 0;
246}
247
248#if !CONFIG_IS_ENABLED(DM_USB_GADGET)
249/*
250  Register entry point for the peripheral controller driver.
251*/
252int usb_gadget_register_driver(struct usb_gadget_driver *driver)
253{
254	struct dwc2_udc *dev = the_controller;
255	int retval = 0;
256	unsigned long flags = 0;
257
258	debug_cond(DEBUG_SETUP != 0, "%s: %s\n", __func__, "no name");
259
260	if (!driver || driver->speed < USB_SPEED_FULL
261	    || !driver->bind || !driver->disconnect || !driver->setup)
262		return -EINVAL;
263	if (!dev)
264		return -ENODEV;
265	if (dev->driver)
266		return -EBUSY;
267
268	spin_lock_irqsave(&dev->lock, flags);
269	/* first hook up the driver ... */
270	dev->driver = driver;
271	spin_unlock_irqrestore(&dev->lock, flags);
272
273	if (retval) { /* TODO */
274		printf("target device_add failed, error %d\n", retval);
275		return retval;
276	}
277
278	retval = driver->bind(&dev->gadget);
279	if (retval) {
280		debug_cond(DEBUG_SETUP != 0,
281			   "%s: bind to driver --> error %d\n",
282			    dev->gadget.name, retval);
283		dev->driver = 0;
284		return retval;
285	}
286
287	enable_irq(IRQ_OTG);
288
289	debug_cond(DEBUG_SETUP != 0,
290		   "Registered gadget driver %s\n", dev->gadget.name);
291	udc_enable(dev);
292
293	return 0;
294}
295
296/*
297 * Unregister entry point for the peripheral controller driver.
298 */
299int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
300{
301	struct dwc2_udc *dev = the_controller;
302	unsigned long flags = 0;
303
304	if (!dev)
305		return -ENODEV;
306	if (!driver || driver != dev->driver)
307		return -EINVAL;
308
309	spin_lock_irqsave(&dev->lock, flags);
310	dev->driver = 0;
311	stop_activity(dev, driver);
312	spin_unlock_irqrestore(&dev->lock, flags);
313
314	driver->unbind(&dev->gadget);
315
316	disable_irq(IRQ_OTG);
317
318	udc_disable(dev);
319	return 0;
320}
321#else /* !CONFIG_IS_ENABLED(DM_USB_GADGET) */
322
323static int dwc2_gadget_start(struct usb_gadget *g,
324			     struct usb_gadget_driver *driver)
325{
326	struct dwc2_udc *dev = the_controller;
327
328	debug_cond(DEBUG_SETUP != 0, "%s: %s\n", __func__, "no name");
329
330	if (!driver || driver->speed < USB_SPEED_FULL ||
331	    !driver->bind || !driver->disconnect || !driver->setup)
332		return -EINVAL;
333
334	if (!dev)
335		return -ENODEV;
336
337	if (dev->driver)
338		return -EBUSY;
339
340	/* first hook up the driver ... */
341	dev->driver = driver;
342
343	debug_cond(DEBUG_SETUP != 0,
344		   "Registered gadget driver %s\n", dev->gadget.name);
345	return udc_enable(dev);
346}
347
348static int dwc2_gadget_stop(struct usb_gadget *g)
349{
350	struct dwc2_udc *dev = the_controller;
351
352	if (!dev)
353		return -ENODEV;
354
355	if (!dev->driver)
356		return -EINVAL;
357
358	dev->driver = 0;
359	stop_activity(dev, dev->driver);
360
361	udc_disable(dev);
362
363	return 0;
364}
365
366#endif /* !CONFIG_IS_ENABLED(DM_USB_GADGET) */
367
368/*
369 *	done - retire a request; caller blocked irqs
370 */
371static void done(struct dwc2_ep *ep, struct dwc2_request *req, int status)
372{
373	unsigned int stopped = ep->stopped;
374
375	debug("%s: %s %p, req = %p, stopped = %d\n",
376	      __func__, ep->ep.name, ep, &req->req, stopped);
377
378	list_del_init(&req->queue);
379
380	if (likely(req->req.status == -EINPROGRESS))
381		req->req.status = status;
382	else
383		status = req->req.status;
384
385	if (status && status != -ESHUTDOWN) {
386		debug("complete %s req %p stat %d len %u/%u\n",
387		      ep->ep.name, &req->req, status,
388		      req->req.actual, req->req.length);
389	}
390
391	/* don't modify queue heads during completion callback */
392	ep->stopped = 1;
393
394#ifdef DEBUG
395	printf("calling complete callback\n");
396	{
397		int i, len = req->req.length;
398
399		printf("pkt[%d] = ", req->req.length);
400		if (len > 64)
401			len = 64;
402		for (i = 0; i < len; i++) {
403			printf("%02x", ((u8 *)req->req.buf)[i]);
404			if ((i & 7) == 7)
405				printf(" ");
406		}
407		printf("\n");
408	}
409#endif
410	spin_unlock(&ep->dev->lock);
411	req->req.complete(&ep->ep, &req->req);
412	spin_lock(&ep->dev->lock);
413
414	debug("callback completed\n");
415
416	ep->stopped = stopped;
417}
418
419/*
420 *	nuke - dequeue ALL requests
421 */
422static void nuke(struct dwc2_ep *ep, int status)
423{
424	struct dwc2_request *req;
425
426	debug("%s: %s %p\n", __func__, ep->ep.name, ep);
427
428	/* called with irqs blocked */
429	while (!list_empty(&ep->queue)) {
430		req = list_entry(ep->queue.next, struct dwc2_request, queue);
431		done(ep, req, status);
432	}
433}
434
435static void stop_activity(struct dwc2_udc *dev,
436			  struct usb_gadget_driver *driver)
437{
438	int i;
439
440	/* don't disconnect drivers more than once */
441	if (dev->gadget.speed == USB_SPEED_UNKNOWN)
442		driver = 0;
443	dev->gadget.speed = USB_SPEED_UNKNOWN;
444
445	/* prevent new request submissions, kill any outstanding requests  */
446	for (i = 0; i < DWC2_MAX_ENDPOINTS; i++) {
447		struct dwc2_ep *ep = &dev->ep[i];
448		ep->stopped = 1;
449		nuke(ep, -ESHUTDOWN);
450	}
451
452	/* report disconnect; the driver is already quiesced */
453	if (driver) {
454		spin_unlock(&dev->lock);
455		driver->disconnect(&dev->gadget);
456		spin_lock(&dev->lock);
457	}
458
459	/* re-init driver-visible data structures */
460	udc_reinit(dev);
461}
462
463static void reconfig_usbd(struct dwc2_udc *dev)
464{
465	/* 2. Soft-reset OTG Core and then unreset again. */
466	int i;
467	unsigned int uTemp = writel(CORE_SOFT_RESET, &reg->grstctl);
468	uint32_t dflt_gusbcfg;
469	uint32_t rx_fifo_sz, tx_fifo_sz, np_tx_fifo_sz;
470	u32 max_hw_ep;
471	int pdata_hw_ep;
472
473	debug("Resetting OTG controller\n");
474
475	dflt_gusbcfg =
476		0<<15		/* PHY Low Power Clock sel*/
477		|1<<14		/* Non-Periodic TxFIFO Rewind Enable*/
478		|0x5<<10	/* Turnaround time*/
479		|0<<9 | 0<<8	/* [0:HNP disable,1:HNP enable][ 0:SRP disable*/
480				/* 1:SRP enable] H1= 1,1*/
481		|0<<7		/* Ulpi DDR sel*/
482		|0<<6		/* 0: high speed utmi+, 1: full speed serial*/
483		|0<<4		/* 0: utmi+, 1:ulpi*/
484#ifdef CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8
485		|0<<3		/* phy i/f  0:8bit, 1:16bit*/
486#else
487		|1<<3		/* phy i/f  0:8bit, 1:16bit*/
488#endif
489		|0x7<<0;	/* HS/FS Timeout**/
490
491	if (dev->pdata->usb_gusbcfg)
492		dflt_gusbcfg = dev->pdata->usb_gusbcfg;
493
494	writel(dflt_gusbcfg, &reg->gusbcfg);
495
496	/* 3. Put the OTG device core in the disconnected state.*/
497	uTemp = readl(&reg->dctl);
498	uTemp |= SOFT_DISCONNECT;
499	writel(uTemp, &reg->dctl);
500
501	udelay(20);
502
503	/* 4. Make the OTG device core exit from the disconnected state.*/
504	uTemp = readl(&reg->dctl);
505	uTemp = uTemp & ~SOFT_DISCONNECT;
506	writel(uTemp, &reg->dctl);
507
508	/* 5. Configure OTG Core to initial settings of device mode.*/
509	/* [][1: full speed(30Mhz) 0:high speed]*/
510	writel(EP_MISS_CNT(1) | DEV_SPEED_HIGH_SPEED_20, &reg->dcfg);
511
512	mdelay(1);
513
514	/* 6. Unmask the core interrupts*/
515	writel(GINTMSK_INIT, &reg->gintmsk);
516
517	/* 7. Set NAK bit of EP0, EP1, EP2*/
518	writel(DEPCTL_EPDIS|DEPCTL_SNAK, &reg->out_endp[EP0_CON].doepctl);
519	writel(DEPCTL_EPDIS|DEPCTL_SNAK, &reg->in_endp[EP0_CON].diepctl);
520
521	for (i = 1; i < DWC2_MAX_ENDPOINTS; i++) {
522		writel(DEPCTL_EPDIS|DEPCTL_SNAK, &reg->out_endp[i].doepctl);
523		writel(DEPCTL_EPDIS|DEPCTL_SNAK, &reg->in_endp[i].diepctl);
524	}
525
526	/* 8. Unmask EPO interrupts*/
527	writel(((1 << EP0_CON) << DAINT_OUT_BIT)
528	       | (1 << EP0_CON), &reg->daintmsk);
529
530	/* 9. Unmask device OUT EP common interrupts*/
531	writel(DOEPMSK_INIT, &reg->doepmsk);
532
533	/* 10. Unmask device IN EP common interrupts*/
534	writel(DIEPMSK_INIT, &reg->diepmsk);
535
536	rx_fifo_sz = RX_FIFO_SIZE;
537	np_tx_fifo_sz = NPTX_FIFO_SIZE;
538	tx_fifo_sz = PTX_FIFO_SIZE;
539
540	if (dev->pdata->rx_fifo_sz)
541		rx_fifo_sz = dev->pdata->rx_fifo_sz;
542	if (dev->pdata->np_tx_fifo_sz)
543		np_tx_fifo_sz = dev->pdata->np_tx_fifo_sz;
544	if (dev->pdata->tx_fifo_sz)
545		tx_fifo_sz = dev->pdata->tx_fifo_sz;
546
547	/* 11. Set Rx FIFO Size (in 32-bit words) */
548	writel(rx_fifo_sz, &reg->grxfsiz);
549
550	/* 12. Set Non Periodic Tx FIFO Size */
551	writel((np_tx_fifo_sz << 16) | rx_fifo_sz,
552	       &reg->gnptxfsiz);
553
554	/* retrieve the number of IN Endpoints (excluding ep0) */
555	max_hw_ep = (readl(&reg->ghwcfg4) & GHWCFG4_NUM_IN_EPS_MASK) >>
556		    GHWCFG4_NUM_IN_EPS_SHIFT;
557	pdata_hw_ep = dev->pdata->tx_fifo_sz_nb;
558
559	/* tx_fifo_sz_nb should equal to number of IN Endpoint */
560	if (pdata_hw_ep && max_hw_ep != pdata_hw_ep)
561		pr_warn("Got %d hw endpoint but %d tx-fifo-size in array !!\n",
562			max_hw_ep, pdata_hw_ep);
563
564	for (i = 0; i < max_hw_ep; i++) {
565		if (pdata_hw_ep)
566			tx_fifo_sz = dev->pdata->tx_fifo_sz_array[i];
567
568		writel((rx_fifo_sz + np_tx_fifo_sz + (tx_fifo_sz * i)) |
569			tx_fifo_sz << 16, &reg->dieptxf[i]);
570	}
571	/* Flush the RX FIFO */
572	writel(RX_FIFO_FLUSH, &reg->grstctl);
573	while (readl(&reg->grstctl) & RX_FIFO_FLUSH)
574		debug("%s: waiting for DWC2_UDC_OTG_GRSTCTL\n", __func__);
575
576	/* Flush all the Tx FIFO's */
577	writel(TX_FIFO_FLUSH_ALL, &reg->grstctl);
578	writel(TX_FIFO_FLUSH_ALL | TX_FIFO_FLUSH, &reg->grstctl);
579	while (readl(&reg->grstctl) & TX_FIFO_FLUSH)
580		debug("%s: waiting for DWC2_UDC_OTG_GRSTCTL\n", __func__);
581
582	/* 13. Clear NAK bit of EP0, EP1, EP2*/
583	/* For Slave mode*/
584	/* EP0: Control OUT */
585	writel(DEPCTL_EPDIS | DEPCTL_CNAK,
586	       &reg->out_endp[EP0_CON].doepctl);
587
588	/* 14. Initialize OTG Link Core.*/
589	writel(GAHBCFG_INIT, &reg->gahbcfg);
590}
591
592static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed)
593{
594	unsigned int ep_ctrl;
595	int i;
596
597	if (speed == USB_SPEED_HIGH) {
598		ep0_fifo_size = 64;
599		ep_fifo_size = 512;
600		ep_fifo_size2 = 1024;
601		dev->gadget.speed = USB_SPEED_HIGH;
602	} else {
603		ep0_fifo_size = 64;
604		ep_fifo_size = 64;
605		ep_fifo_size2 = 64;
606		dev->gadget.speed = USB_SPEED_FULL;
607	}
608
609	dev->ep[0].ep.maxpacket = ep0_fifo_size;
610	for (i = 1; i < DWC2_MAX_ENDPOINTS; i++)
611		dev->ep[i].ep.maxpacket = ep_fifo_size;
612
613	/* EP0 - Control IN (64 bytes)*/
614	ep_ctrl = readl(&reg->in_endp[EP0_CON].diepctl);
615	writel(ep_ctrl|(0<<0), &reg->in_endp[EP0_CON].diepctl);
616
617	/* EP0 - Control OUT (64 bytes)*/
618	ep_ctrl = readl(&reg->out_endp[EP0_CON].doepctl);
619	writel(ep_ctrl|(0<<0), &reg->out_endp[EP0_CON].doepctl);
620}
621
622static int dwc2_ep_enable(struct usb_ep *_ep,
623			 const struct usb_endpoint_descriptor *desc)
624{
625	struct dwc2_ep *ep;
626	struct dwc2_udc *dev;
627	unsigned long flags = 0;
628
629	debug("%s: %p\n", __func__, _ep);
630
631	ep = container_of(_ep, struct dwc2_ep, ep);
632	if (!_ep || !desc || ep->desc || _ep->name == ep0name
633	    || desc->bDescriptorType != USB_DT_ENDPOINT
634	    || ep->bEndpointAddress != desc->bEndpointAddress
635	    || ep_maxpacket(ep) <
636	    le16_to_cpu(get_unaligned(&desc->wMaxPacketSize))) {
637
638		debug("%s: bad ep or descriptor\n", __func__);
639		return -EINVAL;
640	}
641
642	/* xfer types must match, except that interrupt ~= bulk */
643	if (ep->bmAttributes != desc->bmAttributes
644	    && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
645	    && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
646
647		debug("%s: %s type mismatch\n", __func__, _ep->name);
648		return -EINVAL;
649	}
650
651	/* hardware _could_ do smaller, but driver doesn't */
652	if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK &&
653	     le16_to_cpu(get_unaligned(&desc->wMaxPacketSize)) >
654	     ep_maxpacket(ep)) || !get_unaligned(&desc->wMaxPacketSize)) {
655
656		debug("%s: bad %s maxpacket\n", __func__, _ep->name);
657		return -ERANGE;
658	}
659
660	dev = ep->dev;
661	if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
662
663		debug("%s: bogus device state\n", __func__);
664		return -ESHUTDOWN;
665	}
666
667	_ep->desc = desc;
668	ep->stopped = 0;
669	ep->desc = desc;
670	ep->pio_irqs = 0;
671	ep->ep.maxpacket = le16_to_cpu(get_unaligned(&desc->wMaxPacketSize));
672
673	/* Reset halt state */
674	dwc2_udc_set_nak(ep);
675	dwc2_udc_set_halt(_ep, 0);
676
677	spin_lock_irqsave(&ep->dev->lock, flags);
678	dwc2_udc_ep_activate(ep);
679	spin_unlock_irqrestore(&ep->dev->lock, flags);
680
681	debug("%s: enabled %s, stopped = %d, maxpacket = %d\n",
682	      __func__, _ep->name, ep->stopped, ep->ep.maxpacket);
683	return 0;
684}
685
686/*
687 * Disable EP
688 */
689static int dwc2_ep_disable(struct usb_ep *_ep)
690{
691	struct dwc2_ep *ep;
692	unsigned long flags = 0;
693
694	debug("%s: %p\n", __func__, _ep);
695
696	ep = container_of(_ep, struct dwc2_ep, ep);
697	if (!_ep || !ep->desc) {
698		debug("%s: %s not enabled\n", __func__,
699		      _ep ? ep->ep.name : NULL);
700		return -EINVAL;
701	}
702
703	spin_lock_irqsave(&ep->dev->lock, flags);
704
705	/* Nuke all pending requests */
706	nuke(ep, -ESHUTDOWN);
707
708	_ep->desc = NULL;
709	ep->desc = 0;
710	ep->stopped = 1;
711
712	spin_unlock_irqrestore(&ep->dev->lock, flags);
713
714	debug("%s: disabled %s\n", __func__, _ep->name);
715	return 0;
716}
717
718static struct usb_request *dwc2_alloc_request(struct usb_ep *ep,
719					     gfp_t gfp_flags)
720{
721	struct dwc2_request *req;
722
723	debug("%s: %s %p\n", __func__, ep->name, ep);
724
725	req = memalign(CONFIG_SYS_CACHELINE_SIZE, sizeof(*req));
726	if (!req)
727		return 0;
728
729	memset(req, 0, sizeof *req);
730	INIT_LIST_HEAD(&req->queue);
731
732	return &req->req;
733}
734
735static void dwc2_free_request(struct usb_ep *ep, struct usb_request *_req)
736{
737	struct dwc2_request *req;
738
739	debug("%s: %p\n", __func__, ep);
740
741	req = container_of(_req, struct dwc2_request, req);
742	WARN_ON(!list_empty(&req->queue));
743	kfree(req);
744}
745
746/* dequeue JUST ONE request */
747static int dwc2_dequeue(struct usb_ep *_ep, struct usb_request *_req)
748{
749	struct dwc2_ep *ep;
750	struct dwc2_request *req;
751	unsigned long flags = 0;
752
753	debug("%s: %p\n", __func__, _ep);
754
755	ep = container_of(_ep, struct dwc2_ep, ep);
756	if (!_ep || ep->ep.name == ep0name)
757		return -EINVAL;
758
759	spin_lock_irqsave(&ep->dev->lock, flags);
760
761	/* make sure it's actually queued on this endpoint */
762	list_for_each_entry(req, &ep->queue, queue) {
763		if (&req->req == _req)
764			break;
765	}
766	if (&req->req != _req) {
767		spin_unlock_irqrestore(&ep->dev->lock, flags);
768		return -EINVAL;
769	}
770
771	done(ep, req, -ECONNRESET);
772
773	spin_unlock_irqrestore(&ep->dev->lock, flags);
774	return 0;
775}
776
777/*
778 * Return bytes in EP FIFO
779 */
780static int dwc2_fifo_status(struct usb_ep *_ep)
781{
782	int count = 0;
783	struct dwc2_ep *ep;
784
785	ep = container_of(_ep, struct dwc2_ep, ep);
786	if (!_ep) {
787		debug("%s: bad ep\n", __func__);
788		return -ENODEV;
789	}
790
791	debug("%s: %d\n", __func__, ep_index(ep));
792
793	/* LPD can't report unclaimed bytes from IN fifos */
794	if (ep_is_in(ep))
795		return -EOPNOTSUPP;
796
797	return count;
798}
799
800/*
801 * Flush EP FIFO
802 */
803static void dwc2_fifo_flush(struct usb_ep *_ep)
804{
805	struct dwc2_ep *ep;
806
807	ep = container_of(_ep, struct dwc2_ep, ep);
808	if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
809		debug("%s: bad ep\n", __func__);
810		return;
811	}
812
813	debug("%s: %d\n", __func__, ep_index(ep));
814}
815
816static const struct usb_gadget_ops dwc2_udc_ops = {
817	.pullup = dwc2_gadget_pullup,
818	/* current versions must always be self-powered */
819#if CONFIG_IS_ENABLED(DM_USB_GADGET)
820	.udc_start		= dwc2_gadget_start,
821	.udc_stop		= dwc2_gadget_stop,
822#endif
823};
824
825static struct dwc2_udc memory = {
826	.usb_address = 0,
827	.gadget = {
828		.ops = &dwc2_udc_ops,
829		.ep0 = &memory.ep[0].ep,
830		.name = driver_name,
831	},
832
833	/* control endpoint */
834	.ep[0] = {
835		.ep = {
836			.name = ep0name,
837			.ops = &dwc2_ep_ops,
838			.maxpacket = EP0_FIFO_SIZE,
839		},
840		.dev = &memory,
841
842		.bEndpointAddress = 0,
843		.bmAttributes = 0,
844
845		.ep_type = ep_control,
846	},
847
848	/* first group of endpoints */
849	.ep[1] = {
850		.ep = {
851			.name = "ep1in-bulk",
852			.ops = &dwc2_ep_ops,
853			.maxpacket = EP_FIFO_SIZE,
854		},
855		.dev = &memory,
856
857		.bEndpointAddress = USB_DIR_IN | 1,
858		.bmAttributes = USB_ENDPOINT_XFER_BULK,
859
860		.ep_type = ep_bulk_out,
861		.fifo_num = 1,
862	},
863
864	.ep[2] = {
865		.ep = {
866			.name = "ep2out-bulk",
867			.ops = &dwc2_ep_ops,
868			.maxpacket = EP_FIFO_SIZE,
869		},
870		.dev = &memory,
871
872		.bEndpointAddress = USB_DIR_OUT | 2,
873		.bmAttributes = USB_ENDPOINT_XFER_BULK,
874
875		.ep_type = ep_bulk_in,
876		.fifo_num = 2,
877	},
878
879	.ep[3] = {
880		.ep = {
881			.name = "ep3in-int",
882			.ops = &dwc2_ep_ops,
883			.maxpacket = EP_FIFO_SIZE,
884		},
885		.dev = &memory,
886
887		.bEndpointAddress = USB_DIR_IN | 3,
888		.bmAttributes = USB_ENDPOINT_XFER_INT,
889
890		.ep_type = ep_interrupt,
891		.fifo_num = 3,
892	},
893};
894
895/*
896 *	probe - binds to the platform device
897 */
898
899int dwc2_udc_probe(struct dwc2_plat_otg_data *pdata)
900{
901	struct dwc2_udc *dev = &memory;
902	int retval = 0;
903
904	debug("%s: %p\n", __func__, pdata);
905
906	dev->pdata = pdata;
907
908	reg = (struct dwc2_usbotg_reg *)pdata->regs_otg;
909
910	dev->gadget.is_dualspeed = 1;	/* Hack only*/
911	dev->gadget.is_otg = 0;
912	dev->gadget.is_a_peripheral = 0;
913	dev->gadget.b_hnp_enable = 0;
914	dev->gadget.a_hnp_support = 0;
915	dev->gadget.a_alt_hnp_support = 0;
916
917	the_controller = dev;
918
919	usb_ctrl = memalign(CONFIG_SYS_CACHELINE_SIZE,
920			    ROUND(sizeof(struct usb_ctrlrequest),
921				  CONFIG_SYS_CACHELINE_SIZE));
922	if (!usb_ctrl) {
923		pr_err("No memory available for UDC!\n");
924		return -ENOMEM;
925	}
926
927	usb_ctrl_dma_addr = (dma_addr_t) usb_ctrl;
928
929	udc_reinit(dev);
930
931	return retval;
932}
933
934int dwc2_udc_handle_interrupt(void)
935{
936	u32 intr_status = readl(&reg->gintsts);
937	u32 gintmsk = readl(&reg->gintmsk);
938
939	if (intr_status & gintmsk)
940		return dwc2_udc_irq(1, (void *)the_controller);
941
942	return 0;
943}
944
945int dm_usb_gadget_handle_interrupts(struct udevice *dev)
946{
947	return dwc2_udc_handle_interrupt();
948}
949
950#if CONFIG_IS_ENABLED(DM_USB_GADGET)
951struct dwc2_priv_data {
952	struct clk_bulk		clks;
953	struct reset_ctl_bulk	resets;
954	struct phy_bulk phys;
955	struct udevice *usb33d_supply;
956};
957
958static int dwc2_phy_setup(struct udevice *dev, struct phy_bulk *phys)
959{
960	int ret;
961
962	ret = generic_phy_get_bulk(dev, phys);
963	if (ret)
964		return ret;
965
966	ret = generic_phy_init_bulk(phys);
967	if (ret)
968		return ret;
969
970	ret = generic_phy_power_on_bulk(phys);
971	if (ret)
972		generic_phy_exit_bulk(phys);
973
974	return ret;
975}
976
977static void dwc2_phy_shutdown(struct udevice *dev, struct phy_bulk *phys)
978{
979	generic_phy_power_off_bulk(phys);
980	generic_phy_exit_bulk(phys);
981}
982
983static int dwc2_udc_otg_of_to_plat(struct udevice *dev)
984{
985	struct dwc2_plat_otg_data *plat = dev_get_plat(dev);
986	ulong drvdata;
987	void (*set_params)(struct dwc2_plat_otg_data *data);
988	int ret;
989
990	if (usb_get_dr_mode(dev_ofnode(dev)) != USB_DR_MODE_PERIPHERAL &&
991	    usb_get_dr_mode(dev_ofnode(dev)) != USB_DR_MODE_OTG) {
992		dev_dbg(dev, "Invalid mode\n");
993		return -ENODEV;
994	}
995
996	plat->regs_otg = dev_read_addr(dev);
997
998	plat->rx_fifo_sz = dev_read_u32_default(dev, "g-rx-fifo-size", 0);
999	plat->np_tx_fifo_sz = dev_read_u32_default(dev, "g-np-tx-fifo-size", 0);
1000
1001	ret = dev_read_size(dev, "g-tx-fifo-size");
1002	if (ret > 0)
1003		plat->tx_fifo_sz_nb = ret / sizeof(u32);
1004	if (plat->tx_fifo_sz_nb > DWC2_MAX_HW_ENDPOINTS)
1005		plat->tx_fifo_sz_nb = DWC2_MAX_HW_ENDPOINTS;
1006	if (plat->tx_fifo_sz_nb) {
1007		ret = dev_read_u32_array(dev, "g-tx-fifo-size",
1008					 plat->tx_fifo_sz_array,
1009					 plat->tx_fifo_sz_nb);
1010		if (ret)
1011			return ret;
1012	}
1013
1014	plat->force_b_session_valid =
1015		dev_read_bool(dev, "u-boot,force-b-session-valid");
1016
1017	plat->force_vbus_detection =
1018		dev_read_bool(dev, "u-boot,force-vbus-detection");
1019
1020	/* force plat according compatible */
1021	drvdata = dev_get_driver_data(dev);
1022	if (drvdata) {
1023		set_params = (void *)drvdata;
1024		set_params(plat);
1025	}
1026
1027	return 0;
1028}
1029
1030static void dwc2_set_stm32mp1_hsotg_params(struct dwc2_plat_otg_data *p)
1031{
1032	p->activate_stm_id_vb_detection = true;
1033	p->usb_gusbcfg =
1034		0 << 15		/* PHY Low Power Clock sel*/
1035		| 0x9 << 10	/* USB Turnaround time (0x9 for HS phy) */
1036		| 0 << 9	/* [0:HNP disable,1:HNP enable]*/
1037		| 0 << 8	/* [0:SRP disable 1:SRP enable]*/
1038		| 0 << 6	/* 0: high speed utmi+, 1: full speed serial*/
1039		| 0x7 << 0;	/* FS timeout calibration**/
1040
1041	if (p->force_b_session_valid)
1042		p->usb_gusbcfg |= 1 << 30; /* FDMOD: Force device mode */
1043}
1044
1045static int dwc2_udc_otg_reset_init(struct udevice *dev,
1046				   struct reset_ctl_bulk *resets)
1047{
1048	int ret;
1049
1050	ret = reset_get_bulk(dev, resets);
1051	if (ret == -ENOTSUPP || ret == -ENOENT)
1052		return 0;
1053
1054	if (ret)
1055		return ret;
1056
1057	ret = reset_assert_bulk(resets);
1058
1059	if (!ret) {
1060		udelay(2);
1061		ret = reset_deassert_bulk(resets);
1062	}
1063	if (ret) {
1064		reset_release_bulk(resets);
1065		return ret;
1066	}
1067
1068	return 0;
1069}
1070
1071static int dwc2_udc_otg_clk_init(struct udevice *dev,
1072				 struct clk_bulk *clks)
1073{
1074	int ret;
1075
1076	ret = clk_get_bulk(dev, clks);
1077	if (ret == -ENOSYS)
1078		return 0;
1079
1080	if (ret)
1081		return ret;
1082
1083	ret = clk_enable_bulk(clks);
1084	if (ret) {
1085		clk_release_bulk(clks);
1086		return ret;
1087	}
1088
1089	return 0;
1090}
1091
1092static int dwc2_udc_otg_probe(struct udevice *dev)
1093{
1094	struct dwc2_plat_otg_data *plat = dev_get_plat(dev);
1095	struct dwc2_priv_data *priv = dev_get_priv(dev);
1096	struct dwc2_usbotg_reg *usbotg_reg =
1097		(struct dwc2_usbotg_reg *)plat->regs_otg;
1098	int ret;
1099
1100	ret = dwc2_udc_otg_clk_init(dev, &priv->clks);
1101	if (ret)
1102		return ret;
1103
1104	ret = dwc2_udc_otg_reset_init(dev, &priv->resets);
1105	if (ret)
1106		return ret;
1107
1108	ret = dwc2_phy_setup(dev, &priv->phys);
1109	if (ret)
1110		return ret;
1111
1112	if (plat->activate_stm_id_vb_detection) {
1113		if (CONFIG_IS_ENABLED(DM_REGULATOR) &&
1114		    (!plat->force_b_session_valid ||
1115		     plat->force_vbus_detection)) {
1116			ret = device_get_supply_regulator(dev, "usb33d-supply",
1117							  &priv->usb33d_supply);
1118			if (ret) {
1119				dev_err(dev, "can't get voltage level detector supply\n");
1120				return ret;
1121			}
1122			ret = regulator_set_enable(priv->usb33d_supply, true);
1123			if (ret) {
1124				dev_err(dev, "can't enable voltage level detector supply\n");
1125				return ret;
1126			}
1127		}
1128
1129		if (plat->force_b_session_valid &&
1130		    !plat->force_vbus_detection) {
1131			/* Override VBUS detection: enable then value*/
1132			setbits_le32(&usbotg_reg->gotgctl, VB_VALOEN);
1133			setbits_le32(&usbotg_reg->gotgctl, VB_VALOVAL);
1134		} else {
1135			/* Enable VBUS sensing */
1136			setbits_le32(&usbotg_reg->ggpio,
1137				     GGPIO_STM32_OTG_GCCFG_VBDEN);
1138		}
1139		if (plat->force_b_session_valid) {
1140			/* Override B session bits: enable then value */
1141			setbits_le32(&usbotg_reg->gotgctl, A_VALOEN | B_VALOEN);
1142			setbits_le32(&usbotg_reg->gotgctl,
1143				     A_VALOVAL | B_VALOVAL);
1144		} else {
1145			/* Enable ID detection */
1146			setbits_le32(&usbotg_reg->ggpio,
1147				     GGPIO_STM32_OTG_GCCFG_IDEN);
1148		}
1149	}
1150
1151	ret = dwc2_udc_probe(plat);
1152	if (ret)
1153		return ret;
1154
1155	the_controller->driver = 0;
1156
1157	ret = usb_add_gadget_udc((struct device *)dev, &the_controller->gadget);
1158
1159	return ret;
1160}
1161
1162static int dwc2_udc_otg_remove(struct udevice *dev)
1163{
1164	struct dwc2_priv_data *priv = dev_get_priv(dev);
1165
1166	usb_del_gadget_udc(&the_controller->gadget);
1167
1168	reset_release_bulk(&priv->resets);
1169
1170	clk_release_bulk(&priv->clks);
1171
1172	dwc2_phy_shutdown(dev, &priv->phys);
1173
1174	return dm_scan_fdt_dev(dev);
1175}
1176
1177static const struct udevice_id dwc2_udc_otg_ids[] = {
1178	{ .compatible = "snps,dwc2" },
1179	{ .compatible = "brcm,bcm2835-usb" },
1180	{ .compatible = "st,stm32mp15-hsotg",
1181	  .data = (ulong)dwc2_set_stm32mp1_hsotg_params },
1182	{},
1183};
1184
1185U_BOOT_DRIVER(dwc2_udc_otg) = {
1186	.name	= "dwc2-udc-otg",
1187	.id	= UCLASS_USB_GADGET_GENERIC,
1188	.of_match = dwc2_udc_otg_ids,
1189	.of_to_plat = dwc2_udc_otg_of_to_plat,
1190	.probe = dwc2_udc_otg_probe,
1191	.remove = dwc2_udc_otg_remove,
1192	.plat_auto	= sizeof(struct dwc2_plat_otg_data),
1193	.priv_auto	= sizeof(struct dwc2_priv_data),
1194};
1195
1196int dwc2_udc_B_session_valid(struct udevice *dev)
1197{
1198	struct dwc2_plat_otg_data *plat = dev_get_plat(dev);
1199	struct dwc2_usbotg_reg *usbotg_reg =
1200		(struct dwc2_usbotg_reg *)plat->regs_otg;
1201
1202	return readl(&usbotg_reg->gotgctl) & B_SESSION_VALID;
1203}
1204#endif /* CONFIG_IS_ENABLED(DM_USB_GADGET) */
1205