1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Copyright (C) 2017-2021 Socionext Inc. 4 * Author: Masahiro Yamada <yamada.masahiro@socionext.com> 5 * Author: Dai Okamura <dai.okamura@socionext.com> 6 */ 7 8#include <common.h> 9#include <dm.h> 10#include <dm/pinctrl.h> 11 12#include "pinctrl-uniphier.h" 13 14static const struct uniphier_pinctrl_pin uniphier_pxs3_pins[] = { 15 UNIPHIER_PINCTRL_PIN(62, "RGMII0_TXCLK", 28, UNIPHIER_PIN_DRV_2BIT), 16 UNIPHIER_PINCTRL_PIN(63, "RGMII0_TXD0", 29, UNIPHIER_PIN_DRV_2BIT), 17 UNIPHIER_PINCTRL_PIN(64, "RGMII0_TXD1", 30, UNIPHIER_PIN_DRV_2BIT), 18 UNIPHIER_PINCTRL_PIN(65, "RGMII0_TXD2", 31, UNIPHIER_PIN_DRV_2BIT), 19 UNIPHIER_PINCTRL_PIN(66, "RGMII0_TXD3", 32, UNIPHIER_PIN_DRV_2BIT), 20 UNIPHIER_PINCTRL_PIN(67, "RGMII0_TXCTL", 33, UNIPHIER_PIN_DRV_2BIT), 21 UNIPHIER_PINCTRL_PIN(78, "RGMII1_TXCLK", 44, UNIPHIER_PIN_DRV_2BIT), 22 UNIPHIER_PINCTRL_PIN(79, "RGMII1_TXD0", 45, UNIPHIER_PIN_DRV_2BIT), 23 UNIPHIER_PINCTRL_PIN(80, "RGMII1_TXD1", 46, UNIPHIER_PIN_DRV_2BIT), 24 UNIPHIER_PINCTRL_PIN(81, "RGMII1_TXD2", 47, UNIPHIER_PIN_DRV_2BIT), 25 UNIPHIER_PINCTRL_PIN(82, "RGMII1_TXD3", 48, UNIPHIER_PIN_DRV_2BIT), 26 UNIPHIER_PINCTRL_PIN(83, "RGMII1_TXCTL", 49, UNIPHIER_PIN_DRV_2BIT), 27}; 28 29static const unsigned emmc_pins[] = {31, 32, 33, 34, 35, 36, 37, 38}; 30static const int emmc_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0}; 31static const unsigned emmc_dat8_pins[] = {39, 40, 41, 42}; 32static const int emmc_dat8_muxvals[] = {0, 0, 0, 0}; 33static const unsigned ether_rgmii_pins[] = {52, 53, 54, 55, 56, 57, 58, 59, 60, 34 61, 62, 63, 64, 65, 66, 67}; 35static const int ether_rgmii_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 36 0, 0, 0, 0}; 37static const unsigned ether_rmii_pins[] = {52, 53, 54, 55, 56, 57, 58, 59, 61, 38 63, 64, 67}; 39static const int ether_rmii_muxvals[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1}; 40static const unsigned ether1_rgmii_pins[] = {68, 69, 70, 71, 72, 73, 74, 75, 76, 41 77, 78, 79, 80, 81, 82, 83}; 42static const int ether1_rgmii_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 43 0, 0, 0, 0}; 44static const unsigned ether1_rmii_pins[] = {68, 69, 70, 71, 72, 73, 74, 75, 77, 45 79, 80, 83}; 46static const int ether1_rmii_muxvals[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1}; 47static const unsigned i2c0_pins[] = {104, 105}; 48static const int i2c0_muxvals[] = {0, 0}; 49static const unsigned i2c1_pins[] = {106, 107}; 50static const int i2c1_muxvals[] = {0, 0}; 51static const unsigned i2c2_pins[] = {108, 109}; 52static const int i2c2_muxvals[] = {0, 0}; 53static const unsigned i2c3_pins[] = {110, 111}; 54static const int i2c3_muxvals[] = {0, 0}; 55static const unsigned nand_pins[] = {16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 56 27, 28, 29, 30}; 57static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; 58static const unsigned sd_pins[] = {43, 44, 45, 46, 47, 48, 49, 50, 51}; 59static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; 60static const unsigned spi0_pins[] = {100, 101, 102, 103}; 61static const int spi0_muxvals[] = {0, 0, 0, 0}; 62static const unsigned spi1_pins[] = {112, 113, 114, 115}; 63static const int spi1_muxvals[] = {2, 2, 2, 2}; 64static const unsigned system_bus_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 65 12, 13, 14}; 66static const int system_bus_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 67 0}; 68static const unsigned system_bus_cs1_pins[] = {15}; 69static const int system_bus_cs1_muxvals[] = {0}; 70static const unsigned uart0_pins[] = {92, 93}; 71static const int uart0_muxvals[] = {0, 0}; 72static const unsigned uart1_pins[] = {94, 95}; 73static const int uart1_muxvals[] = {0, 0}; 74static const unsigned uart2_pins[] = {96, 97}; 75static const int uart2_muxvals[] = {0, 0}; 76static const unsigned uart3_pins[] = {98, 99}; 77static const int uart3_muxvals[] = {0, 0}; 78static const unsigned usb0_pins[] = {84, 85}; 79static const int usb0_muxvals[] = {0, 0}; 80static const unsigned usb1_pins[] = {86, 87}; 81static const int usb1_muxvals[] = {0, 0}; 82static const unsigned usb2_pins[] = {88, 89}; 83static const int usb2_muxvals[] = {0, 0}; 84static const unsigned usb3_pins[] = {90, 91}; 85static const int usb3_muxvals[] = {0, 0}; 86 87static const struct uniphier_pinctrl_group uniphier_pxs3_groups[] = { 88 UNIPHIER_PINCTRL_GROUP(emmc), 89 UNIPHIER_PINCTRL_GROUP(emmc_dat8), 90 UNIPHIER_PINCTRL_GROUP(ether_rgmii), 91 UNIPHIER_PINCTRL_GROUP(ether_rmii), 92 UNIPHIER_PINCTRL_GROUP(ether1_rgmii), 93 UNIPHIER_PINCTRL_GROUP(ether1_rmii), 94 UNIPHIER_PINCTRL_GROUP(i2c0), 95 UNIPHIER_PINCTRL_GROUP(i2c1), 96 UNIPHIER_PINCTRL_GROUP(i2c2), 97 UNIPHIER_PINCTRL_GROUP(i2c3), 98 UNIPHIER_PINCTRL_GROUP(nand), 99 UNIPHIER_PINCTRL_GROUP(sd), 100 UNIPHIER_PINCTRL_GROUP(spi0), 101 UNIPHIER_PINCTRL_GROUP(spi1), 102 UNIPHIER_PINCTRL_GROUP(system_bus), 103 UNIPHIER_PINCTRL_GROUP(system_bus_cs1), 104 UNIPHIER_PINCTRL_GROUP(uart0), 105 UNIPHIER_PINCTRL_GROUP(uart1), 106 UNIPHIER_PINCTRL_GROUP(uart2), 107 UNIPHIER_PINCTRL_GROUP(uart3), 108 UNIPHIER_PINCTRL_GROUP(usb0), 109 UNIPHIER_PINCTRL_GROUP(usb1), 110 UNIPHIER_PINCTRL_GROUP(usb2), 111 UNIPHIER_PINCTRL_GROUP(usb3), 112}; 113 114static const char * const uniphier_pxs3_functions[] = { 115 UNIPHIER_PINMUX_FUNCTION(emmc), 116 UNIPHIER_PINMUX_FUNCTION(ether_rgmii), 117 UNIPHIER_PINMUX_FUNCTION(ether_rmii), 118 UNIPHIER_PINMUX_FUNCTION(ether1_rgmii), 119 UNIPHIER_PINMUX_FUNCTION(ether1_rmii), 120 UNIPHIER_PINMUX_FUNCTION(i2c0), 121 UNIPHIER_PINMUX_FUNCTION(i2c1), 122 UNIPHIER_PINMUX_FUNCTION(i2c2), 123 UNIPHIER_PINMUX_FUNCTION(i2c3), 124 UNIPHIER_PINMUX_FUNCTION(nand), 125 UNIPHIER_PINMUX_FUNCTION(sd), 126 UNIPHIER_PINMUX_FUNCTION(spi0), 127 UNIPHIER_PINMUX_FUNCTION(spi1), 128 UNIPHIER_PINMUX_FUNCTION(system_bus), 129 UNIPHIER_PINMUX_FUNCTION(uart0), 130 UNIPHIER_PINMUX_FUNCTION(uart1), 131 UNIPHIER_PINMUX_FUNCTION(uart2), 132 UNIPHIER_PINMUX_FUNCTION(uart3), 133 UNIPHIER_PINMUX_FUNCTION(usb0), 134 UNIPHIER_PINMUX_FUNCTION(usb1), 135 UNIPHIER_PINMUX_FUNCTION(usb2), 136 UNIPHIER_PINMUX_FUNCTION(usb3), 137}; 138 139static struct uniphier_pinctrl_socdata uniphier_pxs3_pinctrl_socdata = { 140 .pins = uniphier_pxs3_pins, 141 .pins_count = ARRAY_SIZE(uniphier_pxs3_pins), 142 .groups = uniphier_pxs3_groups, 143 .groups_count = ARRAY_SIZE(uniphier_pxs3_groups), 144 .functions = uniphier_pxs3_functions, 145 .functions_count = ARRAY_SIZE(uniphier_pxs3_functions), 146 .caps = UNIPHIER_PINCTRL_CAPS_PUPD_SIMPLE | 147 UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL, 148}; 149 150static int uniphier_pxs3_pinctrl_probe(struct udevice *dev) 151{ 152 return uniphier_pinctrl_probe(dev, &uniphier_pxs3_pinctrl_socdata); 153} 154 155static const struct udevice_id uniphier_pxs3_pinctrl_match[] = { 156 { .compatible = "socionext,uniphier-pxs3-pinctrl" }, 157 { /* sentinel */ } 158}; 159 160U_BOOT_DRIVER(uniphier_pxs3_pinctrl) = { 161 .name = "uniphier-pxs3-pinctrl", 162 .id = UCLASS_PINCTRL, 163 .of_match = of_match_ptr(uniphier_pxs3_pinctrl_match), 164 .probe = uniphier_pxs3_pinctrl_probe, 165 .priv_auto = sizeof(struct uniphier_pinctrl_priv), 166 .ops = &uniphier_pinctrl_ops, 167}; 168