1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2014 Google, Inc
4 *
5 * From coreboot, originally based on the Linux kernel (drivers/pci/pci.c).
6 *
7 * Modifications are:
8 * Copyright (C) 2003-2004 Linux Networx
9 * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx)
10 * Copyright (C) 2003-2006 Ronald G. Minnich <rminnich@gmail.com>
11 * Copyright (C) 2004-2005 Li-Ta Lo <ollie@lanl.gov>
12 * Copyright (C) 2005-2006 Tyan
13 * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan)
14 * Copyright (C) 2005-2009 coresystems GmbH
15 * (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH)
16 *
17 * PCI Bus Services, see include/linux/pci.h for further explanation.
18 *
19 * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter,
20 * David Mosberger-Tang
21 *
22 * Copyright 1997 -- 1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
23 */
24
25#define LOG_CATEGORY UCLASS_PCI
26
27#include <common.h>
28#include <bios_emul.h>
29#include <bloblist.h>
30#include <bootstage.h>
31#include <dm.h>
32#include <errno.h>
33#include <init.h>
34#include <log.h>
35#include <malloc.h>
36#include <pci.h>
37#include <pci_rom.h>
38#include <spl.h>
39#include <vesa.h>
40#include <video.h>
41#include <acpi/acpi_s3.h>
42#include <asm/global_data.h>
43#include <linux/screen_info.h>
44
45DECLARE_GLOBAL_DATA_PTR;
46
47__weak bool board_should_run_oprom(struct udevice *dev)
48{
49#if defined(CONFIG_X86) && defined(CONFIG_HAVE_ACPI_RESUME)
50	if (gd->arch.prev_sleep_state == ACPI_S3) {
51		if (IS_ENABLED(CONFIG_S3_VGA_ROM_RUN))
52			return true;
53		else
54			return false;
55	}
56#endif
57
58	return true;
59}
60
61__weak bool board_should_load_oprom(struct udevice *dev)
62{
63	return true;
64}
65
66__weak uint32_t board_map_oprom_vendev(uint32_t vendev)
67{
68	return vendev;
69}
70
71static int pci_rom_probe(struct udevice *dev, struct pci_rom_header **hdrp)
72{
73	struct pci_child_plat *pplat = dev_get_parent_plat(dev);
74	struct pci_rom_header *rom_header;
75	struct pci_rom_data *rom_data;
76	u16 rom_vendor, rom_device;
77	u32 rom_class;
78	u32 vendev;
79	u32 mapped_vendev;
80	u32 rom_address;
81
82	vendev = pplat->vendor << 16 | pplat->device;
83	mapped_vendev = board_map_oprom_vendev(vendev);
84	if (vendev != mapped_vendev)
85		debug("Device ID mapped to %#08x\n", mapped_vendev);
86
87#ifdef CONFIG_VGA_BIOS_ADDR
88	rom_address = CONFIG_VGA_BIOS_ADDR;
89#else
90
91	dm_pci_read_config32(dev, PCI_ROM_ADDRESS, &rom_address);
92	if (rom_address == 0x00000000 || rom_address == 0xffffffff) {
93		debug("%s: rom_address=%x\n", __func__, rom_address);
94		return -ENOENT;
95	}
96	rom_address &= PCI_ROM_ADDRESS_MASK;
97
98	/* Enable expansion ROM address decoding. */
99	dm_pci_write_config32(dev, PCI_ROM_ADDRESS,
100			      rom_address | PCI_ROM_ADDRESS_ENABLE);
101#endif
102	debug("Option ROM address %x\n", rom_address);
103	rom_header = (struct pci_rom_header *)(unsigned long)rom_address;
104
105	debug("PCI expansion ROM, signature %#04x, INIT size %#04x, data ptr %#04x\n",
106	      le16_to_cpu(rom_header->signature),
107	      rom_header->size * 512, le16_to_cpu(rom_header->data));
108
109	if (le16_to_cpu(rom_header->signature) != PCI_ROM_HDR) {
110		printf("Incorrect expansion ROM header signature %04x\n",
111		       le16_to_cpu(rom_header->signature));
112#ifndef CONFIG_VGA_BIOS_ADDR
113		/* Disable expansion ROM address decoding */
114		dm_pci_write_config32(dev, PCI_ROM_ADDRESS, rom_address);
115#endif
116		return -EINVAL;
117	}
118
119	rom_data = (((void *)rom_header) + le16_to_cpu(rom_header->data));
120	rom_vendor = le16_to_cpu(rom_data->vendor);
121	rom_device = le16_to_cpu(rom_data->device);
122
123	debug("PCI ROM image, vendor ID %04x, device ID %04x,\n",
124	      rom_vendor, rom_device);
125
126	/* If the device id is mapped, a mismatch is expected */
127	if ((pplat->vendor != rom_vendor || pplat->device != rom_device) &&
128	    (vendev == mapped_vendev)) {
129		printf("ID mismatch: vendor ID %04x, device ID %04x\n",
130		       rom_vendor, rom_device);
131		/* Continue anyway */
132	}
133
134	rom_class = (le16_to_cpu(rom_data->class_hi) << 8) | rom_data->class_lo;
135	debug("PCI ROM image, Class Code %06x, Code Type %02x\n",
136	      rom_class, rom_data->type);
137
138	if (pplat->class != rom_class) {
139		debug("Class Code mismatch ROM %06x, dev %06x\n",
140		      rom_class, pplat->class);
141	}
142	*hdrp = rom_header;
143
144	return 0;
145}
146
147/**
148 * pci_rom_load() - Load a ROM image and return a pointer to it
149 *
150 * @rom_header:		Pointer to ROM image
151 * @ram_headerp:	Returns a pointer to the image in RAM
152 * @allocedp:		Returns true if @ram_headerp was allocated and needs
153 *			to be freed
154 * Return: 0 if OK, -ve on error. Note that @allocedp is set up regardless of
155 * the error state. Even if this function returns an error, it may have
156 * allocated memory.
157 */
158static int pci_rom_load(struct pci_rom_header *rom_header,
159			struct pci_rom_header **ram_headerp, bool *allocedp)
160{
161	struct pci_rom_data *rom_data;
162	unsigned int rom_size;
163	unsigned int image_size = 0;
164	void *target;
165
166	*allocedp = false;
167	do {
168		/* Get next image, until we see an x86 version */
169		rom_header = (struct pci_rom_header *)((void *)rom_header +
170							    image_size);
171
172		rom_data = (struct pci_rom_data *)((void *)rom_header +
173				le16_to_cpu(rom_header->data));
174
175		image_size = le16_to_cpu(rom_data->ilen) * 512;
176	} while ((rom_data->type != 0) && (rom_data->indicator == 0));
177
178	if (rom_data->type != 0)
179		return -EACCES;
180
181	rom_size = rom_header->size * 512;
182
183#ifdef PCI_VGA_RAM_IMAGE_START
184	target = (void *)PCI_VGA_RAM_IMAGE_START;
185#else
186	target = (void *)malloc(rom_size);
187	if (!target)
188		return -ENOMEM;
189	*allocedp = true;
190#endif
191	if (target != rom_header) {
192		ulong start = get_timer(0);
193
194		debug("Copying VGA ROM Image from %p to %p, 0x%x bytes\n",
195		      rom_header, target, rom_size);
196		memcpy(target, rom_header, rom_size);
197		if (memcmp(target, rom_header, rom_size)) {
198			printf("VGA ROM copy failed\n");
199			return -EFAULT;
200		}
201		debug("Copy took %lums\n", get_timer(start));
202	}
203	*ram_headerp = target;
204
205	return 0;
206}
207
208struct vesa_state mode_info;
209
210void setup_video(struct screen_info *screen_info)
211{
212	struct vesa_mode_info *vesa = &mode_info.vesa;
213
214	/* Sanity test on VESA parameters */
215	if (!vesa->x_resolution || !vesa->y_resolution)
216		return;
217
218	screen_info->orig_video_isVGA = VIDEO_TYPE_VLFB;
219
220	screen_info->lfb_width = vesa->x_resolution;
221	screen_info->lfb_height = vesa->y_resolution;
222	screen_info->lfb_depth = vesa->bits_per_pixel;
223	screen_info->lfb_linelength = vesa->bytes_per_scanline;
224	screen_info->lfb_base = vesa->phys_base_ptr;
225	screen_info->lfb_size =
226		ALIGN(screen_info->lfb_linelength * screen_info->lfb_height,
227		      65536);
228	screen_info->lfb_size >>= 16;
229	screen_info->red_size = vesa->red_mask_size;
230	screen_info->red_pos = vesa->red_mask_pos;
231	screen_info->green_size = vesa->green_mask_size;
232	screen_info->green_pos = vesa->green_mask_pos;
233	screen_info->blue_size = vesa->blue_mask_size;
234	screen_info->blue_pos = vesa->blue_mask_pos;
235	screen_info->rsvd_size = vesa->reserved_mask_size;
236	screen_info->rsvd_pos = vesa->reserved_mask_pos;
237}
238
239int dm_pci_run_vga_bios(struct udevice *dev, int (*int15_handler)(void),
240			int exec_method)
241{
242	struct pci_child_plat *pplat = dev_get_parent_plat(dev);
243	struct pci_rom_header *rom = NULL, *ram = NULL;
244	int vesa_mode = -1;
245	bool emulate, alloced;
246	int ret;
247
248	/* Only execute VGA ROMs */
249	if (((pplat->class >> 8) ^ PCI_CLASS_DISPLAY_VGA) & 0xff00) {
250		debug("%s: Class %#x, should be %#x\n", __func__, pplat->class,
251		      PCI_CLASS_DISPLAY_VGA);
252		return -ENODEV;
253	}
254
255	if (!board_should_load_oprom(dev))
256		return log_msg_ret("Should not load OPROM", -ENXIO);
257
258	ret = pci_rom_probe(dev, &rom);
259	if (ret)
260		return log_msg_ret("pro", ret);
261
262	ret = pci_rom_load(rom, &ram, &alloced);
263	if (ret) {
264		ret = log_msg_ret("ld", ret);
265		goto err;
266	}
267
268	if (!board_should_run_oprom(dev)) {
269		ret = log_msg_ret("run", -ENXIO);
270		goto err;
271	}
272
273#if defined(CONFIG_FRAMEBUFFER_SET_VESA_MODE) && \
274		defined(CONFIG_FRAMEBUFFER_VESA_MODE)
275	vesa_mode = CONFIG_FRAMEBUFFER_VESA_MODE;
276#endif
277	debug("Selected vesa mode 0x%x\n", vesa_mode);
278
279	if (exec_method & PCI_ROM_USE_NATIVE) {
280#ifdef CONFIG_X86
281		emulate = false;
282#else
283		if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
284			printf("BIOS native execution is only available on x86\n");
285			ret = -ENOSYS;
286			goto err;
287		}
288		emulate = true;
289#endif
290	} else {
291#ifdef CONFIG_BIOSEMU
292		emulate = true;
293#else
294		if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
295			printf("BIOS emulation not available - see CONFIG_BIOSEMU\n");
296			ret = -ENOSYS;
297			goto err;
298		}
299		emulate = false;
300#endif
301	}
302
303	if (emulate) {
304		if (CONFIG_IS_ENABLED(BIOSEMU)) {
305			BE_VGAInfo *info;
306
307			log_debug("Running video BIOS with emulator...");
308			ret = biosemu_setup(dev, &info);
309			if (ret)
310				goto err;
311			biosemu_set_interrupt_handler(0x15, int15_handler);
312			ret = biosemu_run(dev, (uchar *)ram, 1 << 16, info,
313					  true, vesa_mode, &mode_info);
314			log_debug("done\n");
315			if (ret)
316				goto err;
317		}
318	} else {
319#if defined(CONFIG_X86) && (CONFIG_IS_ENABLED(X86_32BIT_INIT) || CONFIG_TPL)
320		log_debug("Running video BIOS...");
321		bios_set_interrupt_handler(0x15, int15_handler);
322
323		bios_run_on_x86(dev, (unsigned long)ram, vesa_mode,
324				&mode_info);
325		log_debug("done\n");
326#endif
327	}
328	debug("Final vesa mode %x\n", mode_info.video_mode);
329	ret = 0;
330
331err:
332	if (alloced)
333		free(ram);
334	return ret;
335}
336
337int vesa_setup_video_priv(struct vesa_mode_info *vesa, u64 fb,
338			  struct video_priv *uc_priv,
339			  struct video_uc_plat *plat)
340{
341	if (!vesa->x_resolution)
342		return log_msg_ret("No x resolution", -ENXIO);
343	uc_priv->xsize = vesa->x_resolution;
344	uc_priv->ysize = vesa->y_resolution;
345	uc_priv->line_length = vesa->bytes_per_scanline;
346	switch (vesa->bits_per_pixel) {
347	case 32:
348	case 24:
349		uc_priv->bpix = VIDEO_BPP32;
350		break;
351	case 16:
352		uc_priv->bpix = VIDEO_BPP16;
353		break;
354	default:
355		return -EPROTONOSUPPORT;
356	}
357
358	/* Use double buffering if enabled */
359	if (IS_ENABLED(CONFIG_VIDEO_COPY) && plat->base)
360		plat->copy_base = fb;
361	else
362		plat->base = fb;
363	log_debug("base = %lx, copy_base = %lx\n", plat->base, plat->copy_base);
364	plat->size = vesa->bytes_per_scanline * vesa->y_resolution;
365
366	return 0;
367}
368
369int vesa_setup_video(struct udevice *dev, int (*int15_handler)(void))
370{
371	struct video_uc_plat *plat = dev_get_uclass_plat(dev);
372	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
373	int ret;
374
375	/* If we are running from EFI or coreboot, this can't work */
376	if (!ll_boot_init()) {
377		printf("Not available (previous bootloader prevents it)\n");
378		return -EPERM;
379	}
380
381	/* In U-Boot proper, collect the information added by SPL (see below) */
382	if (IS_ENABLED(CONFIG_SPL_VIDEO) && spl_phase() > PHASE_SPL &&
383	    CONFIG_IS_ENABLED(BLOBLIST)) {
384		struct video_handoff *ho;
385
386		ho = bloblist_find(BLOBLISTT_U_BOOT_VIDEO, sizeof(*ho));
387		if (!ho)
388			return log_msg_ret("blf", -ENOENT);
389		plat->base = ho->fb;
390		plat->size = ho->size;
391		uc_priv->xsize = ho->xsize;
392		uc_priv->ysize = ho->ysize;
393		uc_priv->line_length = ho->line_length;
394		uc_priv->bpix = ho->bpix;
395	} else {
396		bootstage_start(BOOTSTAGE_ID_ACCUM_LCD, "vesa display");
397		ret = dm_pci_run_vga_bios(dev, int15_handler,
398					  PCI_ROM_USE_NATIVE |
399					  PCI_ROM_ALLOW_FALLBACK);
400		bootstage_accum(BOOTSTAGE_ID_ACCUM_LCD);
401		if (ret) {
402			debug("failed to run video BIOS: %d\n", ret);
403			return ret;
404		}
405
406		ret = vesa_setup_video_priv(&mode_info.vesa,
407					    mode_info.vesa.phys_base_ptr,
408					    uc_priv, plat);
409		if (ret) {
410			if (ret == -ENFILE) {
411				/*
412				 * See video-uclass.c for how to set up reserved
413				 * memory in your video driver
414				 */
415				log_err("CONFIG_VIDEO_COPY enabled but driver '%s' set up no reserved memory\n",
416					dev->driver->name);
417			}
418
419			debug("No video mode configured\n");
420			return ret;
421		}
422	}
423
424	printf("Video: %dx%dx%d\n", uc_priv->xsize, uc_priv->ysize,
425	       mode_info.vesa.bits_per_pixel);
426
427	/* In SPL, store the information for use by U-Boot proper */
428	if (spl_phase() == PHASE_SPL && CONFIG_IS_ENABLED(BLOBLIST)) {
429		struct video_handoff *ho;
430
431		ho = bloblist_add(BLOBLISTT_U_BOOT_VIDEO, sizeof(*ho), 0);
432		if (!ho)
433			return log_msg_ret("blc", -ENOMEM);
434
435		ho->fb = plat->base;
436		ho->size = plat->size;
437		ho->xsize = uc_priv->xsize;
438		ho->ysize = uc_priv->ysize;
439		ho->line_length = uc_priv->line_length;
440		ho->bpix = uc_priv->bpix;
441	}
442
443	return 0;
444}
445