1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2016 Socionext Inc.
4 *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5 */
6
7#include "clk-uniphier.h"
8
9#define UNIPHIER_MIO_CLK_SD_FIXED					\
10	UNIPHIER_CLK_RATE(128, 44444444),				\
11	UNIPHIER_CLK_RATE(129, 33333333),				\
12	UNIPHIER_CLK_RATE(130, 50000000),				\
13	UNIPHIER_CLK_RATE(131, 66666667),				\
14	UNIPHIER_CLK_RATE(132, 100000000),				\
15	UNIPHIER_CLK_RATE(133, 40000000),				\
16	UNIPHIER_CLK_RATE(134, 25000000),				\
17	UNIPHIER_CLK_RATE(135, 22222222)
18
19#define UNIPHIER_MIO_CLK_SD(_id, ch)					\
20	{								\
21		.type = UNIPHIER_CLK_TYPE_MUX,				\
22		.id = (_id) + 32,					\
23		.data.mux = {						\
24			.parent_ids = {					\
25				128,					\
26				129,					\
27				130,					\
28				131,					\
29				132,					\
30				133,					\
31				134,					\
32				135,					\
33			},						\
34			.num_parents = 8,				\
35			.reg = 0x30 + 0x200 * (ch),			\
36			.masks = {					\
37				0x00031000,				\
38				0x00031000,				\
39				0x00031000,				\
40				0x00031000,				\
41				0x00001300,				\
42				0x00001300,				\
43				0x00001300,				\
44				0x00001300,				\
45			},						\
46			.vals = {					\
47				0x00000000,				\
48				0x00010000,				\
49				0x00020000,				\
50				0x00030000,				\
51				0x00001000,				\
52				0x00001100,				\
53				0x00001200,				\
54				0x00001300,				\
55			},						\
56		},							\
57	},								\
58	UNIPHIER_CLK_GATE((_id), (_id) + 32, 0x20 + 0x200 * (ch), 8)
59
60#define UNIPHIER_MIO_CLK_USB2(id, ch)					\
61	UNIPHIER_CLK_GATE_SIMPLE((id), 0x20 + 0x200 * (ch), 28)
62
63#define UNIPHIER_MIO_CLK_USB2_PHY(id, ch)				\
64	UNIPHIER_CLK_GATE_SIMPLE((id), 0x20 + 0x200 * (ch), 29)
65
66#define UNIPHIER_MIO_CLK_DMAC(id)					\
67	UNIPHIER_CLK_GATE_SIMPLE((id), 0x20, 25)
68
69const struct uniphier_clk_data uniphier_mio_clk_data[] = {
70	UNIPHIER_MIO_CLK_SD_FIXED,
71	UNIPHIER_MIO_CLK_SD(0, 0),
72	UNIPHIER_MIO_CLK_SD(1, 1),
73	UNIPHIER_MIO_CLK_SD(2, 2),
74	UNIPHIER_MIO_CLK_DMAC(7),
75	UNIPHIER_MIO_CLK_USB2(8, 0),
76	UNIPHIER_MIO_CLK_USB2(9, 1),
77	UNIPHIER_MIO_CLK_USB2(10, 2),
78	UNIPHIER_MIO_CLK_USB2_PHY(12, 0),
79	UNIPHIER_MIO_CLK_USB2_PHY(13, 1),
80	UNIPHIER_MIO_CLK_USB2_PHY(14, 2),
81	{ /* sentinel */ }
82};
83