1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Copyright (C) 2008,2010 Freescale Semiconductor, Inc. 4 * Copyright 2019 NXP 5 * Author: Dave Liu <daveliu@freescale.com> 6 */ 7 8#include <common.h> 9#include <ahci.h> 10#include <blk.h> 11#include <command.h> 12#include <console.h> 13#include <cpu_func.h> 14#include <dm.h> 15#include <dm/device-internal.h> 16#include <log.h> 17#include <asm/io.h> 18#include <asm/processor.h> 19#include <asm/fsl_serdes.h> 20#include <malloc.h> 21#include <libata.h> 22#include <fis.h> 23#include <sata.h> 24#include <linux/delay.h> 25#include "fsl_sata.h" 26 27static inline void sdelay(unsigned long sec) 28{ 29 unsigned long i; 30 for (i = 0; i < sec; i++) 31 mdelay(1000); 32} 33 34static void fsl_sata_dump_sfis(struct sata_fis_d2h *s) 35{ 36 printf("Status FIS dump:\n\r"); 37 printf("fis_type: %02x\n\r", s->fis_type); 38 printf("pm_port_i: %02x\n\r", s->pm_port_i); 39 printf("status: %02x\n\r", s->status); 40 printf("error: %02x\n\r", s->error); 41 printf("lba_low: %02x\n\r", s->lba_low); 42 printf("lba_mid: %02x\n\r", s->lba_mid); 43 printf("lba_high: %02x\n\r", s->lba_high); 44 printf("device: %02x\n\r", s->device); 45 printf("lba_low_exp: %02x\n\r", s->lba_low_exp); 46 printf("lba_mid_exp: %02x\n\r", s->lba_mid_exp); 47 printf("lba_high_exp: %02x\n\r", s->lba_high_exp); 48 printf("res1: %02x\n\r", s->res1); 49 printf("sector_count: %02x\n\r", s->sector_count); 50 printf("sector_count_exp: %02x\n\r", s->sector_count_exp); 51} 52 53static int ata_wait_register(unsigned __iomem *addr, u32 mask, 54 u32 val, u32 timeout_msec) 55{ 56 int i; 57 u32 temp; 58 59 for (i = 0; (((temp = in_le32(addr)) & mask) != val) 60 && i < timeout_msec; i++) 61 mdelay(1); 62 return (i < timeout_msec) ? 0 : -1; 63} 64 65static int init_sata(struct fsl_ata_priv *priv, int dev) 66{ 67 u32 length, align; 68 cmd_hdr_tbl_t *cmd_hdr; 69 u32 cda; 70 u32 val32; 71 fsl_sata_reg_t __iomem *reg; 72 u32 sig; 73 int i; 74 fsl_sata_t *sata; 75 76 if (dev < 0 || dev > (CONFIG_SYS_SATA_MAX_DEVICE - 1)) { 77 printf("the sata index %d is out of ranges\n\r", dev); 78 return -1; 79 } 80 81#ifdef CONFIG_MPC85xx 82 if ((dev == 0) && (!is_serdes_configured(SATA1))) { 83 printf("SATA%d [dev = %d] is not enabled\n", dev+1, dev); 84 return -1; 85 } 86 if ((dev == 1) && (!is_serdes_configured(SATA2))) { 87 printf("SATA%d [dev = %d] is not enabled\n", dev+1, dev); 88 return -1; 89 } 90#endif 91 92 /* Allocate SATA device driver struct */ 93 sata = (fsl_sata_t *)malloc(sizeof(fsl_sata_t)); 94 if (!sata) { 95 printf("alloc the sata device struct failed\n\r"); 96 return -1; 97 } 98 /* Zero all of the device driver struct */ 99 memset((void *)sata, 0, sizeof(fsl_sata_t)); 100 101 snprintf(sata->name, 12, "SATA%d:", dev); 102 103 /* Set the controller register base address to device struct */ 104 reg = (fsl_sata_reg_t *)(priv->base + priv->offset * dev); 105 sata->dma_flag = priv->flag; 106 priv->fsl_sata = sata; 107 sata->reg_base = reg; 108 109 /* Allocate the command header table, 4 bytes aligned */ 110 length = sizeof(struct cmd_hdr_tbl); 111 align = SATA_HC_CMD_HDR_TBL_ALIGN; 112 sata->cmd_hdr_tbl_offset = (void *)malloc(length + align); 113 if (!sata->cmd_hdr_tbl_offset) { 114 printf("alloc the command header failed\n\r"); 115 return -1; 116 } 117 118 cmd_hdr = (cmd_hdr_tbl_t *)(((u32)sata->cmd_hdr_tbl_offset + align) 119 & ~(align - 1)); 120 sata->cmd_hdr = cmd_hdr; 121 122 /* Zero all of the command header table */ 123 memset((void *)sata->cmd_hdr_tbl_offset, 0, length + align); 124 125 /* Allocate command descriptor for all command */ 126 length = sizeof(struct cmd_desc) * SATA_HC_MAX_CMD; 127 align = SATA_HC_CMD_DESC_ALIGN; 128 sata->cmd_desc_offset = (void *)malloc(length + align); 129 if (!sata->cmd_desc_offset) { 130 printf("alloc the command descriptor failed\n\r"); 131 return -1; 132 } 133 sata->cmd_desc = (cmd_desc_t *)(((u32)sata->cmd_desc_offset + align) 134 & ~(align - 1)); 135 /* Zero all of command descriptor */ 136 memset((void *)sata->cmd_desc_offset, 0, length + align); 137 138 /* Link the command descriptor to command header */ 139 for (i = 0; i < SATA_HC_MAX_CMD; i++) { 140 cda = ((u32)sata->cmd_desc + SATA_HC_CMD_DESC_SIZE * i) 141 & ~(CMD_HDR_CDA_ALIGN - 1); 142 cmd_hdr->cmd_slot[i].cda = cpu_to_le32(cda); 143 } 144 145 /* To have safe state, force the controller offline */ 146 val32 = in_le32(®->hcontrol); 147 val32 &= ~HCONTROL_ONOFF; 148 val32 |= HCONTROL_FORCE_OFFLINE; 149 out_le32(®->hcontrol, val32); 150 151 /* Wait the controller offline */ 152 ata_wait_register(®->hstatus, HSTATUS_ONOFF, 0, 1000); 153 154 /* Set the command header base address to CHBA register to tell DMA */ 155 out_le32(®->chba, (u32)cmd_hdr & ~0x3); 156 157 /* Snoop for the command header */ 158 val32 = in_le32(®->hcontrol); 159 val32 |= HCONTROL_HDR_SNOOP; 160 out_le32(®->hcontrol, val32); 161 162 /* Disable all of interrupts */ 163 val32 = in_le32(®->hcontrol); 164 val32 &= ~HCONTROL_INT_EN_ALL; 165 out_le32(®->hcontrol, val32); 166 167 /* Clear all of interrupts */ 168 val32 = in_le32(®->hstatus); 169 out_le32(®->hstatus, val32); 170 171 /* Set the ICC, no interrupt coalescing */ 172 out_le32(®->icc, 0x01000000); 173 174 /* No PM attatched, the SATA device direct connect */ 175 out_le32(®->cqpmp, 0); 176 177 /* Clear SError register */ 178 val32 = in_le32(®->serror); 179 out_le32(®->serror, val32); 180 181 /* Clear CER register */ 182 val32 = in_le32(®->cer); 183 out_le32(®->cer, val32); 184 185 /* Clear DER register */ 186 val32 = in_le32(®->der); 187 out_le32(®->der, val32); 188 189 /* No device detection or initialization action requested */ 190 out_le32(®->scontrol, 0x00000300); 191 192 /* Configure the transport layer, default value */ 193 out_le32(®->transcfg, 0x08000016); 194 195 /* Configure the link layer, default value */ 196 out_le32(®->linkcfg, 0x0000ff34); 197 198 /* Bring the controller online */ 199 val32 = in_le32(®->hcontrol); 200 val32 |= HCONTROL_ONOFF; 201 out_le32(®->hcontrol, val32); 202 203 mdelay(100); 204 205 /* print sata device name */ 206 printf("%s ", sata->name); 207 208 /* Wait PHY RDY signal changed for 500ms */ 209 ata_wait_register(®->hstatus, HSTATUS_PHY_RDY, 210 HSTATUS_PHY_RDY, 500); 211 212 /* Check PHYRDY */ 213 val32 = in_le32(®->hstatus); 214 if (val32 & HSTATUS_PHY_RDY) { 215 sata->link = 1; 216 } else { 217 sata->link = 0; 218 printf("(No RDY)\n\r"); 219 return -1; 220 } 221 222 /* Wait for signature updated, which is 1st D2H */ 223 ata_wait_register(®->hstatus, HSTATUS_SIGNATURE, 224 HSTATUS_SIGNATURE, 10000); 225 226 if (val32 & HSTATUS_SIGNATURE) { 227 sig = in_le32(®->sig); 228 debug("Signature updated, the sig =%08x\n\r", sig); 229 sata->ata_device_type = ata_dev_classify(sig); 230 } 231 232 /* Check the speed */ 233 val32 = in_le32(®->sstatus); 234 if ((val32 & SSTATUS_SPD_MASK) == SSTATUS_SPD_GEN1) 235 printf("(1.5 Gbps)\n\r"); 236 else if ((val32 & SSTATUS_SPD_MASK) == SSTATUS_SPD_GEN2) 237 printf("(3 Gbps)\n\r"); 238 239 return 0; 240} 241 242int reset_sata(int dev) 243{ 244 return 0; 245} 246 247static void fsl_sata_dump_regs(fsl_sata_reg_t __iomem *reg) 248{ 249 printf("\n\rSATA: %08x\n\r", (u32)reg); 250 printf("CQR: %08x\n\r", in_le32(®->cqr)); 251 printf("CAR: %08x\n\r", in_le32(®->car)); 252 printf("CCR: %08x\n\r", in_le32(®->ccr)); 253 printf("CER: %08x\n\r", in_le32(®->cer)); 254 printf("CQR: %08x\n\r", in_le32(®->cqr)); 255 printf("DER: %08x\n\r", in_le32(®->der)); 256 printf("CHBA: %08x\n\r", in_le32(®->chba)); 257 printf("HStatus: %08x\n\r", in_le32(®->hstatus)); 258 printf("HControl: %08x\n\r", in_le32(®->hcontrol)); 259 printf("CQPMP: %08x\n\r", in_le32(®->cqpmp)); 260 printf("SIG: %08x\n\r", in_le32(®->sig)); 261 printf("ICC: %08x\n\r", in_le32(®->icc)); 262 printf("SStatus: %08x\n\r", in_le32(®->sstatus)); 263 printf("SError: %08x\n\r", in_le32(®->serror)); 264 printf("SControl: %08x\n\r", in_le32(®->scontrol)); 265 printf("SNotification: %08x\n\r", in_le32(®->snotification)); 266 printf("TransCfg: %08x\n\r", in_le32(®->transcfg)); 267 printf("TransStatus: %08x\n\r", in_le32(®->transstatus)); 268 printf("LinkCfg: %08x\n\r", in_le32(®->linkcfg)); 269 printf("LinkCfg1: %08x\n\r", in_le32(®->linkcfg1)); 270 printf("LinkCfg2: %08x\n\r", in_le32(®->linkcfg2)); 271 printf("LinkStatus: %08x\n\r", in_le32(®->linkstatus)); 272 printf("LinkStatus1: %08x\n\r", in_le32(®->linkstatus1)); 273 printf("PhyCtrlCfg: %08x\n\r", in_le32(®->phyctrlcfg)); 274 printf("SYSPR: %08x\n\r", in_be32(®->syspr)); 275} 276 277static int fsl_ata_exec_ata_cmd(struct fsl_sata *sata, struct sata_fis_h2d *cfis, 278 int is_ncq, int tag, u8 *buffer, u32 len) 279{ 280 cmd_hdr_entry_t *cmd_hdr; 281 cmd_desc_t *cmd_desc; 282 sata_fis_h2d_t *h2d; 283 prd_entry_t *prde; 284 u32 ext_c_ddc; 285 u32 prde_count; 286 u32 val32; 287 u32 ttl; 288 fsl_sata_reg_t __iomem *reg = sata->reg_base; 289 int i; 290 291 /* Check xfer length */ 292 if (len > SATA_HC_MAX_XFER_LEN) { 293 printf("max transfer length is 64MB\n\r"); 294 return 0; 295 } 296 297 /* Setup the command descriptor */ 298 cmd_desc = sata->cmd_desc + tag; 299 300 /* Get the pointer cfis of command descriptor */ 301 h2d = (sata_fis_h2d_t *)cmd_desc->cfis; 302 303 /* Zero the cfis of command descriptor */ 304 memset((void *)h2d, 0, SATA_HC_CMD_DESC_CFIS_SIZE); 305 306 /* Copy the cfis from user to command descriptor */ 307 h2d->fis_type = cfis->fis_type; 308 h2d->pm_port_c = cfis->pm_port_c; 309 h2d->command = cfis->command; 310 311 h2d->features = cfis->features; 312 h2d->features_exp = cfis->features_exp; 313 314 h2d->lba_low = cfis->lba_low; 315 h2d->lba_mid = cfis->lba_mid; 316 h2d->lba_high = cfis->lba_high; 317 h2d->lba_low_exp = cfis->lba_low_exp; 318 h2d->lba_mid_exp = cfis->lba_mid_exp; 319 h2d->lba_high_exp = cfis->lba_high_exp; 320 321 if (!is_ncq) { 322 h2d->sector_count = cfis->sector_count; 323 h2d->sector_count_exp = cfis->sector_count_exp; 324 } else { /* NCQ */ 325 h2d->sector_count = (u8)(tag << 3); 326 } 327 328 h2d->device = cfis->device; 329 h2d->control = cfis->control; 330 331 /* Setup the PRD table */ 332 prde = (prd_entry_t *)cmd_desc->prdt; 333 memset((void *)prde, 0, sizeof(struct prdt)); 334 335 prde_count = 0; 336 ttl = len; 337 for (i = 0; i < SATA_HC_MAX_PRD_DIRECT; i++) { 338 if (!len) 339 break; 340 prde->dba = cpu_to_le32((u32)buffer & ~0x3); 341 debug("dba = %08x\n\r", (u32)buffer); 342 343 if (len < PRD_ENTRY_MAX_XFER_SZ) { 344 ext_c_ddc = PRD_ENTRY_DATA_SNOOP | len; 345 debug("ext_c_ddc1 = %08x, len = %08x\n\r", ext_c_ddc, len); 346 prde->ext_c_ddc = cpu_to_le32(ext_c_ddc); 347 prde_count++; 348 prde++; 349 break; 350 } else { 351 ext_c_ddc = PRD_ENTRY_DATA_SNOOP; /* 4M bytes */ 352 debug("ext_c_ddc2 = %08x, len = %08x\n\r", ext_c_ddc, len); 353 prde->ext_c_ddc = cpu_to_le32(ext_c_ddc); 354 buffer += PRD_ENTRY_MAX_XFER_SZ; 355 len -= PRD_ENTRY_MAX_XFER_SZ; 356 prde_count++; 357 prde++; 358 } 359 } 360 361 /* Setup the command slot of cmd hdr */ 362 cmd_hdr = (cmd_hdr_entry_t *)&sata->cmd_hdr->cmd_slot[tag]; 363 364 cmd_hdr->cda = cpu_to_le32((u32)cmd_desc & ~0x3); 365 366 val32 = prde_count << CMD_HDR_PRD_ENTRY_SHIFT; 367 val32 |= sizeof(sata_fis_h2d_t); 368 cmd_hdr->prde_fis_len = cpu_to_le32(val32); 369 370 cmd_hdr->ttl = cpu_to_le32(ttl); 371 372 if (!is_ncq) { 373 val32 = CMD_HDR_ATTR_RES | CMD_HDR_ATTR_SNOOP; 374 } else { 375 val32 = CMD_HDR_ATTR_RES | CMD_HDR_ATTR_SNOOP | CMD_HDR_ATTR_FPDMA; 376 } 377 378 tag &= CMD_HDR_ATTR_TAG; 379 val32 |= tag; 380 381 debug("attribute = %08x\n\r", val32); 382 cmd_hdr->attribute = cpu_to_le32(val32); 383 384 /* Make sure cmd desc and cmd slot valid before command issue */ 385 sync(); 386 387 /* PMP*/ 388 val32 = (u32)(h2d->pm_port_c & 0x0f); 389 out_le32(®->cqpmp, val32); 390 391 /* Wait no active */ 392 if (ata_wait_register(®->car, (1 << tag), 0, 10000)) 393 printf("Wait no active time out\n\r"); 394 395 /* Issue command */ 396 if (!(in_le32(®->cqr) & (1 << tag))) { 397 val32 = 1 << tag; 398 out_le32(®->cqr, val32); 399 } 400 401 /* Wait command completed for 10s */ 402 if (ata_wait_register(®->ccr, (1 << tag), (1 << tag), 10000)) { 403 if (!is_ncq) 404 printf("Non-NCQ command time out\n\r"); 405 else 406 printf("NCQ command time out\n\r"); 407 } 408 409 val32 = in_le32(®->cer); 410 411 if (val32) { 412 u32 der; 413 fsl_sata_dump_sfis((struct sata_fis_d2h *)cmd_desc->sfis); 414 printf("CE at device\n\r"); 415 fsl_sata_dump_regs(reg); 416 der = in_le32(®->der); 417 out_le32(®->cer, val32); 418 out_le32(®->der, der); 419 } 420 421 /* Clear complete flags */ 422 val32 = in_le32(®->ccr); 423 out_le32(®->ccr, val32); 424 425 return len; 426} 427 428static int fsl_ata_exec_reset_cmd(struct fsl_sata *sata, struct sata_fis_h2d *cfis, 429 int tag, u8 *buffer, u32 len) 430{ 431 return 0; 432} 433 434static int fsl_sata_exec_cmd(struct fsl_sata *sata, struct sata_fis_h2d *cfis, 435 enum cmd_type command_type, int tag, u8 *buffer, u32 len) 436{ 437 int rc; 438 439 if (tag > SATA_HC_MAX_CMD || tag < 0) { 440 printf("tag is out of range, tag=%d\n\r", tag); 441 return -1; 442 } 443 444 switch (command_type) { 445 case CMD_ATA: 446 rc = fsl_ata_exec_ata_cmd(sata, cfis, 0, tag, buffer, len); 447 return rc; 448 case CMD_RESET: 449 rc = fsl_ata_exec_reset_cmd(sata, cfis, tag, buffer, len); 450 return rc; 451 case CMD_NCQ: 452 rc = fsl_ata_exec_ata_cmd(sata, cfis, 1, tag, buffer, len); 453 return rc; 454 case CMD_ATAPI: 455 case CMD_VENDOR_BIST: 456 case CMD_BIST: 457 printf("not support now\n\r"); 458 return -1; 459 default: 460 break; 461 } 462 463 return -1; 464} 465 466static void fsl_sata_xfer_mode(fsl_sata_t *sata, u16 *id) 467{ 468 sata->pio = id[ATA_ID_PIO_MODES]; 469 sata->mwdma = id[ATA_ID_MWDMA_MODES]; 470 sata->udma = id[ATA_ID_UDMA_MODES]; 471 debug("pio %04x, mwdma %04x, udma %04x\n\r", sata->pio, sata->mwdma, sata->udma); 472} 473 474static void fsl_sata_set_features(fsl_sata_t *sata) 475{ 476 struct sata_fis_h2d h2d, *cfis = &h2d; 477 u8 udma_cap; 478 479 memset(cfis, 0, sizeof(struct sata_fis_h2d)); 480 481 cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D; 482 cfis->pm_port_c = 0x80; /* is command */ 483 cfis->command = ATA_CMD_SET_FEATURES; 484 cfis->features = SETFEATURES_XFER; 485 486 /* First check the device capablity */ 487 udma_cap = (u8)(sata->udma & 0xff); 488 debug("udma_cap %02x\n\r", udma_cap); 489 490 if (udma_cap == ATA_UDMA6) 491 cfis->sector_count = XFER_UDMA_6; 492 if (udma_cap == ATA_UDMA5) 493 cfis->sector_count = XFER_UDMA_5; 494 if (udma_cap == ATA_UDMA4) 495 cfis->sector_count = XFER_UDMA_4; 496 if (udma_cap == ATA_UDMA3) 497 cfis->sector_count = XFER_UDMA_3; 498 499 fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, NULL, 0); 500} 501 502static u32 fsl_sata_rw_cmd(fsl_sata_t *sata, u32 start, u32 blkcnt, u8 *buffer, 503 int is_write) 504{ 505 struct sata_fis_h2d h2d, *cfis = &h2d; 506 u32 block; 507 508 block = start; 509 510 memset(cfis, 0, sizeof(struct sata_fis_h2d)); 511 512 cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D; 513 cfis->pm_port_c = 0x80; /* is command */ 514 cfis->command = (is_write) ? ATA_CMD_WRITE : ATA_CMD_READ; 515 cfis->device = ATA_LBA; 516 517 cfis->device |= (block >> 24) & 0xf; 518 cfis->lba_high = (block >> 16) & 0xff; 519 cfis->lba_mid = (block >> 8) & 0xff; 520 cfis->lba_low = block & 0xff; 521 cfis->sector_count = (u8)(blkcnt & 0xff); 522 523 fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, buffer, ATA_SECT_SIZE * blkcnt); 524 return blkcnt; 525} 526 527static void fsl_sata_flush_cache(fsl_sata_t *sata) 528{ 529 struct sata_fis_h2d h2d, *cfis = &h2d; 530 531 memset(cfis, 0, sizeof(struct sata_fis_h2d)); 532 533 cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D; 534 cfis->pm_port_c = 0x80; /* is command */ 535 cfis->command = ATA_CMD_FLUSH; 536 537 fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, NULL, 0); 538} 539 540static u32 fsl_sata_rw_cmd_ext(fsl_sata_t *sata, u32 start, u32 blkcnt, 541 u8 *buffer, int is_write) 542{ 543 struct sata_fis_h2d h2d, *cfis = &h2d; 544 u64 block; 545 546 block = (u64)start; 547 548 memset(cfis, 0, sizeof(struct sata_fis_h2d)); 549 550 cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D; 551 cfis->pm_port_c = 0x80; /* is command */ 552 553 cfis->command = (is_write) ? ATA_CMD_WRITE_EXT 554 : ATA_CMD_READ_EXT; 555 556 cfis->lba_high_exp = (block >> 40) & 0xff; 557 cfis->lba_mid_exp = (block >> 32) & 0xff; 558 cfis->lba_low_exp = (block >> 24) & 0xff; 559 cfis->lba_high = (block >> 16) & 0xff; 560 cfis->lba_mid = (block >> 8) & 0xff; 561 cfis->lba_low = block & 0xff; 562 cfis->device = ATA_LBA; 563 cfis->sector_count_exp = (blkcnt >> 8) & 0xff; 564 cfis->sector_count = blkcnt & 0xff; 565 566 fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, buffer, ATA_SECT_SIZE * blkcnt); 567 return blkcnt; 568} 569 570static u32 fsl_sata_rw_ncq_cmd(fsl_sata_t *sata, u32 start, u32 blkcnt, 571 u8 *buffer, int is_write) 572{ 573 struct sata_fis_h2d h2d, *cfis = &h2d; 574 int ncq_channel; 575 u64 block; 576 577 if (sata->lba48 != 1) { 578 printf("execute FPDMA command on non-LBA48 hard disk\n\r"); 579 return -1; 580 } 581 582 block = (u64)start; 583 584 memset(cfis, 0, sizeof(struct sata_fis_h2d)); 585 586 cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D; 587 cfis->pm_port_c = 0x80; /* is command */ 588 589 cfis->command = (is_write) ? ATA_CMD_FPDMA_WRITE 590 : ATA_CMD_FPDMA_READ; 591 592 cfis->lba_high_exp = (block >> 40) & 0xff; 593 cfis->lba_mid_exp = (block >> 32) & 0xff; 594 cfis->lba_low_exp = (block >> 24) & 0xff; 595 cfis->lba_high = (block >> 16) & 0xff; 596 cfis->lba_mid = (block >> 8) & 0xff; 597 cfis->lba_low = block & 0xff; 598 599 cfis->device = ATA_LBA; 600 cfis->features_exp = (blkcnt >> 8) & 0xff; 601 cfis->features = blkcnt & 0xff; 602 603 if (sata->queue_depth >= SATA_HC_MAX_CMD) 604 ncq_channel = SATA_HC_MAX_CMD - 1; 605 else 606 ncq_channel = sata->queue_depth - 1; 607 608 /* Use the latest queue */ 609 fsl_sata_exec_cmd(sata, cfis, CMD_NCQ, ncq_channel, buffer, ATA_SECT_SIZE * blkcnt); 610 return blkcnt; 611} 612 613static void fsl_sata_flush_cache_ext(fsl_sata_t *sata) 614{ 615 struct sata_fis_h2d h2d, *cfis = &h2d; 616 617 memset(cfis, 0, sizeof(struct sata_fis_h2d)); 618 619 cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D; 620 cfis->pm_port_c = 0x80; /* is command */ 621 cfis->command = ATA_CMD_FLUSH_EXT; 622 623 fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, NULL, 0); 624} 625 626static void fsl_sata_init_wcache(fsl_sata_t *sata, u16 *id) 627{ 628 if (ata_id_has_wcache(id) && ata_id_wcache_enabled(id)) 629 sata->wcache = 1; 630 if (ata_id_has_flush(id)) 631 sata->flush = 1; 632 if (ata_id_has_flush_ext(id)) 633 sata->flush_ext = 1; 634} 635 636static u32 ata_low_level_rw_lba48(fsl_sata_t *sata, u32 blknr, lbaint_t blkcnt, 637 const void *buffer, int is_write) 638{ 639 u32 start, blks; 640 u8 *addr; 641 int max_blks; 642 643 start = blknr; 644 blks = blkcnt; 645 addr = (u8 *)buffer; 646 647 max_blks = ATA_MAX_SECTORS_LBA48; 648 do { 649 if (blks > max_blks) { 650 if (sata->dma_flag != FLAGS_FPDMA) 651 fsl_sata_rw_cmd_ext(sata, start, max_blks, addr, 652 is_write); 653 else 654 fsl_sata_rw_ncq_cmd(sata, start, max_blks, addr, 655 is_write); 656 start += max_blks; 657 blks -= max_blks; 658 addr += ATA_SECT_SIZE * max_blks; 659 } else { 660 if (sata->dma_flag != FLAGS_FPDMA) 661 fsl_sata_rw_cmd_ext(sata, start, blks, addr, 662 is_write); 663 else 664 fsl_sata_rw_ncq_cmd(sata, start, blks, addr, 665 is_write); 666 start += blks; 667 blks = 0; 668 addr += ATA_SECT_SIZE * blks; 669 } 670 } while (blks != 0); 671 672 return blkcnt; 673} 674 675static u32 ata_low_level_rw_lba28(fsl_sata_t *sata, u32 blknr, u32 blkcnt, 676 const void *buffer, int is_write) 677{ 678 u32 start, blks; 679 u8 *addr; 680 int max_blks; 681 682 start = blknr; 683 blks = blkcnt; 684 addr = (u8 *)buffer; 685 686 max_blks = ATA_MAX_SECTORS; 687 do { 688 if (blks > max_blks) { 689 fsl_sata_rw_cmd(sata, start, max_blks, addr, is_write); 690 start += max_blks; 691 blks -= max_blks; 692 addr += ATA_SECT_SIZE * max_blks; 693 } else { 694 fsl_sata_rw_cmd(sata, start, blks, addr, is_write); 695 start += blks; 696 blks = 0; 697 addr += ATA_SECT_SIZE * blks; 698 } 699 } while (blks != 0); 700 701 return blkcnt; 702} 703 704/* 705 * SATA interface between low level driver and command layer 706 */ 707static ulong sata_read(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt, 708 void *buffer) 709{ 710 struct fsl_ata_priv *priv = dev_get_plat(dev); 711 fsl_sata_t *sata = priv->fsl_sata; 712 u32 rc; 713 714 if (sata->lba48) 715 rc = ata_low_level_rw_lba48(sata, blknr, blkcnt, buffer, 716 READ_CMD); 717 else 718 rc = ata_low_level_rw_lba28(sata, blknr, blkcnt, buffer, 719 READ_CMD); 720 return rc; 721} 722 723static ulong sata_write(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt, 724 const void *buffer) 725{ 726 struct fsl_ata_priv *priv = dev_get_plat(dev); 727 fsl_sata_t *sata = priv->fsl_sata; 728 u32 rc; 729 730 if (sata->lba48) { 731 rc = ata_low_level_rw_lba48(sata, blknr, blkcnt, buffer, 732 WRITE_CMD); 733 if (sata->wcache && sata->flush_ext) 734 fsl_sata_flush_cache_ext(sata); 735 } else { 736 rc = ata_low_level_rw_lba28(sata, blknr, blkcnt, buffer, 737 WRITE_CMD); 738 if (sata->wcache && sata->flush) 739 fsl_sata_flush_cache(sata); 740 } 741 return rc; 742} 743 744static void fsl_sata_identify(fsl_sata_t *sata, u16 *id) 745{ 746 struct sata_fis_h2d h2d, *cfis = &h2d; 747 748 memset(cfis, 0, sizeof(struct sata_fis_h2d)); 749 750 cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D; 751 cfis->pm_port_c = 0x80; /* is command */ 752 cfis->command = ATA_CMD_ID_ATA; 753 754 fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, (u8 *)id, ATA_ID_WORDS * 2); 755 ata_swap_buf_le16(id, ATA_ID_WORDS); 756} 757 758static int scan_sata(struct udevice *dev) 759{ 760 struct blk_desc *desc = dev_get_uclass_plat(dev); 761 struct fsl_ata_priv *priv = dev_get_plat(dev); 762 fsl_sata_t *sata = priv->fsl_sata; 763 764 unsigned char serial[ATA_ID_SERNO_LEN + 1]; 765 unsigned char firmware[ATA_ID_FW_REV_LEN + 1]; 766 unsigned char product[ATA_ID_PROD_LEN + 1]; 767 u16 *id; 768 u64 n_sectors; 769 770 /* if no detected link */ 771 if (!sata->link) 772 return -1; 773 774 id = (u16 *)malloc(ATA_ID_WORDS * 2); 775 if (!id) { 776 printf("id malloc failed\n\r"); 777 return -1; 778 } 779 780 /* Identify device to get information */ 781 fsl_sata_identify(sata, id); 782 783 /* Serial number */ 784 ata_id_c_string(id, serial, ATA_ID_SERNO, sizeof(serial)); 785 786 /* Firmware version */ 787 ata_id_c_string(id, firmware, ATA_ID_FW_REV, sizeof(firmware)); 788 789 /* Product model */ 790 ata_id_c_string(id, product, ATA_ID_PROD, sizeof(product)); 791 792 /* Totoal sectors */ 793 n_sectors = ata_id_n_sectors(id); 794 795#ifdef CONFIG_LBA48 796 /* Check if support LBA48 */ 797 if (ata_id_has_lba48(id)) { 798 sata->lba48 = 1; 799 debug("Device support LBA48\n\r"); 800 } else 801 debug("Device supports LBA28\n\r"); 802#endif 803 804 memcpy(desc->product, serial, sizeof(serial)); 805 memcpy(desc->revision, firmware, sizeof(firmware)); 806 memcpy(desc->vendor, product, sizeof(product)); 807 desc->lba = n_sectors; 808#ifdef CONFIG_LBA48 809 desc->lba48 = sata->lba48; 810#endif 811 812 /* Get the NCQ queue depth from device */ 813 sata->queue_depth = ata_id_queue_depth(id); 814 815 /* Get the xfer mode from device */ 816 fsl_sata_xfer_mode(sata, id); 817 818 /* Get the write cache status from device */ 819 fsl_sata_init_wcache(sata, id); 820 821 /* Set the xfer mode to highest speed */ 822 fsl_sata_set_features(sata); 823 824#ifdef DEBUG 825 ata_dump_id(id); 826#endif 827 free((void *)id); 828 return 0; 829} 830 831static const struct blk_ops sata_fsl_blk_ops = { 832 .read = sata_read, 833 .write = sata_write, 834}; 835 836U_BOOT_DRIVER(sata_fsl_driver) = { 837 .name = "sata_fsl_blk", 838 .id = UCLASS_BLK, 839 .ops = &sata_fsl_blk_ops, 840 .plat_auto = sizeof(struct fsl_ata_priv), 841}; 842 843static int fsl_ata_of_to_plat(struct udevice *dev) 844{ 845 struct fsl_ata_priv *priv = dev_get_priv(dev); 846 847 priv->number = dev_read_u32_default(dev, "sata-number", -1); 848 priv->flag = dev_read_u32_default(dev, "sata-fpdma", -1); 849 priv->offset = dev_read_u32_default(dev, "sata-offset", -1); 850 851 priv->base = dev_read_addr(dev); 852 if (priv->base == FDT_ADDR_T_NONE) 853 return -EINVAL; 854 855 return 0; 856} 857 858static int fsl_unbind_device(struct udevice *dev) 859{ 860 int ret; 861 862 ret = device_remove(dev, DM_REMOVE_NORMAL); 863 if (ret) 864 return ret; 865 866 ret = device_unbind(dev); 867 if (ret) 868 return ret; 869 870 return 0; 871} 872 873static int fsl_ata_probe(struct udevice *dev) 874{ 875 struct fsl_ata_priv *blk_priv, *priv; 876 struct udevice *blk; 877 int failed_number; 878 char sata_name[10]; 879 int nr_ports; 880 int ret; 881 int i; 882 883 failed_number = 0; 884 priv = dev_get_priv(dev); 885 nr_ports = priv->number; 886 nr_ports = min(nr_ports, CONFIG_SYS_SATA_MAX_DEVICE); 887 888 for (i = 0; i < nr_ports; i++) { 889 snprintf(sata_name, sizeof(sata_name), "fsl_sata%d", i); 890 ret = blk_create_devicef(dev, "sata_fsl_blk", sata_name, 891 UCLASS_AHCI, -1, DEFAULT_BLKSZ, 892 0, &blk); 893 if (ret) { 894 debug("Can't create device\n"); 895 return ret; 896 } 897 898 /* Init SATA port */ 899 ret = init_sata(priv, i); 900 if (ret) { 901 debug("%s: Failed to init sata\n", __func__); 902 ret = fsl_unbind_device(blk); 903 if (ret) 904 return ret; 905 906 failed_number++; 907 continue; 908 } 909 910 blk_priv = dev_get_plat(blk); 911 blk_priv->fsl_sata = priv->fsl_sata; 912 /* Scan SATA port */ 913 ret = scan_sata(blk); 914 if (ret) { 915 debug("%s: Failed to scan bus\n", __func__); 916 ret = fsl_unbind_device(blk); 917 if (ret) 918 return ret; 919 920 failed_number++; 921 continue; 922 } 923 924 ret = device_probe(dev); 925 if (ret < 0) { 926 debug("Probing %s failed (%d)\n", dev->name, ret); 927 ret = fsl_unbind_device(blk); 928 if (ret) 929 return ret; 930 931 failed_number++; 932 continue; 933 } 934 } 935 936 if (failed_number == nr_ports) 937 return -ENODEV; 938 else 939 return 0; 940} 941 942static int fsl_ata_remove(struct udevice *dev) 943{ 944 fsl_sata_t *sata; 945 struct fsl_ata_priv *priv; 946 947 priv = dev_get_priv(dev); 948 sata = priv->fsl_sata; 949 950 free(sata->cmd_hdr_tbl_offset); 951 free(sata->cmd_desc_offset); 952 free(sata); 953 954 return 0; 955} 956 957static int sata_fsl_scan(struct udevice *dev) 958{ 959 /* Nothing to do here */ 960 961 return 0; 962} 963 964struct ahci_ops sata_fsl_ahci_ops = { 965 .scan = sata_fsl_scan, 966}; 967 968static const struct udevice_id fsl_ata_ids[] = { 969 { .compatible = "fsl,pq-sata-v2" }, 970 { } 971}; 972 973U_BOOT_DRIVER(fsl_ahci) = { 974 .name = "fsl_ahci", 975 .id = UCLASS_AHCI, 976 .of_match = fsl_ata_ids, 977 .ops = &sata_fsl_ahci_ops, 978 .of_to_plat = fsl_ata_of_to_plat, 979 .probe = fsl_ata_probe, 980 .remove = fsl_ata_remove, 981 .priv_auto = sizeof(struct fsl_ata_priv), 982}; 983