1U-Boot for Freescale i.MX5x
2
3This file contains information for the port of U-Boot to the Freescale
4i.MX5x SoCs.
5
61. CONFIGURATION OPTIONS/SETTINGS
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8
91.1 CONFIG_MX51_PLL_ERRATA: Workaround for i.MX51 PLL errata.
10    This option should be enabled by all boards using the i.MX51 silicon
11    version up until (including) 3.0 running at 800MHz.
12    The PLL's in the i.MX51 processor can go out of lock due to a metastable
13    condition in an analog flip-flop when used at high frequencies.
14    This workaround implements an undocumented feature in the PLL (dither
15    mode), which causes the effect of this failure to be much lower (in terms
16    of frequency deviation), avoiding system failure, or at least decreasing
17    the likelihood of system failure.
18
191.2 CFG_SYS_MAIN_PWR_ON: Trigger MAIN_PWR_ON upon startup.
20    This option should be enabled for boards having a SYS_ON_OFF_CTL signal
21    connected to GPIO1[23] and triggering the MAIN_PWR_ON signal like in the
22    reference designs.
23
242. CONVENTIONS FOR FUSE ASSIGNMENTS
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26
272.1 MAC Address: It is stored in the words 9 to 14 of fuse bank 1, using the
28    natural MAC byte order (i.e. MSB first).
29
30    This is an example how to program an example MAC address 01:23:45:67:89:ab
31    into the eFuses. Assure that the programming voltage is available and then
32    execute:
33
34    => fuse prog -y 1 9 01 23 45 67 89 ab
35
36    After programming a MAC address, consider locking the MAC fuses. This is
37    done by programming the MAC_ADDR_LOCK fuse, which is bit 4 of word 0 in
38    bank 1:
39
40    => fuse prog -y 1 0 10
41