1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
4 * (C) Copyright 2013 - 2018 Xilinx, Inc.
5 */
6
7#include <common.h>
8#include <debug_uart.h>
9#include <dfu.h>
10#include <init.h>
11#include <log.h>
12#include <dm/uclass.h>
13#include <env.h>
14#include <env_internal.h>
15#include <fdtdec.h>
16#include <fpga.h>
17#include <malloc.h>
18#include <memalign.h>
19#include <mmc.h>
20#include <watchdog.h>
21#include <wdt.h>
22#include <zynqpl.h>
23#include <asm/global_data.h>
24#include <asm/arch/hardware.h>
25#include <asm/arch/sys_proto.h>
26#include "../common/board.h"
27
28DECLARE_GLOBAL_DATA_PTR;
29
30#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_DEBUG_UART_BOARD_INIT)
31void board_debug_uart_init(void)
32{
33	/* Add initialization sequence if UART is not configured */
34}
35#endif
36
37int board_init(void)
38{
39	if (IS_ENABLED(CONFIG_SPL_BUILD))
40		printf("Silicon version:\t%d\n", zynq_get_silicon_version());
41
42	if (CONFIG_IS_ENABLED(DM_I2C) && CONFIG_IS_ENABLED(I2C_EEPROM))
43		xilinx_read_eeprom();
44
45	return 0;
46}
47
48int board_late_init(void)
49{
50	int env_targets_len = 0;
51	const char *mode;
52	char *new_targets;
53	char *env_targets;
54
55	if (!(gd->flags & GD_FLG_ENV_DEFAULT)) {
56		debug("Saved variables - Skipping\n");
57		return 0;
58	}
59
60	if (!IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG))
61		return 0;
62
63	switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
64	case ZYNQ_BM_QSPI:
65		mode = "qspi";
66		env_set("modeboot", "qspiboot");
67		break;
68	case ZYNQ_BM_NAND:
69		mode = "nand";
70		env_set("modeboot", "nandboot");
71		break;
72	case ZYNQ_BM_NOR:
73		mode = "nor";
74		env_set("modeboot", "norboot");
75		break;
76	case ZYNQ_BM_SD:
77		mode = "mmc0";
78		env_set("modeboot", "sdboot");
79		break;
80	case ZYNQ_BM_JTAG:
81		mode = "jtag pxe dhcp";
82		env_set("modeboot", "jtagboot");
83		break;
84	default:
85		mode = "";
86		env_set("modeboot", "");
87		break;
88	}
89
90	/*
91	 * One terminating char + one byte for space between mode
92	 * and default boot_targets
93	 */
94	env_targets = env_get("boot_targets");
95	if (env_targets)
96		env_targets_len = strlen(env_targets);
97
98	new_targets = calloc(1, strlen(mode) + env_targets_len + 2);
99	if (!new_targets)
100		return -ENOMEM;
101
102	sprintf(new_targets, "%s %s", mode,
103		env_targets ? env_targets : "");
104
105	env_set("boot_targets", new_targets);
106
107	return board_late_init_xilinx();
108}
109
110#if !defined(CFG_SYS_SDRAM_BASE) && !defined(CFG_SYS_SDRAM_SIZE)
111int dram_init_banksize(void)
112{
113	return fdtdec_setup_memory_banksize();
114}
115
116int dram_init(void)
117{
118	if (fdtdec_setup_mem_size_base() != 0)
119		return -EINVAL;
120
121	zynq_ddrc_init();
122
123	return 0;
124}
125#else
126int dram_init(void)
127{
128	gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
129				    CFG_SYS_SDRAM_SIZE);
130
131	zynq_ddrc_init();
132
133	return 0;
134}
135#endif
136
137enum env_location env_get_location(enum env_operation op, int prio)
138{
139	u32 bootmode = zynq_slcr_get_boot_mode() & ZYNQ_BM_MASK;
140
141	if (prio)
142		return ENVL_UNKNOWN;
143
144	switch (bootmode) {
145	case ZYNQ_BM_SD:
146		if (IS_ENABLED(CONFIG_ENV_IS_IN_FAT))
147			return ENVL_FAT;
148		if (IS_ENABLED(CONFIG_ENV_IS_IN_EXT4))
149			return ENVL_EXT4;
150		return ENVL_NOWHERE;
151	case ZYNQ_BM_NAND:
152		if (IS_ENABLED(CONFIG_ENV_IS_IN_NAND))
153			return ENVL_NAND;
154		if (IS_ENABLED(CONFIG_ENV_IS_IN_UBI))
155			return ENVL_UBI;
156		return ENVL_NOWHERE;
157	case ZYNQ_BM_NOR:
158	case ZYNQ_BM_QSPI:
159		if (IS_ENABLED(CONFIG_ENV_IS_IN_SPI_FLASH))
160			return ENVL_SPI_FLASH;
161		return ENVL_NOWHERE;
162	case ZYNQ_BM_JTAG:
163	default:
164		return ENVL_NOWHERE;
165	}
166}
167
168#if defined(CONFIG_SET_DFU_ALT_INFO)
169
170#define DFU_ALT_BUF_LEN                SZ_1K
171
172void set_dfu_alt_info(char *interface, char *devstr)
173{
174	ALLOC_CACHE_ALIGN_BUFFER(char, buf, DFU_ALT_BUF_LEN);
175
176	if (env_get("dfu_alt_info"))
177		return;
178
179	memset(buf, 0, sizeof(buf));
180
181	switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
182	case ZYNQ_BM_SD:
183		snprintf(buf, DFU_ALT_BUF_LEN,
184			 "mmc 0=boot.bin fat 0 1;"
185			 "%s fat 0 1", CONFIG_SPL_FS_LOAD_PAYLOAD_NAME);
186		break;
187#if defined(CONFIG_SPL_SPI_LOAD)
188	case ZYNQ_BM_QSPI:
189		snprintf(buf, DFU_ALT_BUF_LEN,
190			 "sf 0:0=boot.bin raw 0 0x1500000;"
191			 "%s raw 0x%x 0x500000",
192			 CONFIG_SPL_FS_LOAD_PAYLOAD_NAME,
193			 CONFIG_SYS_SPI_U_BOOT_OFFS);
194		break;
195#endif
196	default:
197		return;
198	}
199
200	env_set("dfu_alt_info", buf);
201	puts("DFU alt info setting: done\n");
202}
203#endif
204