1// SPDX-License-Identifier: GPL-2.0+
2/**
3 * Copyright 2014 Freescale Semiconductor
4 *
5 * This file provides support for the board-specific CPLD used on some Freescale
6 * reference boards.
7 *
8 * The following macros need to be defined:
9 *
10 * CFG_SYS_CPLD_BASE-The virtual address of the base of the CPLD register map
11 */
12
13#include <common.h>
14#include <command.h>
15#include <asm/io.h>
16
17#include "cpld.h"
18
19u8 cpld_read(unsigned int reg)
20{
21	void *p = (void *)CFG_SYS_CPLD_BASE;
22
23	return in_8(p + reg);
24}
25
26void cpld_write(unsigned int reg, u8 value)
27{
28	void *p = (void *)CFG_SYS_CPLD_BASE;
29
30	out_8(p + reg, value);
31}
32
33/**
34 * Set the boot bank to the alternate bank
35 */
36void cpld_set_altbank(void)
37{
38	u8 reg = CPLD_READ(flash_ctl_status);
39
40	reg = (reg & ~CPLD_BANK_SEL_MASK) | CPLD_LBMAP_ALTBANK;
41
42	CPLD_WRITE(flash_ctl_status, reg);
43	CPLD_WRITE(reset_ctl1, CPLD_LBMAP_RESET);
44}
45
46/**
47 * Set the boot bank to the default bank
48 */
49void cpld_set_defbank(void)
50{
51	u8 reg = CPLD_READ(flash_ctl_status);
52
53	reg = (reg & ~CPLD_BANK_SEL_MASK) | CPLD_LBMAP_DFLTBANK;
54
55	CPLD_WRITE(flash_ctl_status, reg);
56	CPLD_WRITE(reset_ctl1, CPLD_LBMAP_RESET);
57}
58
59#ifdef DEBUG
60static void cpld_dump_regs(void)
61{
62	printf("cpld_ver	 = 0x%02x\n", CPLD_READ(cpld_ver));
63	printf("cpld_ver_sub	 = 0x%02x\n", CPLD_READ(cpld_ver_sub));
64	printf("hw_ver		 = 0x%02x\n", CPLD_READ(hw_ver));
65	printf("sw_ver		 = 0x%02x\n", CPLD_READ(sw_ver));
66	printf("reset_ctl1	 = 0x%02x\n", CPLD_READ(reset_ctl1));
67	printf("reset_ctl2	 = 0x%02x\n", CPLD_READ(reset_ctl2));
68	printf("int_status	 = 0x%02x\n", CPLD_READ(int_status));
69	printf("flash_ctl_status = 0x%02x\n", CPLD_READ(flash_ctl_status));
70	printf("fan_ctl_status	 = 0x%02x\n", CPLD_READ(fan_ctl_status));
71#if defined(CONFIG_TARGET_T1040D4D4RDB) || defined(CONFIG_TARGET_T1042D4RDB)
72	printf("int_mask	 = 0x%02x\n", CPLD_READ(int_mask));
73#else
74	printf("led_ctl_status	 = 0x%02x\n", CPLD_READ(led_ctl_status));
75#endif
76	printf("sfp_ctl_status	 = 0x%02x\n", CPLD_READ(sfp_ctl_status));
77	printf("misc_ctl_status	 = 0x%02x\n", CPLD_READ(misc_ctl_status));
78	printf("boot_override	 = 0x%02x\n", CPLD_READ(boot_override));
79	printf("boot_config1	 = 0x%02x\n", CPLD_READ(boot_config1));
80	printf("boot_config2	 = 0x%02x\n", CPLD_READ(boot_config2));
81	putc('\n');
82}
83#endif
84
85int do_cpld(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
86{
87	int rc = 0;
88
89	if (argc <= 1)
90		return cmd_usage(cmdtp);
91
92	if (strcmp(argv[1], "reset") == 0) {
93		if (strcmp(argv[2], "altbank") == 0)
94			cpld_set_altbank();
95		else
96			cpld_set_defbank();
97#ifdef DEBUG
98	} else if (strcmp(argv[1], "dump") == 0) {
99		cpld_dump_regs();
100#endif
101	} else
102		rc = cmd_usage(cmdtp);
103
104	return rc;
105}
106
107U_BOOT_CMD(
108	cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
109	"Reset the board or alternate bank",
110	"reset - hard reset to default bank\n"
111	"cpld reset altbank - reset to alternate bank\n"
112#ifdef DEBUG
113	"cpld dump - display the CPLD registers\n"
114#endif
115	);
116