1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2018 NXP
4 */
5
6#include <common.h>
7#include <cpu_func.h>
8#include <env.h>
9#include <errno.h>
10#include <init.h>
11#include <asm/global_data.h>
12#include <linux/delay.h>
13#include <linux/libfdt.h>
14#include <fsl_esdhc_imx.h>
15#include <fdt_support.h>
16#include <asm/io.h>
17#include <asm/gpio.h>
18#include <asm/arch/clock.h>
19#include <firmware/imx/sci/sci.h>
20#include <asm/arch/imx8-pins.h>
21#include <asm/arch/snvs_security_sc.h>
22#include <asm/arch/iomux.h>
23#include <asm/arch/sys_proto.h>
24
25DECLARE_GLOBAL_DATA_PTR;
26
27#define GPIO_PAD_CTRL	((SC_PAD_CONFIG_NORMAL << PADRING_CONFIG_SHIFT) | \
28			 (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \
29			 (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \
30			 (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
31
32#define UART_PAD_CTRL	((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | \
33			 (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \
34			 (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \
35			 (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
36
37static iomux_cfg_t uart0_pads[] = {
38	SC_P_UART0_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
39	SC_P_UART0_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
40};
41
42static void setup_iomux_uart(void)
43{
44	imx8_iomux_setup_multiple_pads(uart0_pads, ARRAY_SIZE(uart0_pads));
45}
46
47int board_early_init_f(void)
48{
49	sc_pm_clock_rate_t rate = SC_80MHZ;
50	int ret;
51
52	/* Set UART0 clock root to 80 MHz */
53	ret = sc_pm_setup_uart(SC_R_UART_0, rate);
54	if (ret)
55		return ret;
56
57	setup_iomux_uart();
58
59	return 0;
60}
61
62#if CONFIG_IS_ENABLED(DM_GPIO)
63static void board_gpio_init(void)
64{
65	struct gpio_desc desc;
66	int ret;
67
68	ret = dm_gpio_lookup_name("gpio@1a_3", &desc);
69	if (ret)
70		return;
71
72	ret = dm_gpio_request(&desc, "bb_per_rst_b");
73	if (ret)
74		return;
75
76	dm_gpio_set_dir_flags(&desc, GPIOD_IS_OUT);
77	dm_gpio_set_value(&desc, 0);
78	udelay(50);
79	dm_gpio_set_value(&desc, 1);
80}
81#else
82static inline void board_gpio_init(void) {}
83#endif
84
85#if IS_ENABLED(CONFIG_FEC_MXC)
86#include <miiphy.h>
87
88int board_phy_config(struct phy_device *phydev)
89{
90	phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f);
91	phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8);
92
93	phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
94	phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100);
95
96	if (phydev->drv->config)
97		phydev->drv->config(phydev);
98
99	return 0;
100}
101#endif
102
103int checkboard(void)
104{
105	puts("Board: iMX8QXP MEK\n");
106
107	build_info();
108	print_bootinfo();
109
110	return 0;
111}
112
113int board_init(void)
114{
115	board_gpio_init();
116
117#ifdef CONFIG_IMX_SNVS_SEC_SC_AUTO
118	{
119		int ret = snvs_security_sc_init();
120
121		if (ret)
122			return ret;
123	}
124#endif
125
126	return 0;
127}
128
129#ifdef CONFIG_OF_BOARD_SETUP
130int ft_board_setup(void *blob, struct bd_info *bd)
131{
132	return 0;
133}
134#endif
135
136int board_mmc_get_env_dev(int devno)
137{
138	return devno;
139}
140
141int board_late_init(void)
142{
143	char *fdt_file;
144	bool m4_booted;
145
146#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
147	env_set("board_name", "MEK");
148	env_set("board_rev", "iMX8QXP");
149#endif
150
151	fdt_file = env_get("fdt_file");
152	m4_booted = m4_parts_booted();
153
154	if (fdt_file && !strcmp(fdt_file, "undefined")) {
155		if (m4_booted)
156			env_set("fdt_file", "imx8qxp-mek-rpmsg.dtb");
157		else
158			env_set("fdt_file", "imx8qxp-mek.dtb");
159	}
160
161	return 0;
162}
163