1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2007 - 2013 Tensilica Inc.
4 * (C) Copyright 2014 - 2016 Cadence Design Systems Inc.
5 */
6
7#include <common.h>
8#include <clock_legacy.h>
9#include <command.h>
10#include <dm.h>
11#include <init.h>
12#include <dm/platform_data/net_ethoc.h>
13#include <env.h>
14#include <linux/ctype.h>
15#include <linux/string.h>
16#include <linux/stringify.h>
17#include <asm/global_data.h>
18
19DECLARE_GLOBAL_DATA_PTR;
20
21/*
22 * Check board idendity.
23 * (Print information about the board to stdout.)
24 */
25
26
27#if defined(CONFIG_XTFPGA_LX60)
28const char *board = "XT_AV60";
29const char *description = "Avnet Xilinx LX60 FPGA Evaluation Board / ";
30#elif defined(CONFIG_XTFPGA_LX110)
31const char *board = "XT_AV110";
32const char *description = "Avnet Xilinx Virtex-5 LX110 Evaluation Kit / ";
33#elif defined(CONFIG_XTFPGA_LX200)
34const char *board = "XT_AV200";
35const char *description = "Avnet Xilinx Virtex-4 LX200 Evaluation Kit / ";
36#elif defined(CONFIG_XTFPGA_ML605)
37const char *board = "XT_ML605";
38const char *description = "Xilinx Virtex-6 FPGA ML605 Evaluation Kit / ";
39#elif defined(CONFIG_XTFPGA_KC705)
40const char *board = "XT_KC705";
41const char *description = "Xilinx Kintex-7 FPGA KC705 Evaluation Kit / ";
42#else
43const char *board = "<unknown>";
44const char *description = "";
45#endif
46
47int checkboard(void)
48{
49	printf("Board: %s: %sTensilica bitstream\n", board, description);
50	return 0;
51}
52
53unsigned long get_board_sys_clk(void)
54{
55	/*
56	 * Obtain CPU clock frequency from board and cache in global
57	 * data structure (Hz). Return 0 on success (OK to continue),
58	 * else non-zero (hang).
59	 */
60
61#ifdef CFG_SYS_FPGAREG_FREQ
62	return (*(volatile unsigned long *)CFG_SYS_FPGAREG_FREQ);
63#else
64	/* early Tensilica bitstreams lack this reg, but most run at 50 MHz */
65	return 50000000;
66#endif
67}
68
69int board_postclk_init(void)
70{
71	gd->cpu_clk = get_board_sys_clk();
72
73	return 0;
74}
75
76/*
77 *  Miscellaneous late initializations.
78 *  The environment has been set up, so we can set the Ethernet address.
79 */
80
81int misc_init_r(void)
82{
83#ifdef CONFIG_CMD_NET
84	/*
85	 * Initialize ethernet environment variables and board info.
86	 * Default MAC address comes from CONFIG_ETHADDR + DIP switches 1-6.
87	 */
88
89	char *s = env_get("ethaddr");
90	if (s == 0) {
91		unsigned int x;
92		char s[] = __stringify(CFG_ETHBASE);
93		x = (*(volatile u32 *)CFG_SYS_FPGAREG_DIPSW)
94			& FPGAREG_MAC_MASK;
95		sprintf(&s[15], "%02x", x);
96		env_set("ethaddr", s);
97	}
98#endif /* CONFIG_CMD_NET */
99
100	return 0;
101}
102
103U_BOOT_DRVINFO(sysreset) = {
104	.name = "xtfpga_sysreset",
105};
106
107static struct ethoc_eth_pdata ethoc_pdata = {
108	.eth_pdata = {
109		.iobase = CFG_SYS_ETHOC_BASE,
110	},
111	.packet_base = CFG_SYS_ETHOC_BUFFER_ADDR,
112};
113
114U_BOOT_DRVINFO(ethoc) = {
115	.name = "ethoc",
116	.plat = &ethoc_pdata,
117};
118