1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2004-2011
4 * Texas Instruments, <www.ti.com>
5 *
6 * Author :
7 *	Sunil Kumar <sunilsaini05@gmail.com>
8 *	Shashi Ranjan <shashiranjanmca05@gmail.com>
9 *
10 * Derived from Beagle Board and 3430 SDP code by
11 *	Richard Woodruff <r-woodruff2@ti.com>
12 *	Syed Mohammed Khasim <khasim@ti.com>
13 *
14 */
15#include <common.h>
16#include <bootstage.h>
17#include <dm.h>
18#include <env.h>
19#include <init.h>
20#include <net.h>
21#include <ns16550.h>
22#include <serial.h>
23#ifdef CONFIG_LED_STATUS
24#include <status_led.h>
25#endif
26#include <twl4030.h>
27#include <asm/global_data.h>
28#include <linux/mtd/rawnand.h>
29#include <asm/io.h>
30#include <asm/arch/mmc_host_def.h>
31#include <asm/arch/mux.h>
32#include <asm/arch/mem.h>
33#include <asm/arch/sys_proto.h>
34#include <asm/gpio.h>
35#include <asm/mach-types.h>
36#include <asm/omap_musb.h>
37#include <linux/errno.h>
38#include <linux/usb/ch9.h>
39#include <linux/usb/gadget.h>
40#include <linux/usb/musb.h>
41#include "beagle.h"
42#include <command.h>
43
44#define TWL4030_I2C_BUS			0
45#define EXPANSION_EEPROM_I2C_BUS	1
46#define EXPANSION_EEPROM_I2C_ADDRESS	0x50
47
48#define TINCANTOOLS_ZIPPY		0x01000100
49#define TINCANTOOLS_ZIPPY2		0x02000100
50#define TINCANTOOLS_TRAINER		0x04000100
51#define TINCANTOOLS_SHOWDOG		0x03000100
52#define KBADC_BEAGLEFPGA		0x01000600
53#define LW_BEAGLETOUCH			0x01000700
54#define BRAINMUX_LCDOG			0x01000800
55#define BRAINMUX_LCDOGTOUCH		0x02000800
56#define BBTOYS_WIFI			0x01000B00
57#define BBTOYS_VGA			0x02000B00
58#define BBTOYS_LCD			0x03000B00
59#define BCT_BRETTL3			0x01000F00
60#define BCT_BRETTL4			0x02000F00
61#define LSR_COM6L_ADPT			0x01001300
62#define BEAGLE_NO_EEPROM		0xffffffff
63
64DECLARE_GLOBAL_DATA_PTR;
65
66static struct {
67	unsigned int device_vendor;
68	unsigned char revision;
69	unsigned char content;
70	char fab_revision[8];
71	char env_var[16];
72	char env_setting[64];
73} expansion_config;
74
75/*
76 * Routine: board_init
77 * Description: Early hardware init.
78 */
79int board_init(void)
80{
81	gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
82	/* board id for Linux */
83	gd->bd->bi_arch_number = MACH_TYPE_OMAP3_BEAGLE;
84	/* boot param addr */
85	gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
86
87#if defined(CONFIG_LED_STATUS) && defined(CONFIG_LED_STATUS_BOOT_ENABLE)
88	status_led_set(CONFIG_LED_STATUS_BOOT, CONFIG_LED_STATUS_ON);
89#endif
90
91	return 0;
92}
93
94#if defined(CONFIG_SPL_OS_BOOT)
95int spl_start_uboot(void)
96{
97	/* break into full u-boot on 'c' */
98	if (serial_tstc() && serial_getc() == 'c')
99		return 1;
100
101	return 0;
102}
103#endif /* CONFIG_SPL_OS_BOOT */
104
105/*
106 * Routine: get_board_revision
107 * Description: Detect if we are running on a Beagle revision Ax/Bx,
108 *		C1/2/3, C4, xM Ax/Bx or xM Cx. This can be done by reading
109 *		the level of GPIO173, GPIO172 and GPIO171. This should
110 *		result in
111 *		GPIO173, GPIO172, GPIO171: 1 1 1 => Ax/Bx
112 *		GPIO173, GPIO172, GPIO171: 1 1 0 => C1/2/3
113 *		GPIO173, GPIO172, GPIO171: 1 0 1 => C4
114 *		GPIO173, GPIO172, GPIO171: 0 1 0 => xM Cx
115 *		GPIO173, GPIO172, GPIO171: 0 0 0 => xM Ax/Bx
116 */
117static int get_board_revision(void)
118{
119	static int revision = -1;
120
121	if (revision == -1) {
122		if (!gpio_request(171, "rev0") &&
123		    !gpio_request(172, "rev1") &&
124		    !gpio_request(173, "rev2")) {
125			gpio_direction_input(171);
126			gpio_direction_input(172);
127			gpio_direction_input(173);
128
129			revision = gpio_get_value(173) << 2 |
130				gpio_get_value(172) << 1 |
131				gpio_get_value(171);
132		} else {
133			printf("Error: unable to acquire board revision GPIOs\n");
134		}
135	}
136
137	return revision;
138}
139
140#ifdef CONFIG_SPL_BUILD
141/*
142 * Routine: get_board_mem_timings
143 * Description: If we use SPL then there is no x-loader nor config header
144 * so we have to setup the DDR timings ourself on both banks.
145 */
146void get_board_mem_timings(struct board_sdrc_timings *timings)
147{
148	int pop_mfr, pop_id;
149
150	/*
151	 * We need to identify what PoP memory is on the board so that
152	 * we know what timings to use.  If we can't identify it then
153	 * we know it's an xM.  To map the ID values please see nand_ids.c
154	 */
155	identify_nand_chip(&pop_mfr, &pop_id);
156
157	timings->mr = MICRON_V_MR_165;
158	switch (get_board_revision()) {
159	case REVISION_C4:
160		if (pop_mfr == NAND_MFR_STMICRO && pop_id == 0xba) {
161			/* 512MB DDR */
162			timings->mcfg = NUMONYX_V_MCFG_165(512 << 20);
163			timings->ctrla = NUMONYX_V_ACTIMA_165;
164			timings->ctrlb = NUMONYX_V_ACTIMB_165;
165			timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
166			break;
167		} else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xba) {
168			/* Beagleboard Rev C4, 512MB Nand/256MB DDR*/
169			timings->mcfg = MICRON_V_MCFG_165(128 << 20);
170			timings->ctrla = MICRON_V_ACTIMA_165;
171			timings->ctrlb = MICRON_V_ACTIMB_165;
172			timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
173			break;
174		} else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xbc) {
175			/* Beagleboard Rev C5, 256MB DDR */
176			timings->mcfg = MICRON_V_MCFG_200(256 << 20);
177			timings->ctrla = MICRON_V_ACTIMA_200;
178			timings->ctrlb = MICRON_V_ACTIMB_200;
179			timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
180			break;
181		}
182	case REVISION_XM_AB:
183	case REVISION_XM_C:
184		if (pop_mfr == 0) {
185			/* 256MB DDR */
186			timings->mcfg = MICRON_V_MCFG_200(256 << 20);
187			timings->ctrla = MICRON_V_ACTIMA_200;
188			timings->ctrlb = MICRON_V_ACTIMB_200;
189			timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
190		} else {
191			/* 512MB DDR */
192			timings->mcfg = NUMONYX_V_MCFG_165(512 << 20);
193			timings->ctrla = NUMONYX_V_ACTIMA_165;
194			timings->ctrlb = NUMONYX_V_ACTIMB_165;
195			timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
196		}
197		break;
198	default:
199		/* Assume 128MB and Micron/165MHz timings to be safe */
200		timings->mcfg = MICRON_V_MCFG_165(128 << 20);
201		timings->ctrla = MICRON_V_ACTIMA_165;
202		timings->ctrlb = MICRON_V_ACTIMB_165;
203		timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
204	}
205}
206#endif
207
208/*
209 * Routine: get_expansion_id
210 * Description: This function checks for expansion board by checking I2C
211 *		bus 1 for the availability of an AT24C01B serial EEPROM.
212 *		returns the device_vendor field from the EEPROM
213 */
214static unsigned int get_expansion_id(void)
215{
216	i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS);
217
218	/* return BEAGLE_NO_EEPROM if eeprom doesn't respond */
219	if (i2c_probe(EXPANSION_EEPROM_I2C_ADDRESS) == 1) {
220		i2c_set_bus_num(TWL4030_I2C_BUS);
221		return BEAGLE_NO_EEPROM;
222	}
223
224	/* read configuration data */
225	i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config,
226		 sizeof(expansion_config));
227
228	/* retry reading configuration data with 16bit addressing */
229	if ((expansion_config.device_vendor == 0xFFFFFF00) ||
230	    (expansion_config.device_vendor == 0xFFFFFFFF)) {
231		printf("EEPROM is blank or 8bit addressing failed: retrying with 16bit:\n");
232		i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 2, (u8 *)&expansion_config,
233			 sizeof(expansion_config));
234	}
235
236	i2c_set_bus_num(TWL4030_I2C_BUS);
237
238	return expansion_config.device_vendor;
239}
240
241#ifdef CONFIG_VIDEO_OMAP3
242/*
243 * Configure DSS to display background color on DVID
244 * Configure VENC to display color bar on S-Video
245 */
246static void beagle_display_init(void)
247{
248	omap3_dss_venc_config(&venc_config_std_tv, VENC_HEIGHT, VENC_WIDTH);
249	switch (get_board_revision()) {
250	case REVISION_AXBX:
251	case REVISION_CX:
252	case REVISION_C4:
253		omap3_dss_panel_config(&dvid_cfg);
254		break;
255	case REVISION_XM_AB:
256	case REVISION_XM_C:
257	default:
258		omap3_dss_panel_config(&dvid_cfg_xm);
259		break;
260	}
261}
262
263/*
264 * Enable DVI power
265 */
266static void beagle_dvi_pup(void)
267{
268	uchar val;
269
270	switch (get_board_revision()) {
271	case REVISION_AXBX:
272	case REVISION_CX:
273	case REVISION_C4:
274		gpio_request(170, "dvi");
275		gpio_direction_output(170, 0);
276		gpio_set_value(170, 1);
277		break;
278	case REVISION_XM_AB:
279	case REVISION_XM_C:
280	default:
281		#define GPIODATADIR1 (TWL4030_BASEADD_GPIO+3)
282		#define GPIODATAOUT1 (TWL4030_BASEADD_GPIO+6)
283
284		i2c_read(TWL4030_CHIP_GPIO, GPIODATADIR1, 1, &val, 1);
285		val |= 4;
286		i2c_write(TWL4030_CHIP_GPIO, GPIODATADIR1, 1, &val, 1);
287
288		i2c_read(TWL4030_CHIP_GPIO, GPIODATAOUT1, 1, &val, 1);
289		val |= 4;
290		i2c_write(TWL4030_CHIP_GPIO, GPIODATAOUT1, 1, &val, 1);
291		break;
292	}
293}
294#endif
295
296/*
297 * Routine: misc_init_r
298 * Description: Configure board specific parts
299 */
300int misc_init_r(void)
301{
302	struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE;
303	struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE;
304	struct control_prog_io *prog_io_base = (struct control_prog_io *)OMAP34XX_CTRL_BASE;
305	bool generate_fake_mac = false;
306	u32 value;
307
308	/* Enable i2c2 pullup resisters */
309	value = readl(&prog_io_base->io1);
310	value &= ~(PRG_I2C2_PULLUPRESX);
311	writel(value, &prog_io_base->io1);
312
313	switch (get_board_revision()) {
314	case REVISION_AXBX:
315		printf("Beagle Rev Ax/Bx\n");
316		env_set("beaglerev", "AxBx");
317		break;
318	case REVISION_CX:
319		printf("Beagle Rev C1/C2/C3\n");
320		env_set("beaglerev", "Cx");
321		MUX_BEAGLE_C();
322		break;
323	case REVISION_C4:
324		printf("Beagle Rev C4\n");
325		env_set("beaglerev", "C4");
326		MUX_BEAGLE_C();
327		/* Set VAUX2 to 1.8V for EHCI PHY */
328		twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
329					TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
330					TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
331					TWL4030_PM_RECEIVER_DEV_GRP_P1);
332		break;
333	case REVISION_XM_AB:
334		printf("Beagle xM Rev A/B\n");
335		env_set("beaglerev", "xMAB");
336		MUX_BEAGLE_XM();
337		/* Set VAUX2 to 1.8V for EHCI PHY */
338		twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
339					TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
340					TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
341					TWL4030_PM_RECEIVER_DEV_GRP_P1);
342		generate_fake_mac = true;
343		break;
344	case REVISION_XM_C:
345		printf("Beagle xM Rev C\n");
346		env_set("beaglerev", "xMC");
347		MUX_BEAGLE_XM();
348		/* Set VAUX2 to 1.8V for EHCI PHY */
349		twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
350					TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
351					TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
352					TWL4030_PM_RECEIVER_DEV_GRP_P1);
353		generate_fake_mac = true;
354		break;
355	default:
356		printf("Beagle unknown 0x%02x\n", get_board_revision());
357		MUX_BEAGLE_XM();
358		/* Set VAUX2 to 1.8V for EHCI PHY */
359		twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
360					TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
361					TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
362					TWL4030_PM_RECEIVER_DEV_GRP_P1);
363		generate_fake_mac = true;
364	}
365
366	switch (get_expansion_id()) {
367	case TINCANTOOLS_ZIPPY:
368		printf("Recognized Tincantools Zippy board (rev %d %s)\n",
369			expansion_config.revision,
370			expansion_config.fab_revision);
371		MUX_TINCANTOOLS_ZIPPY();
372		env_set("buddy", "zippy");
373		break;
374	case TINCANTOOLS_ZIPPY2:
375		printf("Recognized Tincantools Zippy2 board (rev %d %s)\n",
376			expansion_config.revision,
377			expansion_config.fab_revision);
378		MUX_TINCANTOOLS_ZIPPY();
379		env_set("buddy", "zippy2");
380		break;
381	case TINCANTOOLS_TRAINER:
382		printf("Recognized Tincantools Trainer board (rev %d %s)\n",
383			expansion_config.revision,
384			expansion_config.fab_revision);
385		MUX_TINCANTOOLS_ZIPPY();
386		MUX_TINCANTOOLS_TRAINER();
387		env_set("buddy", "trainer");
388		break;
389	case TINCANTOOLS_SHOWDOG:
390		printf("Recognized Tincantools Showdow board (rev %d %s)\n",
391			expansion_config.revision,
392			expansion_config.fab_revision);
393		/* Place holder for DSS2 definition for showdog lcd */
394		env_set("defaultdisplay", "showdoglcd");
395		env_set("buddy", "showdog");
396		break;
397	case KBADC_BEAGLEFPGA:
398		printf("Recognized KBADC Beagle FPGA board\n");
399		MUX_KBADC_BEAGLEFPGA();
400		env_set("buddy", "beaglefpga");
401		break;
402	case LW_BEAGLETOUCH:
403		printf("Recognized Liquidware BeagleTouch board\n");
404		env_set("buddy", "beagletouch");
405		break;
406	case BRAINMUX_LCDOG:
407		printf("Recognized Brainmux LCDog board\n");
408		env_set("buddy", "lcdog");
409		break;
410	case BRAINMUX_LCDOGTOUCH:
411		printf("Recognized Brainmux LCDog Touch board\n");
412		env_set("buddy", "lcdogtouch");
413		break;
414	case BBTOYS_WIFI:
415		printf("Recognized BeagleBoardToys WiFi board\n");
416		MUX_BBTOYS_WIFI()
417		env_set("buddy", "bbtoys-wifi");
418		break;
419	case BBTOYS_VGA:
420		printf("Recognized BeagleBoardToys VGA board\n");
421		break;
422	case BBTOYS_LCD:
423		printf("Recognized BeagleBoardToys LCD board\n");
424		break;
425	case BCT_BRETTL3:
426		printf("Recognized bct electronic GmbH brettl3 board\n");
427		break;
428	case BCT_BRETTL4:
429		printf("Recognized bct electronic GmbH brettl4 board\n");
430		break;
431	case LSR_COM6L_ADPT:
432		printf("Recognized LSR COM6L Adapter Board\n");
433		MUX_BBTOYS_WIFI()
434		env_set("buddy", "lsr-com6l-adpt");
435		break;
436	case BEAGLE_NO_EEPROM:
437		printf("No EEPROM on expansion board\n");
438		env_set("buddy", "none");
439		break;
440	default:
441		printf("Unrecognized expansion board: %x\n",
442			expansion_config.device_vendor);
443		env_set("buddy", "unknown");
444	}
445
446	if (expansion_config.content == 1)
447		env_set(expansion_config.env_var, expansion_config.env_setting);
448
449	twl4030_power_init();
450	twl4030_power_mmc_init(0);
451
452	switch (get_board_revision()) {
453	case REVISION_XM_AB:
454		twl4030_led_init(TWL4030_LED_LEDEN_LEDBON);
455		break;
456	default:
457		twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
458		break;
459	}
460
461	/* Set GPIO states before they are made outputs */
462	writel(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1,
463		&gpio6_base->setdataout);
464	writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
465		GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout);
466
467	/* Configure GPIOs to output */
468	writel(~(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1), &gpio6_base->oe);
469	writel(~(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
470		GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe);
471
472	omap_die_id_display();
473
474#ifdef CONFIG_VIDEO_OMAP3
475	beagle_dvi_pup();
476	beagle_display_init();
477	omap3_dss_enable();
478#endif
479
480	if (generate_fake_mac)
481		omap_die_id_usbethaddr();
482
483#if defined(CONFIG_MTDIDS_DEFAULT) && defined(CONFIG_MTDPARTS_DEFAULT)
484	if (strlen(CONFIG_MTDIDS_DEFAULT))
485		env_set("mtdids", CONFIG_MTDIDS_DEFAULT);
486
487	if (strlen(CONFIG_MTDPARTS_DEFAULT))
488		env_set("mtdparts", CONFIG_MTDPARTS_DEFAULT);
489#endif
490
491	return 0;
492}
493
494/*
495 * Routine: set_muxconf_regs
496 * Description: Setting up the configuration Mux registers specific to the
497 *		hardware. Many pins need to be moved from protect to primary
498 *		mode.
499 */
500void set_muxconf_regs(void)
501{
502	MUX_BEAGLE();
503}
504