1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Copyright (C) 2022 Tony Dinh <mibodhi@gmail.com> 4 * Copyright (C) 2010 Eric C. Cooper <ecc@cmu.edu> 5 * 6 * Based on sheevaplug.c originally written by 7 * Prafulla Wadaskar <prafulla@marvell.com> 8 * (C) Copyright 2009 9 * Marvell Semiconductor <www.marvell.com> 10 */ 11 12#include <common.h> 13#include <bootstage.h> 14#include <init.h> 15#include <netdev.h> 16#include <asm/arch/soc.h> 17#include <asm/arch/mpp.h> 18#include <asm/arch/cpu.h> 19#include <asm/global_data.h> 20#include <asm/io.h> 21#include <asm/mach-types.h> 22#include <linux/bitops.h> 23 24DECLARE_GLOBAL_DATA_PTR; 25 26#define DOCKSTAR_OE_LOW (~(0)) 27#define DOCKSTAR_OE_HIGH (~(0)) 28#define DOCKSTAR_OE_VAL_LOW BIT(29) /* USB_PWEN low */ 29#define DOCKSTAR_OE_VAL_HIGH BIT(17) /* LED pin high */ 30 31int board_early_init_f(void) 32{ 33 /* 34 * default gpio configuration 35 * There are maximum 64 gpios controlled through 2 sets of registers 36 * the below configuration configures mainly initial LED status 37 */ 38 mvebu_config_gpio(DOCKSTAR_OE_VAL_LOW, 39 DOCKSTAR_OE_VAL_HIGH, 40 DOCKSTAR_OE_LOW, DOCKSTAR_OE_HIGH); 41 42 /* Multi-Purpose Pins Functionality configuration */ 43 static const u32 kwmpp_config[] = { 44 MPP0_NF_IO2, 45 MPP1_NF_IO3, 46 MPP2_NF_IO4, 47 MPP3_NF_IO5, 48 MPP4_NF_IO6, 49 MPP5_NF_IO7, 50 MPP6_SYSRST_OUTn, 51 MPP7_GPO, 52 MPP8_UART0_RTS, 53 MPP9_UART0_CTS, 54 MPP10_UART0_TXD, 55 MPP11_UART0_RXD, 56 MPP12_SD_CLK, 57 MPP13_SD_CMD, 58 MPP14_SD_D0, 59 MPP15_SD_D1, 60 MPP16_SD_D2, 61 MPP17_SD_D3, 62 MPP18_NF_IO0, 63 MPP19_NF_IO1, 64 MPP20_GPIO, 65 MPP21_GPIO, 66 MPP22_GPIO, 67 MPP23_GPIO, 68 MPP24_GPIO, 69 MPP25_GPIO, 70 MPP26_GPIO, 71 MPP27_GPIO, 72 MPP28_GPIO, 73 MPP29_TSMP9, 74 MPP30_GPIO, 75 MPP31_GPIO, 76 MPP32_GPIO, 77 MPP33_GPIO, 78 MPP34_GPIO, 79 MPP35_GPIO, 80 MPP36_GPIO, 81 MPP37_GPIO, 82 MPP38_GPIO, 83 MPP39_GPIO, 84 MPP40_GPIO, 85 MPP41_GPIO, 86 MPP42_GPIO, 87 MPP43_GPIO, 88 MPP44_GPIO, 89 MPP45_GPIO, 90 MPP46_GPIO, 91 MPP47_GPIO, 92 MPP48_GPIO, 93 MPP49_GPIO, 94 0 95 }; 96 kirkwood_mpp_conf(kwmpp_config, NULL); 97 return 0; 98} 99 100int board_eth_init(struct bd_info *bis) 101{ 102 return cpu_eth_init(bis); 103} 104 105int board_init(void) 106{ 107 /* 108 * arch number of board 109 */ 110 gd->bd->bi_arch_number = MACH_TYPE_DOCKSTAR; 111 112 /* address of boot parameters */ 113 gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; 114 115 return 0; 116} 117 118#if CONFIG_IS_ENABLED(BOOTSTAGE) 119#define GREEN_LED BIT(14) 120#define ORANGE_LED BIT(15) 121#define BOTH_LEDS (GREEN_LED | ORANGE_LED) 122#define NEITHER_LED 0 123 124static void set_leds(u32 leds, u32 blinking) 125{ 126 struct kwgpio_registers *r = (struct kwgpio_registers *)MVEBU_GPIO1_BASE; 127 u32 oe; 128 u32 bl; 129 130 oe = readl(&r->oe) | BOTH_LEDS; 131 writel(oe & ~leds, &r->oe); /* active low */ 132 bl = readl(&r->blink_en) & ~BOTH_LEDS; 133 writel(bl | blinking, &r->blink_en); 134} 135 136void show_boot_progress(int val) 137{ 138 switch (val) { 139 case BOOTSTAGE_ID_RUN_OS: /* booting Linux */ 140 set_leds(BOTH_LEDS, NEITHER_LED); 141 break; 142 case BOOTSTAGE_ID_NET_ETH_START: /* Ethernet initialization */ 143 set_leds(GREEN_LED, GREEN_LED); 144 break; 145 default: 146 if (val < 0) /* error */ 147 set_leds(ORANGE_LED, ORANGE_LED); 148 break; 149 } 150} 151#endif 152