1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2005-2009
4 * BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de>
5 *
6 * (C) Copyright 2000-2003
7 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8 */
9
10#include <common.h>
11#include <command.h>
12#include <asm/global_data.h>
13#include "asm/m5282.h"
14#include <bmp_layout.h>
15#include <env.h>
16#include <init.h>
17#include <status_led.h>
18#include <bus_vcxk.h>
19
20/*---------------------------------------------------------------------------*/
21
22DECLARE_GLOBAL_DATA_PTR;
23
24/*---------------------------------------------------------------------------*/
25
26int checkboard (void)
27{
28	puts("Board: EB+CPU5282 (BuS Elektronik GmbH & Co. KG)\n");
29#if (CONFIG_TEXT_BASE ==  CFG_SYS_INT_FLASH_BASE)
30	puts("       Boot from Internal FLASH\n");
31#endif
32	return 0;
33}
34
35int dram_init(void)
36{
37	int size, i;
38
39	size = 0;
40	MCFSDRAMC_DCR = MCFSDRAMC_DCR_RTIM_6 |
41			MCFSDRAMC_DCR_RC((15 * CFG_SYS_CLK / 1000000) >> 4);
42	asm (" nop");
43#ifdef CFG_SYS_SDRAM_BASE0
44	MCFSDRAMC_DACR0 = MCFSDRAMC_DACR_BASE(CFG_SYS_SDRAM_BASE0)|
45		MCFSDRAMC_DACR_CASL(1) | MCFSDRAMC_DACR_CBM(3) |
46		MCFSDRAMC_DACR_PS_32;
47	asm (" nop");
48
49	MCFSDRAMC_DMR0 = MCFSDRAMC_DMR_BAM_16M | MCFSDRAMC_DMR_V;
50	asm (" nop");
51
52	MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_IP;
53	asm (" nop");
54	for (i = 0; i < 10; i++)
55		asm (" nop");
56
57	*(unsigned long *)(CFG_SYS_SDRAM_BASE0) = 0xA5A5A5A5;
58	asm (" nop");
59	MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_RE;
60	asm (" nop");
61
62	for (i = 0; i < 2000; i++)
63		asm (" nop");
64
65	MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_IMRS;
66	asm (" nop");
67	/* write SDRAM mode register */
68	*(unsigned long *)(CFG_SYS_SDRAM_BASE0 + 0x80440) = 0xA5A5A5A5;
69	asm (" nop");
70	size += CFG_SYS_SDRAM_SIZE0 * 1024 * 1024;
71#endif
72#ifdef CFG_SYS_SDRAM_BASE1xx
73	MCFSDRAMC_DACR1 = MCFSDRAMC_DACR_BASE (CFG_SYS_SDRAM_BASE1)
74			| MCFSDRAMC_DACR_CASL (1)
75			| MCFSDRAMC_DACR_CBM (3)
76			| MCFSDRAMC_DACR_PS_16;
77
78	MCFSDRAMC_DMR1 = MCFSDRAMC_DMR_BAM_16M | MCFSDRAMC_DMR_V;
79
80	MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IP;
81
82	*(unsigned short *) (CFG_SYS_SDRAM_BASE1) = 0xA5A5;
83	MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_RE;
84
85	for (i = 0; i < 2000; i++)
86		asm (" nop");
87
88	MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IMRS;
89	*(unsigned int *) (CFG_SYS_SDRAM_BASE1 + 0x220) = 0xA5A5;
90	size += CFG_SYS_SDRAM_SIZE1 * 1024 * 1024;
91#endif
92	gd->ram_size = size;
93
94	return 0;
95}
96
97#if defined(CFG_SYS_DRAM_TEST)
98int testdram(void)
99{
100	uint *pstart = (uint *) CONFIG_SYS_MEMTEST_START;
101	uint *pend = (uint *) CONFIG_SYS_MEMTEST_END;
102	uint *p;
103
104	printf("SDRAM test phase 1:\n");
105	for (p = pstart; p < pend; p++)
106		*p = 0xaaaaaaaa;
107
108	for (p = pstart; p < pend; p++) {
109		if (*p != 0xaaaaaaaa) {
110			printf ("SDRAM test fails at: %08x\n", (uint) p);
111			return 1;
112		}
113	}
114
115	printf("SDRAM test phase 2:\n");
116	for (p = pstart; p < pend; p++)
117		*p = 0x55555555;
118
119	for (p = pstart; p < pend; p++) {
120		if (*p != 0x55555555) {
121			printf ("SDRAM test fails at: %08x\n", (uint) p);
122			return 1;
123		}
124	}
125
126	printf("SDRAM test passed.\n");
127	return 0;
128}
129#endif
130
131#if defined(CONFIG_HW_WATCHDOG)
132
133void hw_watchdog_init(void)
134{
135	char *s;
136	int enable;
137
138	enable = 1;
139	s = env_get("watchdog");
140	if (s != NULL)
141		if ((strncmp(s, "off", 3) == 0) || (strncmp(s, "0", 1) == 0))
142			enable = 0;
143	if (enable)
144		MCFGPTA_GPTDDR  |= (1<<2);
145	else
146		MCFGPTA_GPTDDR  &= ~(1<<2);
147}
148
149void hw_watchdog_reset(void)
150{
151	MCFGPTA_GPTPORT  ^= (1<<2);
152}
153#endif
154
155int misc_init_r(void)
156{
157#ifdef	CONFIG_HW_WATCHDOG
158	hw_watchdog_init();
159#endif
160	return 1;
161}
162
163void __led_toggle(led_id_t mask)
164{
165	MCFGPTA_GPTPORT ^= (1 << 3);
166}
167
168void __led_init(led_id_t mask, int state)
169{
170	__led_set(mask, state);
171	MCFGPTA_GPTDDR  |= (1 << 3);
172}
173
174void __led_set(led_id_t mask, int state)
175{
176	if (state == CONFIG_LED_STATUS_ON)
177		MCFGPTA_GPTPORT |= (1 << 3);
178	else
179		MCFGPTA_GPTPORT &= ~(1 << 3);
180}
181
182/*---------------------------------------------------------------------------*/
183
184
185/* EOF EB+MCF-EV123.c */
186