1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright (C) 2017 Intel Corporation.
4 */
5
6#ifndef ASM_FAST_SPI_H
7#define ASM_FAST_SPI_H
8
9#include <pci.h>
10#include <linux/bitops.h>
11
12/* Register offsets from the MMIO region base (PCI_BASE_ADDRESS_0) */
13struct fast_spi_regs {
14	u32 bfp;
15	u32 hsfsts_ctl;
16	u32 faddr;
17	u32 dlock;
18
19	u32 fdata[0x10];
20
21	u32 fracc;
22	u32 freg[12];
23	u32 fpr[5];
24	u32 gpr0;
25	u32 spare2;
26	u32 sts_ctl;
27	u16 preop;
28	u16 optype;
29	u8 opmenu[8];
30
31	u32 spare3;
32	u32 fdoc;
33	u32 fdod;
34	u32 spare4;
35	u32 afc;
36	u32 vscc[2];
37	u32 ptinx;
38	u32 ptdata;
39};
40check_member(fast_spi_regs, ptdata, 0xd0);
41
42/* Bit definitions for BFPREG (0x00) register */
43#define SPIBAR_BFPREG_PRB_MASK		0x7fff
44#define SPIBAR_BFPREG_PRL_SHIFT		16
45#define SPIBAR_BFPREG_PRL_MASK		(0x7fff << SPIBAR_BFPREG_PRL_SHIFT)
46
47/* PCI configuration registers */
48#define SPIBAR_BIOS_CONTROL			0xdc
49#define SPIBAR_BIOS_CONTROL_WPD			BIT(0)
50#define SPIBAR_BIOS_CONTROL_LOCK_ENABLE		BIT(1)
51#define SPIBAR_BIOS_CONTROL_CACHE_DISABLE	BIT(2)
52#define SPIBAR_BIOS_CONTROL_PREFETCH_ENABLE	BIT(3)
53#define SPIBAR_BIOS_CONTROL_EISS		BIT(5)
54#define SPIBAR_BIOS_CONTROL_BILD		BIT(7)
55
56/**
57 * fast_spi_get_bios_mmap() - Get memory map for SPI flash
58 *
59 * @pdev:	PCI device to use (this is the Fast SPI device)
60 * @map_basep:	Returns base memory address for mapped SPI
61 * @map_sizep:	Returns size of mapped SPI
62 * @offsetp:	Returns start offset of SPI flash where the map works
63 *	correctly (offsets before this are not visible)
64 * Return: 0 (always)
65 */
66int fast_spi_get_bios_mmap(pci_dev_t pdev, ulong *map_basep, uint *map_sizep,
67			   uint *offsetp);
68
69/**
70 * fast_spi_get_bios_mmap_regs() - Get memory map for SPI flash given regs
71 *
72 * @regs:	SPI registers to use
73 * @map_basep:	Returns base memory address for mapped SPI
74 * @map_sizep:	Returns size of mapped SPI
75 * @offsetp:	Returns start offset of SPI flash where the map works
76 *	correctly (offsets before this are not visible)
77 * Return: 0 (always)
78 */
79int fast_spi_get_bios_mmap_regs(struct fast_spi_regs *regs, ulong *map_basep,
80				uint *map_sizep, uint *offsetp);
81
82/**
83 * fast_spi_early_init() - Set up a BAR to use SPI early in U-Boot
84 *
85 * @pdev:	PCI device to use (this is the Fast SPI device)
86 * @mmio_base:	MMIO base to use to access registers
87 */
88int fast_spi_early_init(pci_dev_t pdev, ulong mmio_base);
89
90#endif	/* ASM_FAST_SPI_H */
91