1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * Copyright (C) 2017 Andes Technology Corporation 4 * Rick Chen, Andes Technology Corporation <rick@andestech.com> 5 */ 6 7#ifndef __ASM_RISCV_SYSTEM_H 8#define __ASM_RISCV_SYSTEM_H 9 10#include <asm/csr.h> 11 12struct event; 13 14/* 15 * Interupt configuration macros 16 */ 17 18#define local_irq_save(__flags) \ 19 do { \ 20 __flags = csr_read_clear(CSR_SSTATUS, SR_SIE) & SR_SIE; \ 21 } while (0) 22 23#define local_irq_restore(__flags) \ 24 do { \ 25 csr_set(CSR_SSTATUS, __flags & SR_SIE); \ 26 } while (0) 27 28/* Hook to set up the CPU (called from SPL too) */ 29int riscv_cpu_setup(void); 30 31#endif /* __ASM_RISCV_SYSTEM_H */ 32