1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) Freescale Semiconductor, Inc. 2007
4 *
5 * Author: Scott Wood <scottwood@freescale.com>,
6 * with some bits from older board-specific PCI initialization.
7 */
8
9#include <common.h>
10#include <init.h>
11#include <pci.h>
12#include <asm/bitops.h>
13#include <asm/global_data.h>
14#include <linux/delay.h>
15
16#if defined(CONFIG_OF_LIBFDT)
17#include <linux/libfdt.h>
18#include <fdt_support.h>
19#endif
20
21#include <asm/mpc8349_pci.h>
22
23#define MAX_BUSES 2
24
25DECLARE_GLOBAL_DATA_PTR;
26
27static struct pci_controller pci_hose[MAX_BUSES];
28static int pci_num_buses;
29
30#if defined(CONFIG_OF_LIBFDT)
31void ft_pci_setup(void *blob, struct bd_info *bd)
32{
33	int nodeoffset;
34	int tmp[2];
35	const char *path;
36
37	if (pci_num_buses < 1)
38		return;
39
40	nodeoffset = fdt_path_offset(blob, "/aliases");
41	if (nodeoffset >= 0) {
42		path = fdt_getprop(blob, nodeoffset, "pci0", NULL);
43		if (path) {
44			tmp[0] = cpu_to_be32(pci_hose[0].first_busno);
45			tmp[1] = cpu_to_be32(pci_hose[0].last_busno);
46			do_fixup_by_path(blob, path, "bus-range",
47				&tmp, sizeof(tmp), 1);
48
49			tmp[0] = cpu_to_be32(gd->pci_clk);
50			do_fixup_by_path(blob, path, "clock-frequency",
51				&tmp, sizeof(tmp[0]), 1);
52		}
53
54		if (pci_num_buses < 2)
55			return;
56
57		path = fdt_getprop(blob, nodeoffset, "pci1", NULL);
58		if (path) {
59			tmp[0] = cpu_to_be32(pci_hose[1].first_busno);
60			tmp[1] = cpu_to_be32(pci_hose[1].last_busno);
61			do_fixup_by_path(blob, path, "bus-range",
62				&tmp, sizeof(tmp), 1);
63
64			tmp[0] = cpu_to_be32(gd->pci_clk);
65			do_fixup_by_path(blob, path, "clock-frequency",
66				&tmp, sizeof(tmp[0]), 1);
67		}
68	}
69}
70#endif /* CONFIG_OF_LIBFDT */
71