1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2007 Freescale Semiconductor, Inc.
4 *
5 * (C) Copyright 2000
6 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 */
8
9#include <common.h>
10#include <clock_legacy.h>
11#include <asm/global_data.h>
12#include <linux/libfdt.h>
13#include <fdt_support.h>
14#include <asm/processor.h>
15
16extern void ft_qe_setup(void *blob);
17
18DECLARE_GLOBAL_DATA_PTR;
19
20#if defined(CONFIG_BOOTCOUNT_LIMIT) && \
21	(defined(CONFIG_QE) && !defined(CONFIG_ARCH_MPC831X))
22#include <linux/immap_qe.h>
23
24void fdt_fixup_muram (void *blob)
25{
26	ulong data[2];
27
28	data[0] = 0;
29	data[1] = QE_MURAM_SIZE - 2 * sizeof(unsigned long);
30	do_fixup_by_compat(blob, "fsl,qe-muram-data", "reg",
31			data, sizeof (data), 0);
32}
33#endif
34
35void ft_cpu_setup(void *blob, struct bd_info *bd)
36{
37	immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
38	int spridr = immr->sysconf.spridr;
39
40	/*
41	 * delete crypto node if not on an E-processor
42	 * initial revisions of the MPC834xE/6xE have the original SEC 2.0.
43	 * EA revisions got the SEC uprevved to 2.4 but since the default device
44	 * tree contains SEC 2.0 properties we uprev them here.
45	 */
46	if (!IS_E_PROCESSOR(spridr))
47		fdt_fixup_crypto_node(blob, 0);
48	else if (IS_E_PROCESSOR(spridr) &&
49		 (SPR_FAMILY(spridr) == SPR_834X_FAMILY ||
50		  SPR_FAMILY(spridr) == SPR_836X_FAMILY) &&
51		 REVID_MAJOR(spridr) >= 2)
52		fdt_fixup_crypto_node(blob, 0x0204);
53
54#ifdef CONFIG_ARCH_MPC8313
55	/*
56	* mpc8313e erratum IPIC1 swapped TSEC interrupt ID numbers on rev. 1
57	* h/w (see AN3545).  The base device tree in use has rev. 1 ID numbers,
58	* so if on Rev. 2 (and higher) h/w, we fix them up here
59	*/
60	if (REVID_MAJOR(immr->sysconf.spridr) >= 2) {
61		int nodeoffset, path;
62		const char *prop;
63
64		nodeoffset = fdt_path_offset(blob, "/aliases");
65		if (nodeoffset >= 0) {
66			prop = fdt_getprop(blob, nodeoffset, "ethernet0", NULL);
67			if (prop) {
68				u32 tmp[] = { 32, 0x8, 33, 0x8, 34, 0x8 };
69
70				path = fdt_path_offset(blob, prop);
71				prop = fdt_getprop(blob, path, "interrupts",
72						   NULL);
73				if (prop)
74					fdt_setprop(blob, path, "interrupts",
75						    &tmp, sizeof(tmp));
76			}
77			prop = fdt_getprop(blob, nodeoffset, "ethernet1", NULL);
78			if (prop) {
79				u32 tmp[] = { 35, 0x8, 36, 0x8, 37, 0x8 };
80
81				path = fdt_path_offset(blob, prop);
82				prop = fdt_getprop(blob, path, "interrupts",
83						   NULL);
84				if (prop)
85					fdt_setprop(blob, path, "interrupts",
86						    &tmp, sizeof(tmp));
87			}
88		}
89	}
90#endif
91
92	do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
93		"timebase-frequency", (bd->bi_busfreq / 4), 1);
94	do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
95		"bus-frequency", bd->bi_busfreq, 1);
96	do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
97		"clock-frequency", gd->arch.core_clk, 1);
98	do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
99		"bus-frequency", bd->bi_busfreq, 1);
100	do_fixup_by_compat_u32(blob, "fsl,soc",
101		"bus-frequency", bd->bi_busfreq, 1);
102	do_fixup_by_compat_u32(blob, "fsl,soc",
103		"clock-frequency", bd->bi_busfreq, 1);
104	do_fixup_by_compat_u32(blob, "fsl,immr",
105		"bus-frequency", bd->bi_busfreq, 1);
106	do_fixup_by_compat_u32(blob, "fsl,immr",
107		"clock-frequency", bd->bi_busfreq, 1);
108#ifdef CONFIG_QE
109	ft_qe_setup(blob);
110#endif
111
112#ifdef CONFIG_SYS_NS16550
113        do_fixup_by_compat_u32(blob, "ns16550",
114                "clock-frequency", get_serial_clock(), 1);
115#endif
116
117	fdt_fixup_memory(blob, (u64)gd->ram_base, (u64)gd->ram_size);
118
119#if defined(CONFIG_BOOTCOUNT_LIMIT) && \
120	(defined(CONFIG_QE) && !defined(CONFIG_ARCH_MPC831X))
121	fdt_fixup_muram (blob);
122#endif
123}
124