1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Copyright (C) 2020 Marvell International Ltd. 4 */ 5 6#include <cpu_func.h> 7 8/* Octeon memory write barrier */ 9#define CVMX_SYNCW asm volatile ("syncw\nsyncw\n" : : : "memory") 10 11void flush_dcache_range(ulong start_addr, ulong stop) 12{ 13 /* Flush all pending writes */ 14 CVMX_SYNCW; 15} 16 17void flush_cache(ulong start_addr, ulong size) 18{ 19} 20 21void invalidate_dcache_range(ulong start_addr, ulong stop) 22{ 23 /* Don't need to do anything for OCTEON */ 24} 25