1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * (C) Copyright 2009 SAMSUNG Electronics
4 * Minkyu Kang <mk7.kang@samsung.com>
5 */
6
7#ifndef __ASM_ARCH_MMC_H_
8#define __ASM_ARCH_MMC_H_
9
10#define S5P_MMC_DEV_OFFSET	0x10000
11
12#define SDHCI_CONTROL2		0x80
13#define SDHCI_CONTROL3		0x84
14#define SDHCI_CONTROL4		0x8C
15
16#define SDHCI_CTRL2_ENSTAASYNCCLR	(1 << 31)
17#define SDHCI_CTRL2_ENCMDCNFMSK		(1 << 30)
18#define SDHCI_CTRL2_CDINVRXD3		(1 << 29)
19#define SDHCI_CTRL2_SLCARDOUT		(1 << 28)
20
21#define SDHCI_CTRL2_FLTCLKSEL_MASK	(0xf << 24)
22#define SDHCI_CTRL2_FLTCLKSEL_SHIFT	(24)
23#define SDHCI_CTRL2_FLTCLKSEL(_x)	((_x) << 24)
24
25#define SDHCI_CTRL2_LVLDAT_MASK		(0xff << 16)
26#define SDHCI_CTRL2_LVLDAT_SHIFT	(16)
27#define SDHCI_CTRL2_LVLDAT(_x)		((_x) << 16)
28
29#define SDHCI_CTRL2_ENFBCLKTX		(1 << 15)
30#define SDHCI_CTRL2_ENFBCLKRX		(1 << 14)
31#define SDHCI_CTRL2_SDCDSEL		(1 << 13)
32#define SDHCI_CTRL2_SDSIGPC		(1 << 12)
33#define SDHCI_CTRL2_ENBUSYCHKTXSTART	(1 << 11)
34
35#define SDHCI_CTRL2_DFCNT_MASK(_x)	((_x) << 9)
36#define SDHCI_CTRL2_DFCNT_SHIFT		(9)
37
38#define SDHCI_CTRL2_ENCLKOUTHOLD	(1 << 8)
39#define SDHCI_CTRL2_RWAITMODE		(1 << 7)
40#define SDHCI_CTRL2_DISBUFRD		(1 << 6)
41#define SDHCI_CTRL2_SELBASECLK_MASK(_x)	((_x) << 4)
42#define SDHCI_CTRL2_SELBASECLK_SHIFT	(4)
43#define SDHCI_CTRL2_PWRSYNC		(1 << 3)
44#define SDHCI_CTRL2_ENCLKOUTMSKCON	(1 << 1)
45#define SDHCI_CTRL2_HWINITFIN		(1 << 0)
46
47#define SDHCI_CTRL3_FCSEL3		(1 << 31)
48#define SDHCI_CTRL3_FCSEL2		(1 << 23)
49#define SDHCI_CTRL3_FCSEL1		(1 << 15)
50#define SDHCI_CTRL3_FCSEL0		(1 << 7)
51
52#define SDHCI_CTRL4_DRIVE_MASK(_x)	((_x) << 16)
53#define SDHCI_CTRL4_DRIVE_SHIFT		(16)
54
55#define SDHCI_MAX_HOSTS 4
56
57int s5p_sdhci_init(u32 regbase, int index, int bus_width);
58
59static inline int s5p_mmc_init(int index, int bus_width)
60{
61	unsigned int base = samsung_get_base_mmc() +
62				(S5P_MMC_DEV_OFFSET * index);
63
64	return s5p_sdhci_init(base, index, bus_width);
65}
66
67#endif
68