1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * Copyright (C) 2012 Samsung Electronics 4 * 5 * Author: InKi Dae <inki.dae@samsung.com> 6 * Author: Donghwa Lee <dh09.lee@samsung.com> 7 */ 8 9#ifndef _DSIM_H 10#define _DSIM_H 11 12#include <linux/list.h> 13#include <linux/fb.h> 14 15#define PANEL_NAME_SIZE (32) 16 17enum mipi_dsim_interface_type { 18 DSIM_COMMAND, 19 DSIM_VIDEO 20}; 21 22enum mipi_dsim_virtual_ch_no { 23 DSIM_VIRTUAL_CH_0, 24 DSIM_VIRTUAL_CH_1, 25 DSIM_VIRTUAL_CH_2, 26 DSIM_VIRTUAL_CH_3 27}; 28 29enum mipi_dsim_burst_mode_type { 30 DSIM_NON_BURST_SYNC_EVENT, 31 DSIM_BURST_SYNC_EVENT, 32 DSIM_NON_BURST_SYNC_PULSE, 33 DSIM_BURST, 34 DSIM_NON_VIDEO_MODE 35}; 36 37enum mipi_dsim_no_of_data_lane { 38 DSIM_DATA_LANE_1, 39 DSIM_DATA_LANE_2, 40 DSIM_DATA_LANE_3, 41 DSIM_DATA_LANE_4 42}; 43 44enum mipi_dsim_byte_clk_src { 45 DSIM_PLL_OUT_DIV8, 46 DSIM_EXT_CLK_DIV8, 47 DSIM_EXT_CLK_BYPASS 48}; 49 50enum mipi_dsim_pixel_format { 51 DSIM_CMD_3BPP, 52 DSIM_CMD_8BPP, 53 DSIM_CMD_12BPP, 54 DSIM_CMD_16BPP, 55 DSIM_VID_16BPP_565, 56 DSIM_VID_18BPP_666PACKED, 57 DSIM_18BPP_666LOOSELYPACKED, 58 DSIM_24BPP_888 59}; 60 61/* MIPI DSI Processor-to-Peripheral transaction types */ 62enum { 63 MIPI_DSI_V_SYNC_START = 0x01, 64 MIPI_DSI_V_SYNC_END = 0x11, 65 MIPI_DSI_H_SYNC_START = 0x21, 66 MIPI_DSI_H_SYNC_END = 0x31, 67 68 MIPI_DSI_COLOR_MODE_OFF = 0x02, 69 MIPI_DSI_COLOR_MODE_ON = 0x12, 70 MIPI_DSI_SHUTDOWN_PERIPHERAL = 0x22, 71 MIPI_DSI_TURN_ON_PERIPHERAL = 0x32, 72 73 MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM = 0x03, 74 MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM = 0x13, 75 MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM = 0x23, 76 77 MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM = 0x04, 78 MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM = 0x14, 79 MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM = 0x24, 80 81 MIPI_DSI_DCS_SHORT_WRITE = 0x05, 82 MIPI_DSI_DCS_SHORT_WRITE_PARAM = 0x15, 83 84 MIPI_DSI_DCS_READ = 0x06, 85 86 MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE = 0x37, 87 88 MIPI_DSI_END_OF_TRANSMISSION = 0x08, 89 90 MIPI_DSI_NULL_PACKET = 0x09, 91 MIPI_DSI_BLANKING_PACKET = 0x19, 92 MIPI_DSI_GENERIC_LONG_WRITE = 0x29, 93 MIPI_DSI_DCS_LONG_WRITE = 0x39, 94 95 MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20 = 0x0c, 96 MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24 = 0x1c, 97 MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16 = 0x2c, 98 99 MIPI_DSI_PACKED_PIXEL_STREAM_30 = 0x0d, 100 MIPI_DSI_PACKED_PIXEL_STREAM_36 = 0x1d, 101 MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12 = 0x3d, 102 103 MIPI_DSI_PACKED_PIXEL_STREAM_16 = 0x0e, 104 MIPI_DSI_PACKED_PIXEL_STREAM_18 = 0x1e, 105 MIPI_DSI_PIXEL_STREAM_3BYTE_18 = 0x2e, 106 MIPI_DSI_PACKED_PIXEL_STREAM_24 = 0x3e, 107}; 108 109/* 110 * struct mipi_dsim_config - interface for configuring mipi-dsi controller. 111 * 112 * @auto_flush: enable or disable Auto flush of MD FIFO using VSYNC pulse. 113 * @eot_disable: enable or disable EoT packet in HS mode. 114 * @auto_vertical_cnt: specifies auto vertical count mode. 115 * in Video mode, the vertical line transition uses line counter 116 * configured by VSA, VBP, and Vertical resolution. 117 * If this bit is set to '1', the line counter does not use VSA and VBP 118 * registers.(in command mode, this variable is ignored) 119 * @hse: set horizontal sync event mode. 120 * In VSYNC pulse and Vporch area, MIPI DSI master transfers only HSYNC 121 * start packet to MIPI DSI slave at MIPI DSI spec1.1r02. 122 * this bit transfers HSYNC end packet in VSYNC pulse and Vporch area 123 * (in mommand mode, this variable is ignored) 124 * @hfp: specifies HFP disable mode. 125 * if this variable is set, DSI master ignores HFP area in VIDEO mode. 126 * (in command mode, this variable is ignored) 127 * @hbp: specifies HBP disable mode. 128 * if this variable is set, DSI master ignores HBP area in VIDEO mode. 129 * (in command mode, this variable is ignored) 130 * @hsa: specifies HSA disable mode. 131 * if this variable is set, DSI master ignores HSA area in VIDEO mode. 132 * (in command mode, this variable is ignored) 133 * @e_interface: specifies interface to be used.(CPU or RGB interface) 134 * @e_virtual_ch: specifies virtual channel number that main or 135 * sub diaplsy uses. 136 * @e_pixel_format: specifies pixel stream format for main or sub display. 137 * @e_burst_mode: selects Burst mode in Video mode. 138 * in Non-burst mode, RGB data area is filled with RGB data and NULL 139 * packets, according to input bandwidth of RGB interface. 140 * In Burst mode, RGB data area is filled with RGB data only. 141 * @e_no_data_lane: specifies data lane count to be used by Master. 142 * @e_byte_clk: select byte clock source. (it must be DSIM_PLL_OUT_DIV8) 143 * DSIM_EXT_CLK_DIV8 and DSIM_EXT_CLK_BYPASSS are not supported. 144 * @pll_stable_time: specifies the PLL Timer for stability of the ganerated 145 * clock(System clock cycle base) 146 * if the timer value goes to 0x00000000, the clock stable bit of status 147 * and interrupt register is set. 148 * @esc_clk: specifies escape clock frequency for getting the escape clock 149 * prescaler value. 150 * @stop_holding_cnt: specifies the interval value between transmitting 151 * read packet(or write "set_tear_on" command) and BTA request. 152 * after transmitting read packet or write "set_tear_on" command, 153 * BTA requests to D-PHY automatically. this counter value specifies 154 * the interval between them. 155 * @bta_timeout: specifies the timer for BTA. 156 * this register specifies time out from BTA request to change 157 * the direction with respect to Tx escape clock. 158 * @rx_timeout: specifies the timer for LP Rx mode timeout. 159 * this register specifies time out on how long RxValid deasserts, 160 * after RxLpdt asserts with respect to Tx escape clock. 161 * - RxValid specifies Rx data valid indicator. 162 * - RxLpdt specifies an indicator that D-PHY is under RxLpdt mode. 163 * - RxValid and RxLpdt specifies signal from D-PHY. 164 */ 165struct mipi_dsim_config { 166 unsigned char auto_flush; 167 unsigned char eot_disable; 168 169 unsigned char auto_vertical_cnt; 170 unsigned char hse; 171 unsigned char hfp; 172 unsigned char hbp; 173 unsigned char hsa; 174 175 enum mipi_dsim_interface_type e_interface; 176 enum mipi_dsim_virtual_ch_no e_virtual_ch; 177 enum mipi_dsim_pixel_format e_pixel_format; 178 enum mipi_dsim_burst_mode_type e_burst_mode; 179 enum mipi_dsim_no_of_data_lane e_no_data_lane; 180 enum mipi_dsim_byte_clk_src e_byte_clk; 181 182 /* 183 * =========================================== 184 * | P | M | S | MHz | 185 * ------------------------------------------- 186 * | 3 | 100 | 3 | 100 | 187 * | 3 | 100 | 2 | 200 | 188 * | 3 | 63 | 1 | 252 | 189 * | 4 | 100 | 1 | 300 | 190 * | 4 | 110 | 1 | 330 | 191 * | 12 | 350 | 1 | 350 | 192 * | 3 | 100 | 1 | 400 | 193 * | 4 | 150 | 1 | 450 | 194 * | 6 | 118 | 1 | 472 | 195 * | 3 | 120 | 1 | 480 | 196 * | 12 | 250 | 0 | 500 | 197 * | 4 | 100 | 0 | 600 | 198 * | 3 | 81 | 0 | 648 | 199 * | 3 | 88 | 0 | 704 | 200 * | 3 | 90 | 0 | 720 | 201 * | 3 | 100 | 0 | 800 | 202 * | 12 | 425 | 0 | 850 | 203 * | 4 | 150 | 0 | 900 | 204 * | 12 | 475 | 0 | 950 | 205 * | 6 | 250 | 0 | 1000 | 206 * ------------------------------------------- 207 */ 208 209 /* 210 * pms could be calculated as the following. 211 * M * 24 / P * 2 ^ S = MHz 212 */ 213 unsigned char p; 214 unsigned short m; 215 unsigned char s; 216 217 unsigned int pll_stable_time; 218 unsigned long esc_clk; 219 220 unsigned short stop_holding_cnt; 221 unsigned char bta_timeout; 222 unsigned short rx_timeout; 223}; 224 225/* 226 * struct mipi_dsim_device - global interface for mipi-dsi driver. 227 * 228 * @dsim_config: infomation for configuring mipi-dsi controller. 229 * @master_ops: callbacks to mipi-dsi operations. 230 * @dsim_lcd_dev: pointer to activated ddi device. 231 * (it would be registered by mipi-dsi driver.) 232 * @dsim_lcd_drv: pointer to activated_ddi driver. 233 * (it would be registered by mipi-dsi driver.) 234 * @state: specifies status of MIPI-DSI controller. 235 * the status could be RESET, INIT, STOP, HSCLKEN and ULPS. 236 * @data_lane: specifiec enabled data lane number. 237 * this variable would be set by driver according to e_no_data_lane 238 * automatically. 239 * @e_clk_src: select byte clock source. 240 * @pd: pointer to MIPI-DSI driver platform data. 241 */ 242struct mipi_dsim_device { 243 struct mipi_dsim_config *dsim_config; 244 struct mipi_dsim_master_ops *master_ops; 245 struct mipi_dsim_lcd_device *dsim_lcd_dev; 246 struct mipi_dsim_lcd_driver *dsim_lcd_drv; 247 248 unsigned int state; 249 unsigned int data_lane; 250 enum mipi_dsim_byte_clk_src e_clk_src; 251 252 struct exynos_platform_mipi_dsim *pd; 253}; 254 255/* 256 * struct exynos_platform_mipi_dsim - interface to platform data 257 * for mipi-dsi driver. 258 * 259 * @lcd_panel_name: specifies lcd panel name registered to mipi-dsi driver. 260 * lcd panel driver searched would be actived. 261 * @dsim_config: pointer of structure for configuring mipi-dsi controller. 262 * @lcd_panel_info: pointer for lcd panel specific structure. 263 * this structure specifies width, height, timing and polarity and so on. 264 * @lcd_power: callback pointer for enabling or disabling lcd power. 265 * @mipi_power: callback pointer for enabling or disabling mipi power. 266 * @phy_enable: pointer to a callback controlling D-PHY enable/reset 267 */ 268struct exynos_platform_mipi_dsim { 269 char lcd_panel_name[PANEL_NAME_SIZE]; 270 271 struct mipi_dsim_config *dsim_config; 272 void *lcd_panel_info; 273 274 int (*lcd_power)(void); 275 int (*mipi_power)(void); 276 void (*phy_enable)(unsigned int dev_index, unsigned int enable); 277}; 278 279/* 280 * struct mipi_dsim_master_ops - callbacks to mipi-dsi operations. 281 * 282 * @cmd_write: transfer command to lcd panel at LP mode. 283 * @cmd_read: read command from rx register. 284 * @get_dsim_frame_done: get the status that all screen data have been 285 * transferred to mipi-dsi. 286 * @clear_dsim_frame_done: clear frame done status. 287 * @get_fb_frame_done: get frame done status of display controller. 288 * @trigger: trigger display controller. 289 * - this one would be used only in case of CPU mode. 290 */ 291struct mipi_dsim_master_ops { 292 int (*cmd_write)(struct mipi_dsim_device *dsim, unsigned int data_id, 293 const unsigned char *data0, unsigned int data1); 294 int (*cmd_read)(struct mipi_dsim_device *dsim, unsigned int data_id, 295 unsigned int data0, unsigned int data1); 296 int (*get_dsim_frame_done)(struct mipi_dsim_device *dsim); 297 int (*clear_dsim_frame_done)(struct mipi_dsim_device *dsim); 298 299 int (*get_fb_frame_done)(void); 300 void (*trigger)(struct fb_info *info); 301}; 302 303/* 304 * device structure for mipi-dsi based lcd panel. 305 * 306 * @name: name of the device to use with this device, or an 307 * alias for that name. 308 * @id: id of device to be registered. 309 * @bus_id: bus id for identifing connected bus 310 * and this bus id should be same as id of mipi_dsim_device. 311 * @master: pointer to mipi-dsi master device object. 312 * @platform_data: lcd panel specific platform data. 313 */ 314struct mipi_dsim_lcd_device { 315 char *name; 316 int id; 317 int bus_id; 318 int reverse_panel; 319 320 struct mipi_dsim_device *master; 321 struct exynos_platform_mipi_dsim *platform_data; 322}; 323 324/* 325 * driver structure for mipi-dsi based lcd panel. 326 * 327 * this structure should be registered by lcd panel driver. 328 * mipi-dsi driver seeks lcd panel registered through name field 329 * and calls these callback functions in appropriate time. 330 * 331 * @name: name of the driver to use with this device, or an 332 * alias for that name. 333 * @id: id of driver to be registered. 334 * this id would be used for finding device object registered. 335 * @mipi_panel_init: callback pointer for initializing lcd panel based on mipi 336 * dsi interface. 337 * @mipi_display_on: callback pointer for lcd panel display on. 338 */ 339struct mipi_dsim_lcd_driver { 340 char *name; 341 int id; 342 343 int (*mipi_panel_init)(struct mipi_dsim_device *dsim_dev); 344 void (*mipi_display_on)(struct mipi_dsim_device *dsim_dev); 345}; 346 347#ifdef CONFIG_EXYNOS_MIPI_DSIM 348int exynos_mipi_dsi_init(struct exynos_platform_mipi_dsim *dsim_pd); 349#else 350static inline int exynos_mipi_dsi_init( 351 struct exynos_platform_mipi_dsim *dsim_pd) 352{ 353 return 0; 354} 355#endif 356 357/* 358 * register mipi_dsim_lcd_driver object defined by lcd panel driver 359 * to mipi-dsi driver. 360 */ 361int exynos_mipi_dsi_register_lcd_driver(struct mipi_dsim_lcd_driver 362 *lcd_drv); 363 364/* 365 * register mipi_dsim_lcd_device to mipi-dsi master. 366 */ 367int exynos_mipi_dsi_register_lcd_device(struct mipi_dsim_lcd_device 368 *lcd_dev); 369 370void exynos_set_dsim_platform_data(struct exynos_platform_mipi_dsim *pd); 371struct vidinfo; 372void exynos_init_dsim_platform_data(struct vidinfo *vid); 373 374/* panel driver init based on mipi dsi interface */ 375void s6e8ax0_init(void); 376 377extern int mipi_power(void); 378#endif /* _DSIM_H */ 379