1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * Copyright (C) 2012 Samsung Electronics 4 * 5 * Author: InKi Dae <inki.dae@samsung.com> 6 * Author: Donghwa Lee <dh09.lee@samsung.com> 7 */ 8 9#ifndef __ASM_ARM_ARCH_DSIM_H_ 10#define __ASM_ARM_ARCH_DSIM_H_ 11 12#ifndef __ASSEMBLY__ 13 14struct exynos_mipi_dsim { 15 unsigned int status; 16 unsigned int swrst; 17 unsigned int clkctrl; 18 unsigned int timeout; 19 unsigned int config; 20 unsigned int escmode; 21 unsigned int mdresol; 22 unsigned int mvporch; 23 unsigned int mhporch; 24 unsigned int msync; 25 unsigned int sdresol; 26 unsigned int intsrc; 27 unsigned int intmsk; 28 unsigned int pkthdr; 29 unsigned int payload; 30 unsigned int rxfifo; 31 unsigned int fifothld; 32 unsigned int fifoctrl; 33 unsigned int memacchr; 34 unsigned int pllctrl; 35 unsigned int plltmr; 36 unsigned int phyacchr; 37 unsigned int phyacchr1; 38}; 39 40#endif /* __ASSEMBLY__ */ 41 42/* 43 * Bit Definitions 44 */ 45/* DSIM_STATUS */ 46#define DSIM_STOP_STATE_DAT(x) (((x) & 0xf) << 0) 47#define DSIM_STOP_STATE_CLK (1 << 8) 48#define DSIM_TX_READY_HS_CLK (1 << 10) 49#define DSIM_PLL_STABLE (1 << 31) 50 51/* DSIM_SWRST */ 52#define DSIM_FUNCRST (1 << 16) 53#define DSIM_SWRST (1 << 0) 54 55/* EXYNOS_DSIM_TIMEOUT */ 56#define DSIM_LPDR_TOUT_SHIFT (0) 57#define DSIM_BTA_TOUT_SHIFT (16) 58 59/* EXYNOS_DSIM_CLKCTRL */ 60#define DSIM_LANE_ESC_CLKEN_SHIFT (19) 61#define DSIM_BYTE_CLKEN_SHIFT (24) 62#define DSIM_BYTE_CLK_SRC_SHIFT (25) 63#define DSIM_PLL_BYPASS_SHIFT (27) 64#define DSIM_ESC_CLKEN_SHIFT (28) 65#define DSIM_TX_REQUEST_HSCLK_SHIFT (31) 66#define DSIM_LANE_ESC_CLKEN(x) (((x) & 0x1f) << \ 67 DSIM_LANE_ESC_CLKEN_SHIFT) 68#define DSIM_BYTE_CLK_ENABLE (1 << DSIM_BYTE_CLKEN_SHIFT) 69#define DSIM_BYTE_CLK_DISABLE (0 << DSIM_BYTE_CLKEN_SHIFT) 70#define DSIM_PLL_BYPASS_EXTERNAL (1 << DSIM_PLL_BYPASS_SHIFT) 71#define DSIM_ESC_CLKEN_ENABLE (1 << DSIM_ESC_CLKEN_SHIFT) 72#define DSIM_ESC_CLKEN_DISABLE (0 << DSIM_ESC_CLKEN_SHIFT) 73 74/* EXYNOS_DSIM_CONFIG */ 75#define DSIM_NUM_OF_DATALANE_SHIFT (5) 76#define DSIM_SUBPIX_SHIFT (8) 77#define DSIM_MAINPIX_SHIFT (12) 78#define DSIM_SUBVC_SHIFT (16) 79#define DSIM_MAINVC_SHIFT (18) 80#define DSIM_HSA_MODE_SHIFT (20) 81#define DSIM_HBP_MODE_SHIFT (21) 82#define DSIM_HFP_MODE_SHIFT (22) 83#define DSIM_HSE_MODE_SHIFT (23) 84#define DSIM_AUTO_MODE_SHIFT (24) 85#define DSIM_VIDEO_MODE_SHIFT (25) 86#define DSIM_BURST_MODE_SHIFT (26) 87#define DSIM_EOT_PACKET_SHIFT (28) 88#define DSIM_AUTO_FLUSH_SHIFT (29) 89#define DSIM_LANE_ENx(x) (((x) & 0x1f) << 0) 90 91#define DSIM_NUM_OF_DATA_LANE(x) ((x) << DSIM_NUM_OF_DATALANE_SHIFT) 92 93/* EXYNOS_DSIM_ESCMODE */ 94#define DSIM_TX_LPDT_SHIFT (6) 95#define DSIM_CMD_LPDT_SHIFT (7) 96#define DSIM_TX_LPDT_LP (1 << DSIM_TX_LPDT_SHIFT) 97#define DSIM_CMD_LPDT_LP (1 << DSIM_CMD_LPDT_SHIFT) 98#define DSIM_STOP_STATE_CNT_SHIFT (21) 99#define DSIM_FORCE_STOP_STATE_SHIFT (20) 100 101/* EXYNOS_DSIM_MDRESOL */ 102#define DSIM_MAIN_STAND_BY (1 << 31) 103#define DSIM_MAIN_VRESOL(x) (((x) & 0x7ff) << 16) 104#define DSIM_MAIN_HRESOL(x) (((x) & 0X7ff) << 0) 105 106/* EXYNOS_DSIM_MVPORCH */ 107#define DSIM_CMD_ALLOW_SHIFT (28) 108#define DSIM_STABLE_VFP_SHIFT (16) 109#define DSIM_MAIN_VBP_SHIFT (0) 110#define DSIM_CMD_ALLOW_MASK (0xf << DSIM_CMD_ALLOW_SHIFT) 111#define DSIM_STABLE_VFP_MASK (0x7ff << DSIM_STABLE_VFP_SHIFT) 112#define DSIM_MAIN_VBP_MASK (0x7ff << DSIM_MAIN_VBP_SHIFT) 113 114/* EXYNOS_DSIM_MHPORCH */ 115#define DSIM_MAIN_HFP_SHIFT (16) 116#define DSIM_MAIN_HBP_SHIFT (0) 117#define DSIM_MAIN_HFP_MASK ((0xffff) << DSIM_MAIN_HFP_SHIFT) 118#define DSIM_MAIN_HBP_MASK ((0xffff) << DSIM_MAIN_HBP_SHIFT) 119 120/* EXYNOS_DSIM_MSYNC */ 121#define DSIM_MAIN_VSA_SHIFT (22) 122#define DSIM_MAIN_HSA_SHIFT (0) 123#define DSIM_MAIN_VSA_MASK ((0x3ff) << DSIM_MAIN_VSA_SHIFT) 124#define DSIM_MAIN_HSA_MASK ((0xffff) << DSIM_MAIN_HSA_SHIFT) 125 126/* EXYNOS_DSIM_SDRESOL */ 127#define DSIM_SUB_STANDY_SHIFT (31) 128#define DSIM_SUB_VRESOL_SHIFT (16) 129#define DSIM_SUB_HRESOL_SHIFT (0) 130#define DSIM_SUB_STANDY_MASK ((0x1) << DSIM_SUB_STANDY_SHIFT) 131#define DSIM_SUB_VRESOL_MASK ((0x7ff) << DSIM_SUB_VRESOL_SHIFT) 132#define DSIM_SUB_HRESOL_MASK ((0x7ff) << DSIM_SUB_HRESOL_SHIFT) 133 134/* EXYNOS_DSIM_INTSRC */ 135#define INTSRC_FRAME_DONE (1 << 24) 136#define INTSRC_PLL_STABLE (1 << 31) 137#define INTSRC_SWRST_RELEASE (1 << 30) 138 139/* EXYNOS_DSIM_INTMSK */ 140#define INTMSK_FRAME_DONE (1 << 24) 141 142/* EXYNOS_DSIM_FIFOCTRL */ 143#define SFR_HEADER_EMPTY (1 << 22) 144 145/* EXYNOS_DSIM_PKTHDR */ 146#define DSIM_PKTHDR_DI(x) (((x) & 0x3f) << 0) 147#define DSIM_PKTHDR_DAT0(x) ((x) << 8) 148#define DSIM_PKTHDR_DAT1(x) ((x) << 16) 149 150/* EXYNOS_DSIM_PHYACCHR */ 151#define DSIM_AFC_CTL(x) (((x) & 0x7) << 5) 152#define DSIM_AFC_CTL_SHIFT (5) 153#define DSIM_AFC_EN (1 << 14) 154 155/* EXYNOS_DSIM_PHYACCHR1 */ 156#define DSIM_DPDN_SWAP_DATA_SHIFT (0) 157 158/* EXYNOS_DSIM_PLLCTRL */ 159#define DSIM_SCALER_SHIFT (1) 160#define DSIM_MAIN_SHIFT (4) 161#define DSIM_PREDIV_SHIFT (13) 162#define DSIM_PRECTRL_SHIFT (20) 163#define DSIM_PLL_EN_SHIFT (23) 164#define DSIM_FREQ_BAND_SHIFT (24) 165#define DSIM_ZEROCTRL_SHIFT (28) 166 167#endif 168