1/*
2 * NAND Flash Driver
3 *
4 * Copyright (C) 2006-2014 Texas Instruments.
5 *
6 * Based on Linux DaVinci NAND driver by TI.
7 */
8
9#ifndef _DAVINCI_NAND_H_
10#define _DAVINCI_NAND_H_
11
12#include <asm/arch/hardware.h>
13
14#define NAND_READ_START		0x00
15#define NAND_READ_END		0x30
16#define NAND_STATUS		0x70
17
18#define MASK_CLE		0x10
19#define MASK_ALE		0x08
20
21#ifdef CFG_SYS_NAND_MASK_CLE
22#undef MASK_CLE
23#define MASK_CLE CFG_SYS_NAND_MASK_CLE
24#endif
25#ifdef CFG_SYS_NAND_MASK_ALE
26#undef MASK_ALE
27#define MASK_ALE CFG_SYS_NAND_MASK_ALE
28#endif
29
30struct davinci_emif_regs {
31	uint32_t	ercsr;
32	uint32_t	awccr;
33	uint32_t	sdbcr;
34	uint32_t	sdrcr;
35	union {
36		uint32_t abncr[4];
37		struct {
38			uint32_t ab1cr;
39			uint32_t ab2cr;
40			uint32_t ab3cr;
41			uint32_t ab4cr;
42		};
43	};
44	uint32_t	sdtimr;
45	uint32_t	ddrsr;
46	uint32_t	ddrphycr;
47	uint32_t	ddrphysr;
48	uint32_t	totar;
49	uint32_t	totactr;
50	uint32_t	ddrphyid_rev;
51	uint32_t	sdsretr;
52	uint32_t	eirr;
53	uint32_t	eimr;
54	uint32_t	eimsr;
55	uint32_t	eimcr;
56	uint32_t	ioctrlr;
57	uint32_t	iostatr;
58	uint32_t	rsvd0;
59	uint32_t	one_nand_cr;
60	uint32_t	nandfcr;
61	uint32_t	nandfsr;
62	uint32_t	rsvd1[2];
63	uint32_t	nandfecc[4];
64	uint32_t	rsvd2[15];
65	uint32_t	nand4biteccload;
66	uint32_t	nand4bitecc[4];
67	uint32_t	nanderradd1;
68	uint32_t	nanderradd2;
69	uint32_t	nanderrval1;
70	uint32_t	nanderrval2;
71};
72
73#define davinci_emif_regs \
74	((struct davinci_emif_regs *)DAVINCI_ASYNC_EMIF_CNTRL_BASE)
75
76#define DAVINCI_NANDFCR_NAND_ENABLE(n)			(1 << ((n) - 2))
77#define DAVINCI_NANDFCR_4BIT_ECC_SEL_MASK		(3 << 4)
78#define DAVINCI_NANDFCR_4BIT_ECC_SEL(n)			(((n) - 2) << 4)
79#define DAVINCI_NANDFCR_1BIT_ECC_START(n)		(1 << (8 + ((n) - 2)))
80#define DAVINCI_NANDFCR_4BIT_ECC_START			(1 << 12)
81#define DAVINCI_NANDFCR_4BIT_CALC_START			(1 << 13)
82#define DAVINCI_NANDFCR_CS2NAND				(1 << 0)
83
84/* Chip Select setup */
85#define DAVINCI_ABCR_STROBE_SELECT			(1 << 31)
86#define DAVINCI_ABCR_EXT_WAIT				(1 << 30)
87#define DAVINCI_ABCR_WSETUP(n)				(n << 26)
88#define DAVINCI_ABCR_WSTROBE(n)				(n << 20)
89#define DAVINCI_ABCR_WHOLD(n)				(n << 17)
90#define DAVINCI_ABCR_RSETUP(n)				(n << 13)
91#define DAVINCI_ABCR_RSTROBE(n)				(n << 7)
92#define DAVINCI_ABCR_RHOLD(n)				(n << 4)
93#define DAVINCI_ABCR_TA(n)				(n << 2)
94#define DAVINCI_ABCR_ASIZE_16BIT			1
95#define DAVINCI_ABCR_ASIZE_8BIT				0
96
97#endif
98