1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 *  hardcoded UART base addresses for early SPL use
4 *
5 *  Copyright (c) 2022  Arm Ltd.
6 */
7
8#ifndef SUNXI_SERIAL_MEMMAP_H
9#define SUNXI_SERIAL_MEMMAP_H
10
11#if defined(CONFIG_MACH_SUN9I)
12#define SUNXI_UART0_BASE		0x07000000
13#define SUNXI_R_UART_BASE		0x08002800
14#elif defined(CONFIG_SUN50I_GEN_H6)
15#define SUNXI_UART0_BASE		0x05000000
16#define SUNXI_R_UART_BASE		0x07080000
17#elif defined(CONFIG_MACH_SUNIV)
18#define SUNXI_UART0_BASE		0x01c25000
19#define SUNXI_R_UART_BASE		0
20#elif defined(CONFIG_SUNXI_GEN_NCAT2)
21#define SUNXI_UART0_BASE		0x02500000
22#define SUNXI_R_UART_BASE		0		// 0x07080000 (?>
23#else
24#define SUNXI_UART0_BASE		0x01c28000
25#define SUNXI_R_UART_BASE		0x01f02800
26#endif
27
28#define SUNXI_UART1_BASE		(SUNXI_UART0_BASE + 0x400)
29#define SUNXI_UART2_BASE		(SUNXI_UART0_BASE + 0x800)
30#define SUNXI_UART3_BASE		(SUNXI_UART0_BASE + 0xc00)
31
32#endif /* SUNXI_SERIAL_MEMMAP_H */
33