1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * (C) Copyright 2009 4 * Stefano Babic, DENX Software Engineering, sbabic@denx.de. 5 */ 6 7#ifndef __ASM_ARCH_CLOCK_H 8#define __ASM_ARCH_CLOCK_H 9 10#ifdef CONFIG_SYS_MX5_HCLK 11#define MXC_HCLK CONFIG_SYS_MX5_HCLK 12#else 13#define MXC_HCLK 24000000 14#endif 15 16#ifdef CONFIG_SYS_MX5_CLK32 17#define MXC_CLK32 CONFIG_SYS_MX5_CLK32 18#else 19#define MXC_CLK32 32768 20#endif 21 22enum mxc_clock { 23 MXC_ARM_CLK = 0, 24 MXC_AHB_CLK, 25 MXC_IPG_CLK, 26 MXC_IPG_PERCLK, 27 MXC_UART_CLK, 28 MXC_CSPI_CLK, 29 MXC_ESDHC_CLK, 30 MXC_ESDHC2_CLK, 31 MXC_ESDHC3_CLK, 32 MXC_ESDHC4_CLK, 33 MXC_FEC_CLK, 34 MXC_SATA_CLK, 35 MXC_DDR_CLK, 36 MXC_NFC_CLK, 37 MXC_PERIPH_CLK, 38 MXC_I2C_CLK, 39 MXC_LDB_CLK, 40}; 41 42u32 imx_get_uartclk(void); 43u32 imx_get_fecclk(void); 44unsigned int mxc_get_clock(enum mxc_clock clk); 45int mxc_set_clock(u32 ref, u32 freq, enum mxc_clock clk); 46void set_usb_phy_clk(void); 47void enable_usb_phy1_clk(bool enable); 48void enable_usb_phy2_clk(bool enable); 49void set_usboh3_clk(void); 50void enable_usboh3_clk(bool enable); 51void mxc_set_sata_internal_clock(void); 52int enable_i2c_clk(unsigned char enable, unsigned i2c_num); 53void enable_nfc_clk(unsigned char enable); 54void enable_efuse_prog_supply(bool enable); 55 56#endif /* __ASM_ARCH_CLOCK_H */ 57