1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright (C) 2011 by Vladimir Zapolskiy <vz@mleia.com>
4 */
5
6#ifndef _LPC32XX_WDT_H
7#define _LPC32XX_WDT_H
8
9#include <asm/types.h>
10
11/* Watchdog Timer Registers */
12struct wdt_regs {
13	u32 isr;		/* Interrupt Status Register		*/
14	u32 ctrl;		/* Control Register			*/
15	u32 counter;		/* Counter Value Register		*/
16	u32 mctrl;		/* Match Control Register		*/
17	u32 match0;		/* Match 0 Register			*/
18	u32 emr;		/* External Match Control Register	*/
19	u32 pulse;		/* Reset Pulse Length Register		*/
20	u32 res;		/* Reset Source Register		*/
21};
22
23/* Watchdog Timer Control Register bits */
24#define WDTIM_CTRL_PAUSE_EN		(1 << 2)
25#define WDTIM_CTRL_RESET_COUNT		(1 << 1)
26#define WDTIM_CTRL_COUNT_ENAB		(1 << 0)
27
28/* Watchdog Timer Match Control Register bits */
29#define WDTIM_MCTRL_RESFRC2		(1 << 6)
30#define WDTIM_MCTRL_RESFRC1		(1 << 5)
31#define WDTIM_MCTRL_M_RES2		(1 << 4)
32#define WDTIM_MCTRL_M_RES1		(1 << 3)
33#define WDTIM_MCTRL_STOP_COUNT0		(1 << 2)
34#define WDTIM_MCTRL_RESET_COUNT0	(1 << 1)
35#define WDTIM_MCTRL_MR0_INT		(1 << 0)
36
37#endif /* _LPC32XX_WDT_H */
38