1/*
2 * mux_am33xx.h
3 *
4 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11 * kind, whether express or implied; without even the implied warranty
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#ifndef _MUX_AM33XX_H_
17#define _MUX_AM33XX_H_
18
19#include <asm/io.h>
20
21#define MUX_CFG(value, offset)	\
22	__raw_writel(value, (CTRL_BASE + offset));
23
24/* PAD Control Fields */
25#define SLEWCTRL	(0x1 << 6)
26#define RXACTIVE	(0x1 << 5)
27#define PULLDOWN_EN	(0x0 << 4) /* Pull Down Selection */
28#define PULLUP_EN	(0x1 << 4) /* Pull Up Selection */
29#define PULLUDEN	(0x0 << 3) /* Pull up enabled */
30#define PULLUDDIS	(0x1 << 3) /* Pull up disabled */
31#define MODE(val)	val	/* used for Readability */
32
33/*
34 * PAD CONTROL OFFSETS
35 * Field names corresponds to the pad signal name
36 */
37struct pad_signals {
38	int gpmc_ad0;
39	int gpmc_ad1;
40	int gpmc_ad2;
41	int gpmc_ad3;
42	int gpmc_ad4;
43	int gpmc_ad5;
44	int gpmc_ad6;
45	int gpmc_ad7;
46	int gpmc_ad8;
47	int gpmc_ad9;
48	int gpmc_ad10;
49	int gpmc_ad11;
50	int gpmc_ad12;
51	int gpmc_ad13;
52	int gpmc_ad14;
53	int gpmc_ad15;
54	int gpmc_a0;
55	int gpmc_a1;
56	int gpmc_a2;
57	int gpmc_a3;
58	int gpmc_a4;
59	int gpmc_a5;
60	int gpmc_a6;
61	int gpmc_a7;
62	int gpmc_a8;
63	int gpmc_a9;
64	int gpmc_a10;
65	int gpmc_a11;
66	int gpmc_wait0;
67	int gpmc_wpn;
68	int gpmc_be1n;
69	int gpmc_csn0;
70	int gpmc_csn1;
71	int gpmc_csn2;
72	int gpmc_csn3;
73	int gpmc_clk;
74	int gpmc_advn_ale;
75	int gpmc_oen_ren;
76	int gpmc_wen;
77	int gpmc_be0n_cle;
78	int lcd_data0;
79	int lcd_data1;
80	int lcd_data2;
81	int lcd_data3;
82	int lcd_data4;
83	int lcd_data5;
84	int lcd_data6;
85	int lcd_data7;
86	int lcd_data8;
87	int lcd_data9;
88	int lcd_data10;
89	int lcd_data11;
90	int lcd_data12;
91	int lcd_data13;
92	int lcd_data14;
93	int lcd_data15;
94	int lcd_vsync;
95	int lcd_hsync;
96	int lcd_pclk;
97	int lcd_ac_bias_en;
98	int mmc0_dat3;
99	int mmc0_dat2;
100	int mmc0_dat1;
101	int mmc0_dat0;
102	int mmc0_clk;
103	int mmc0_cmd;
104	int mii1_col;
105	int mii1_crs;
106	int mii1_rxerr;
107	int mii1_txen;
108	int mii1_rxdv;
109	int mii1_txd3;
110	int mii1_txd2;
111	int mii1_txd1;
112	int mii1_txd0;
113	int mii1_txclk;
114	int mii1_rxclk;
115	int mii1_rxd3;
116	int mii1_rxd2;
117	int mii1_rxd1;
118	int mii1_rxd0;
119	int rmii1_refclk;
120	int mdio_data;
121	int mdio_clk;
122	int spi0_sclk;
123	int spi0_d0;
124	int spi0_d1;
125	int spi0_cs0;
126	int spi0_cs1;
127	int ecap0_in_pwm0_out;
128	int uart0_ctsn;
129	int uart0_rtsn;
130	int uart0_rxd;
131	int uart0_txd;
132	int uart1_ctsn;
133	int uart1_rtsn;
134	int uart1_rxd;
135	int uart1_txd;
136	int i2c0_sda;
137	int i2c0_scl;
138	int mcasp0_aclkx;
139	int mcasp0_fsx;
140	int mcasp0_axr0;
141	int mcasp0_ahclkr;
142	int mcasp0_aclkr;
143	int mcasp0_fsr;
144	int mcasp0_axr1;
145	int mcasp0_ahclkx;
146	int xdma_event_intr0;
147	int xdma_event_intr1;
148	int nresetin_out;
149	int porz;
150	int nnmi;
151	int osc0_in;
152	int osc0_out;
153	int rsvd1;
154	int tms;
155	int tdi;
156	int tdo;
157	int tck;
158	int ntrst;
159	int emu0;
160	int emu1;
161	int osc1_in;
162	int osc1_out;
163	int pmic_power_en;
164	int rtc_porz;
165	int rsvd2;
166	int ext_wakeup;
167	int enz_kaldo_1p8v;
168	int usb0_dm;
169	int usb0_dp;
170	int usb0_ce;
171	int usb0_id;
172	int usb0_vbus;
173	int usb0_drvvbus;
174	int usb1_dm;
175	int usb1_dp;
176	int usb1_ce;
177	int usb1_id;
178	int usb1_vbus;
179	int usb1_drvvbus;
180	int ddr_resetn;
181	int ddr_csn0;
182	int ddr_cke;
183	int ddr_ck;
184	int ddr_nck;
185	int ddr_casn;
186	int ddr_rasn;
187	int ddr_wen;
188	int ddr_ba0;
189	int ddr_ba1;
190	int ddr_ba2;
191	int ddr_a0;
192	int ddr_a1;
193	int ddr_a2;
194	int ddr_a3;
195	int ddr_a4;
196	int ddr_a5;
197	int ddr_a6;
198	int ddr_a7;
199	int ddr_a8;
200	int ddr_a9;
201	int ddr_a10;
202	int ddr_a11;
203	int ddr_a12;
204	int ddr_a13;
205	int ddr_a14;
206	int ddr_a15;
207	int ddr_odt;
208	int ddr_d0;
209	int ddr_d1;
210	int ddr_d2;
211	int ddr_d3;
212	int ddr_d4;
213	int ddr_d5;
214	int ddr_d6;
215	int ddr_d7;
216	int ddr_d8;
217	int ddr_d9;
218	int ddr_d10;
219	int ddr_d11;
220	int ddr_d12;
221	int ddr_d13;
222	int ddr_d14;
223	int ddr_d15;
224	int ddr_dqm0;
225	int ddr_dqm1;
226	int ddr_dqs0;
227	int ddr_dqsn0;
228	int ddr_dqs1;
229	int ddr_dqsn1;
230	int ddr_vref;
231	int ddr_vtp;
232	int ddr_strben0;
233	int ddr_strben1;
234	int ain7;
235	int ain6;
236	int ain5;
237	int ain4;
238	int ain3;
239	int ain2;
240	int ain1;
241	int ain0;
242	int vrefp;
243	int vrefn;
244};
245
246#endif /* endif _MUX_AM33XX_H_ */
247