1/* 2* Copyright 2019, Data61 3* Commonwealth Scientific and Industrial Research Organisation (CSIRO) 4* ABN 41 687 119 230. 5* 6* This software may be distributed and modified according to the terms of 7* the BSD 2-Clause license. Note that NO WARRANTY is provided. 8* See "LICENSE_BSD2.txt" for details. 9* 10* @TAG(DATA61_BSD) 11*/ 12 13#pragma once 14 15#define MCR(cpreg, v) \ 16 do { \ 17 uint32_t _v = v; \ 18 asm volatile("mcr " cpreg :: "r" (_v)); \ 19 } while(0) 20#define MCRR(cpreg,v) \ 21 do { \ 22 uint64_t _v = v; \ 23 asm volatile("mcrr " cpreg :: "r" (_v)); \ 24 } while (0) 25#define MRRC(cpreg, v) asm volatile("mrrc " cpreg : "=r"(v)) 26#define MRC(cpreg, v) asm volatile("mrc " cpreg : "=r"(v)) 27 28#define COPROC_WRITE_WORD(R,W) MCR(R,W) 29#define COPROC_READ_WORD(R,W) MRC(R,W) 30#define COPROC_WRITE_64(R,W) MCRR(R,W) 31#define COPROC_READ_64(R,W) MRRC(R,W) 32 33/* control reigster for the el1 physical timer */ 34#define CNTP_CTL " p15, 0, %0, c14, c2, 1" 35/* holds the compare value for the el1 physical timer */ 36#define CNTP_CVAL " p15, 2, %Q0, %R0, c14 " 37/* holds the 64-bit physical count value */ 38#define CNTPCT " p15, 0, %Q0, %R0, c14" /* 64-bit RO Physical Count register */ 39/* frequency of the timer */ 40#define CNTFRQ " p15, 0, %0, c14, c0, 0" /* 32-bit RW Counter Frequency register */ 41