1/* 2 * @TAG(OTHER_GPL) 3 */ 4/* 5 * Generic PHY Management code 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 * 9 * Copyright 2011 Freescale Semiconductor, Inc. 10 * author Andy Fleming 11 * 12 * Based loosely off of Linux's PHY Lib 13 */ 14 15#include <stdlib.h> 16#include "common.h" 17#include "net.h" 18#include "miiphy.h" 19#include "phy.h" 20#include "err.h" 21#include <errno.h> 22#include "../unimplemented.h" 23#include "string.h" 24#include <platsupport/io.h> 25 26/* Generic PHY support and helper functions */ 27 28/** 29 * genphy_config_advert - sanitize and advertise auto-negotation parameters 30 * @phydev: target phy_device struct 31 * 32 * Description: Writes MII_ADVERTISE with the appropriate values, 33 * after sanitizing the values to make sure we only advertise 34 * what is supported. Returns < 0 on error, 0 if the PHY's advertisement 35 * hasn't changed, and > 0 if it has changed. 36 */ 37static int genphy_config_advert(struct phy_device *phydev) 38{ 39 u32 advertise; 40 int oldadv, adv, bmsr; 41 int err, changed = 0; 42 43 /* Only allow advertising what this PHY supports */ 44 phydev->advertising &= phydev->supported; 45 advertise = phydev->advertising; 46 47 /* Setup standard advertisement */ 48 adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE); 49 oldadv = adv; 50 if (adv < 0) { 51 return adv; 52 } 53 adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP | 54 ADVERTISE_PAUSE_ASYM); 55 if (advertise & ADVERTISED_10baseT_Half) { 56 adv |= ADVERTISE_10HALF; 57 } 58 if (advertise & ADVERTISED_10baseT_Full) { 59 adv |= ADVERTISE_10FULL; 60 } 61 if (advertise & ADVERTISED_100baseT_Half) { 62 adv |= ADVERTISE_100HALF; 63 } 64 if (advertise & ADVERTISED_100baseT_Full) { 65 adv |= ADVERTISE_100FULL; 66 } 67 if (advertise & ADVERTISED_Pause) { 68 adv |= ADVERTISE_PAUSE_CAP; 69 } 70 if (advertise & ADVERTISED_Asym_Pause) { 71 adv |= ADVERTISE_PAUSE_ASYM; 72 } 73 if (advertise & ADVERTISED_1000baseX_Half) { 74 adv |= ADVERTISE_1000XHALF; 75 } 76 if (advertise & ADVERTISED_1000baseX_Full) { 77 adv |= ADVERTISE_1000XFULL; 78 } 79 80 if (adv != oldadv) { 81 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv); 82 83 if (err < 0) { 84 return err; 85 } 86 changed = 1; 87 } 88 89 bmsr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); 90 if (bmsr < 0) { 91 return bmsr; 92 } 93 94 /* Per 802.3-2008, Section 22.2.4.2.16 Extended status all 95 * 1000Mbits/sec capable PHYs shall have the BMSR_ESTATEN bit set to a 96 * logical 1. 97 */ 98 if (!(bmsr & BMSR_ESTATEN)) { 99 return changed; 100 } 101 102 /* Configure gigabit if it's supported */ 103 adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000); 104 oldadv = adv; 105 106 if (adv < 0) { 107 return adv; 108 } 109 110 adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF); 111 112 if (phydev->supported & (SUPPORTED_1000baseT_Half | 113 SUPPORTED_1000baseT_Full)) { 114 if (advertise & SUPPORTED_1000baseT_Half) { 115 adv |= ADVERTISE_1000HALF; 116 } 117 if (advertise & SUPPORTED_1000baseT_Full) { 118 adv |= ADVERTISE_1000FULL; 119 } 120 } 121 122 if (adv != oldadv) { 123 changed = 1; 124 } 125 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, adv); 126 if (err < 0) { 127 return err; 128 } 129 130 return changed; 131} 132 133 134/** 135 * genphy_setup_forced - configures/forces speed/duplex from @phydev 136 * @phydev: target phy_device struct 137 * 138 * Description: Configures MII_BMCR to force speed/duplex 139 * to the values in phydev. Assumes that the values are valid. 140 */ 141static int genphy_setup_forced(struct phy_device *phydev) 142{ 143 int err; 144 int ctl = BMCR_ANRESTART; 145 146 phydev->pause = phydev->asym_pause = 0; 147 148 if (SPEED_1000 == phydev->speed) { 149 ctl |= BMCR_SPEED1000; 150 } else if (SPEED_100 == phydev->speed) { 151 ctl |= BMCR_SPEED100; 152 } 153 154 if (DUPLEX_FULL == phydev->duplex) { 155 ctl |= BMCR_FULLDPLX; 156 } 157 158 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl); 159 160 return err; 161} 162 163 164/** 165 * genphy_restart_aneg - Enable and Restart Autonegotiation 166 * @phydev: target phy_device struct 167 */ 168int genphy_restart_aneg(struct phy_device *phydev) 169{ 170 int ctl; 171 172 ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); 173 174 if (ctl < 0) { 175 return ctl; 176 } 177 178 ctl |= (BMCR_ANENABLE | BMCR_ANRESTART); 179 180 /* Don't isolate the PHY if we're negotiating */ 181 ctl &= ~(BMCR_ISOLATE); 182 183 ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl); 184 185 return ctl; 186} 187 188 189/** 190 * genphy_config_aneg - restart auto-negotiation or write BMCR 191 * @phydev: target phy_device struct 192 * 193 * Description: If auto-negotiation is enabled, we configure the 194 * advertising, and then restart auto-negotiation. If it is not 195 * enabled, then we write the BMCR. 196 */ 197int genphy_config_aneg(struct phy_device *phydev) 198{ 199 int result; 200 201 if (AUTONEG_ENABLE != phydev->autoneg) { 202 return genphy_setup_forced(phydev); 203 } 204 205 result = genphy_config_advert(phydev); 206 207 if (result < 0) { /* error */ 208 return result; 209 } 210 211 if (result == 0) { 212 /* Advertisment hasn't changed, but maybe aneg was never on to 213 * begin with? Or maybe phy was isolated? */ 214 int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); 215 216 if (ctl < 0) { 217 return ctl; 218 } 219 220 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE)) { 221 result = 1; /* do restart aneg */ 222 } 223 } 224 225 /* Only restart aneg if we are advertising something different 226 * than we were before. */ 227 if (result > 0) { 228 result = genphy_restart_aneg(phydev); 229 } 230 231 return result; 232} 233 234/** 235 * genphy_update_link - update link status in @phydev 236 * @phydev: target phy_device struct 237 * 238 * Description: Update the value in phydev->link to reflect the 239 * current link value. In order to do this, we need to read 240 * the status register twice, keeping the second value. 241 */ 242int genphy_update_link(struct phy_device *phydev) 243{ 244 unsigned int mii_reg; 245 246 /* 247 * Wait if the link is up, and autonegotiation is in progress 248 * (ie - we're capable and it's not done) 249 */ 250 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); 251 252 /* 253 * If we already saw the link up, and it hasn't gone down, then 254 * we don't need to wait for autoneg again 255 */ 256 if (phydev->link && mii_reg & BMSR_LSTATUS) { 257 return 0; 258 } 259 260 if ((phydev->autoneg == AUTONEG_ENABLE) && 261 !(mii_reg & BMSR_ANEGCOMPLETE)) { 262 int i = 0; 263 264 printf("%s Waiting for PHY auto negotiation to complete", phydev->dev->name); 265 fflush(stdout); 266 while (!(mii_reg & BMSR_ANEGCOMPLETE)) { 267 /* 268 * Timeout reached ? 269 */ 270 if (i > PHY_ANEG_TIMEOUT) { 271 printf(" TIMEOUT !\n"); 272 phydev->link = 0; 273 return -ETIMEDOUT; 274 } 275 276 if ((i++ % 500) == 0) { 277 printf("."); 278 } 279 280 udelay(5000); /* 1 ms */ 281 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); 282 } 283 printf(" done\n"); 284 phydev->link = 1; 285 } else { 286 /* Read the link a second time to clear the latched state */ 287 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); 288 289 if (mii_reg & BMSR_LSTATUS) { 290 phydev->link = 1; 291 } else { 292 phydev->link = 0; 293 } 294 } 295 296 return 0; 297} 298 299/* 300 * Generic function which updates the speed and duplex. If 301 * autonegotiation is enabled, it uses the AND of the link 302 * partner's advertised capabilities and our advertised 303 * capabilities. If autonegotiation is disabled, we use the 304 * appropriate bits in the control register. 305 * 306 * Stolen from Linux's mii.c and phy_device.c 307 */ 308int genphy_parse_link(struct phy_device *phydev) 309{ 310 int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); 311 312 /* We're using autonegotiation */ 313 if (phydev->autoneg == AUTONEG_ENABLE) { 314 u32 lpa = 0; 315 int gblpa = 0; 316 u32 estatus = 0; 317 318 /* Check for gigabit capability */ 319 if (phydev->supported & (SUPPORTED_1000baseT_Full | 320 SUPPORTED_1000baseT_Half)) { 321 /* We want a list of states supported by 322 * both PHYs in the link 323 */ 324 gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000); 325 if (gblpa < 0) { 326 debug("Could not read MII_STAT1000. Ignoring gigabit capability\n"); 327 gblpa = 0; 328 } 329 gblpa &= phy_read(phydev, 330 MDIO_DEVAD_NONE, MII_CTRL1000) << 2; 331 } 332 333 /* Set the baseline so we only have to set them 334 * if they're different 335 */ 336 phydev->speed = SPEED_10; 337 phydev->duplex = DUPLEX_HALF; 338 339 /* Check the gigabit fields */ 340 if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) { 341 phydev->speed = SPEED_1000; 342 343 if (gblpa & PHY_1000BTSR_1000FD) { 344 phydev->duplex = DUPLEX_FULL; 345 } 346 347 /* We're done! */ 348 return 0; 349 } 350 351 lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE); 352 lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA); 353 354 if (lpa & (LPA_100FULL | LPA_100HALF)) { 355 phydev->speed = SPEED_100; 356 357 if (lpa & LPA_100FULL) { 358 phydev->duplex = DUPLEX_FULL; 359 } 360 361 } else if (lpa & LPA_10FULL) { 362 phydev->duplex = DUPLEX_FULL; 363 } 364 365 /* 366 * Extended status may indicate that the PHY supports 367 * 1000BASE-T/X even though the 1000BASE-T registers 368 * are missing. In this case we can't tell whether the 369 * peer also supports it, so we only check extended 370 * status if the 1000BASE-T registers are actually 371 * missing. 372 */ 373 if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP)) 374 estatus = phy_read(phydev, MDIO_DEVAD_NONE, 375 MII_ESTATUS); 376 377 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF | 378 ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) { 379 phydev->speed = SPEED_1000; 380 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL)) { 381 phydev->duplex = DUPLEX_FULL; 382 } 383 } 384 385 } else { 386 u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); 387 388 phydev->speed = SPEED_10; 389 phydev->duplex = DUPLEX_HALF; 390 391 if (bmcr & BMCR_FULLDPLX) { 392 phydev->duplex = DUPLEX_FULL; 393 } 394 395 if (bmcr & BMCR_SPEED1000) { 396 phydev->speed = SPEED_1000; 397 } else if (bmcr & BMCR_SPEED100) { 398 phydev->speed = SPEED_100; 399 } 400 } 401 402 return 0; 403} 404 405int genphy_config(struct phy_device *phydev) 406{ 407 int val; 408 u32 features; 409 410 features = (SUPPORTED_TP | SUPPORTED_MII 411 | SUPPORTED_AUI | SUPPORTED_FIBRE | 412 SUPPORTED_BNC); 413 414 /* Do we support autonegotiation? */ 415 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); 416 if (val < 0) { 417 return val; 418 } 419 if (val & BMSR_ANEGCAPABLE) { 420 features |= SUPPORTED_Autoneg; 421 } 422 423 if (val & BMSR_100FULL) { 424 features |= SUPPORTED_100baseT_Full; 425 } 426 if (val & BMSR_100HALF) { 427 features |= SUPPORTED_100baseT_Half; 428 } 429 if (val & BMSR_10FULL) { 430 features |= SUPPORTED_10baseT_Full; 431 } 432 if (val & BMSR_10HALF) { 433 features |= SUPPORTED_10baseT_Half; 434 } 435 436 if (val & BMSR_ESTATEN) { 437 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS); 438 if (val < 0) { 439 return val; 440 } 441 if (val & ESTATUS_1000_TFULL) { 442 features |= SUPPORTED_1000baseT_Full; 443 } 444 if (val & ESTATUS_1000_THALF) { 445 features |= SUPPORTED_1000baseT_Half; 446 } 447 if (val & ESTATUS_1000_XFULL) { 448 features |= SUPPORTED_1000baseX_Full; 449 } 450 if (val & ESTATUS_1000_XHALF) { 451 features |= SUPPORTED_1000baseX_Half; 452 } 453 } 454 phy_set_supported(phydev, SPEED_1000); 455 456 phydev->supported &= features; 457 phydev->advertising &= features; 458 genphy_config_aneg(phydev); 459 return 0; 460} 461 462int genphy_startup(struct phy_device *phydev) 463{ 464 int ret; 465 ret = genphy_update_link(phydev); 466 if (ret) { 467 return ret; 468 } 469 470 return genphy_parse_link(phydev); 471} 472 473int genphy_shutdown(struct phy_device *phydev) 474{ 475 return 0; 476} 477 478static struct phy_driver genphy_driver = { 479 .uid = 0xffffffff, 480 .mask = 0xffffffff, 481 .name = "Generic PHY", 482 .features = PHY_GBIT_FEATURES | SUPPORTED_MII | 483 SUPPORTED_AUI | SUPPORTED_FIBRE | 484 SUPPORTED_BNC, 485 .config = genphy_config, 486 .startup = genphy_startup, 487 .shutdown = genphy_shutdown, 488}; 489 490static LIST_HEAD(phy_drivers); 491 492int phy_init(void) 493{ 494#ifdef CONFIG_MV88E61XX_SWITCH 495 phy_mv88e61xx_init(); 496#endif 497#ifdef CONFIG_PHY_AQUANTIA 498 phy_aquantia_init(); 499#endif 500#ifdef CONFIG_PHY_ATHEROS 501 phy_atheros_init(); 502#endif 503#ifdef CONFIG_PHY_BROADCOM 504 phy_broadcom_init(); 505#endif 506#ifdef CONFIG_PHY_CORTINA 507 phy_cortina_init(); 508#endif 509#ifdef CONFIG_PHY_DAVICOM 510 phy_davicom_init(); 511#endif 512#ifdef CONFIG_PHY_ET1011C 513 phy_et1011c_init(); 514#endif 515#ifdef CONFIG_PHY_LXT 516 phy_lxt_init(); 517#endif 518#ifdef CONFIG_PHY_MARVELL 519 phy_marvell_init(); 520#endif 521#ifdef CONFIG_PHY_MICREL 522 phy_micrel_init(); 523#endif 524#ifdef CONFIG_PHY_NATSEMI 525 phy_natsemi_init(); 526#endif 527#ifdef CONFIG_PHY_REALTEK 528 phy_realtek_init(); 529#endif 530#ifdef CONFIG_PHY_SMSC 531 phy_smsc_init(); 532#endif 533#ifdef CONFIG_PHY_TERANETICS 534 phy_teranetics_init(); 535#endif 536#ifdef CONFIG_PHY_TI 537 phy_ti_init(); 538#endif 539#ifdef CONFIG_PHY_VITESSE 540 phy_vitesse_init(); 541#endif 542#ifdef CONFIG_PHY_XILINX 543 phy_xilinx_init(); 544#endif 545 546 return 0; 547} 548 549int phy_register(struct phy_driver *drv) 550{ 551 INIT_LIST_HEAD(&drv->list); 552 list_add_tail(&drv->list, &phy_drivers); 553 554#ifdef CONFIG_NEEDS_MANUAL_RELOC 555 if (drv->probe) { 556 drv->probe += gd->reloc_off; 557 } 558 if (drv->config) { 559 drv->config += gd->reloc_off; 560 } 561 if (drv->startup) { 562 drv->startup += gd->reloc_off; 563 } 564 if (drv->shutdown) { 565 drv->shutdown += gd->reloc_off; 566 } 567 if (drv->readext) { 568 drv->readext += gd->reloc_off; 569 } 570 if (drv->writeext) { 571 drv->writeext += gd->reloc_off; 572 } 573#endif 574 return 0; 575} 576 577int phy_set_supported(struct phy_device *phydev, u32 max_speed) 578{ 579 /* The default values for phydev->supported are provided by the PHY 580 * driver "features" member, we want to reset to sane defaults first 581 * before supporting higher speeds. 582 */ 583 phydev->supported &= PHY_DEFAULT_FEATURES; 584 585 switch (max_speed) { 586 default: 587 printf("NOT SUPPORTED HELP>>>>>>>>>>>>>>\n"); 588 589 return -ENOTSUPP; 590 case SPEED_1000: 591 phydev->supported |= PHY_1000BT_FEATURES; 592 /* fall through */ 593 case SPEED_100: 594 phydev->supported |= PHY_100BT_FEATURES; 595 /* fall through */ 596 case SPEED_10: 597 phydev->supported |= PHY_10BT_FEATURES; 598 } 599 600 return 0; 601} 602 603static int phy_probe(struct phy_device *phydev) 604{ 605 int err = 0; 606 607 phydev->advertising = phydev->supported = phydev->drv->features; 608 phydev->mmds = phydev->drv->mmds; 609 610 if (phydev->drv->probe) { 611 err = phydev->drv->probe(phydev); 612 } 613 614 return err; 615} 616 617static struct phy_driver *generic_for_interface(phy_interface_t interface) 618{ 619#ifdef CONFIG_PHYLIB_10G 620 if (is_10g_interface(interface)) { 621 return &gen10g_driver; 622 } 623#endif 624 625 return &genphy_driver; 626} 627 628static struct phy_driver *get_phy_driver(struct phy_device *phydev, 629 phy_interface_t interface) 630{ 631 struct list_head *entry; 632 int phy_id = phydev->phy_id; 633 struct phy_driver *drv = NULL; 634 635 list_for_each(entry, &phy_drivers) { 636 drv = list_entry(entry, struct phy_driver, list); 637 if ((drv->uid & drv->mask) == (phy_id & drv->mask)) { 638 return drv; 639 } 640 } 641 642 /* If we made it here, there's no driver for this PHY */ 643 return generic_for_interface(interface); 644} 645 646static struct phy_device *phy_device_create(struct mii_dev *bus, int addr, 647 u32 phy_id, 648 phy_interface_t interface) 649{ 650 struct phy_device *dev; 651 652 /* We allocate the device, and initialize the 653 * default values */ 654 dev = malloc(sizeof(*dev)); 655 if (!dev) { 656 printf("Failed to allocate PHY device for %s:%d\n", 657 bus->name, addr); 658 return NULL; 659 } 660 661 memset(dev, 0, sizeof(*dev)); 662 663 dev->duplex = -1; 664 dev->link = 0; 665 dev->interface = interface; 666 dev->autoneg = AUTONEG_ENABLE; 667 668 dev->addr = addr; 669 dev->phy_id = phy_id; 670 dev->bus = bus; 671 672 dev->drv = get_phy_driver(dev, interface); 673 674 phy_probe(dev); 675 676 bus->phymap[addr] = dev; 677 678 return dev; 679} 680 681/** 682 * get_phy_id - reads the specified addr for its ID. 683 * @bus: the target MII bus 684 * @addr: PHY address on the MII bus 685 * @phy_id: where to store the ID retrieved. 686 * 687 * Description: Reads the ID registers of the PHY at @addr on the 688 * @bus, stores it in @phy_id and returns zero on success. 689 */ 690int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id) 691{ 692 int phy_reg; 693 694 /* Grab the bits from PHYIR1, and put them 695 * in the upper half */ 696 phy_reg = bus->read(bus, addr, devad, MII_PHYSID1); 697 698 if (phy_reg < 0) { 699 return -EIO; 700 } 701 702 *phy_id = (phy_reg & 0xffff) << 16; 703 704 /* Grab the bits from PHYIR2, and put them in the lower half */ 705 phy_reg = bus->read(bus, addr, devad, MII_PHYSID2); 706 707 if (phy_reg < 0) { 708 return -EIO; 709 } 710 711 *phy_id |= (phy_reg & 0xffff); 712 713 return 0; 714} 715 716static struct phy_device *create_phy_by_mask(struct mii_dev *bus, 717 unsigned phy_mask, int devad, phy_interface_t interface) 718{ 719 u32 phy_id = 0xffffffff; 720 while (phy_mask) { 721 int addr = ffs(phy_mask) - 1; 722 int r = get_phy_id(bus, addr, devad, &phy_id); 723 /* If the PHY ID is mostly f's, we didn't find anything */ 724 if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff) { 725 return phy_device_create(bus, addr, phy_id, interface); 726 } 727 phy_mask &= ~(1 << addr); 728 } 729 return NULL; 730} 731 732static struct phy_device *search_for_existing_phy(struct mii_dev *bus, 733 unsigned phy_mask, phy_interface_t interface) 734{ 735 /* If we have one, return the existing device, with new interface */ 736 while (phy_mask) { 737 int addr = ffs(phy_mask) - 1; 738 if (bus->phymap[addr]) { 739 bus->phymap[addr]->interface = interface; 740 return bus->phymap[addr]; 741 } 742 phy_mask &= ~(1 << addr); 743 } 744 return NULL; 745} 746 747static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus, 748 unsigned phy_mask, phy_interface_t interface) 749{ 750 int i; 751 struct phy_device *phydev; 752 753 phydev = search_for_existing_phy(bus, phy_mask, interface); 754 if (phydev) { 755 return phydev; 756 } 757 /* Try Standard (ie Clause 22) access */ 758 /* Otherwise we have to try Clause 45 */ 759 for (i = 0; i < 5; i++) { 760 phydev = create_phy_by_mask(bus, phy_mask, 761 i ? i : MDIO_DEVAD_NONE, interface); 762 if (IS_ERR(phydev)) { 763 return NULL; 764 } 765 if (phydev) { 766 return phydev; 767 } 768 } 769 770 debug("\n%s PHY: ", bus->name); 771 while (phy_mask) { 772 int addr = ffs(phy_mask) - 1; 773 debug("%d ", addr); 774 phy_mask &= ~(1 << addr); 775 } 776 debug("not found\n"); 777 778 return NULL; 779} 780 781/** 782 * get_phy_device - reads the specified PHY device and returns its @phy_device struct 783 * @bus: the target MII bus 784 * @addr: PHY address on the MII bus 785 * 786 * Description: Reads the ID registers of the PHY at @addr on the 787 * @bus, then allocates and returns the phy_device to represent it. 788 */ 789static struct phy_device *get_phy_device(struct mii_dev *bus, int addr, 790 phy_interface_t interface) 791{ 792 return get_phy_device_by_mask(bus, 1 << addr, interface); 793} 794 795int phy_reset(struct phy_device *phydev) 796{ 797 int reg; 798 int timeout = 500; 799 int devad = MDIO_DEVAD_NONE; 800 801 if (phydev->flags & PHY_FLAG_BROKEN_RESET) { 802 return 0; 803 } 804 805#ifdef CONFIG_PHYLIB_10G 806 /* If it's 10G, we need to issue reset through one of the MMDs */ 807 if (is_10g_interface(phydev->interface)) { 808 if (!phydev->mmds) { 809 gen10g_discover_mmds(phydev); 810 } 811 812 devad = ffs(phydev->mmds) - 1; 813 } 814#endif 815 816 if (phy_write(phydev, devad, MII_BMCR, BMCR_RESET) < 0) { 817 debug("PHY reset failed\n"); 818 return -1; 819 } 820 821#ifdef CONFIG_PHY_RESET_DELAY 822 udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */ 823#endif 824 /* 825 * Poll the control register for the reset bit to go to 0 (it is 826 * auto-clearing). This should happen within 0.5 seconds per the 827 * IEEE spec. 828 */ 829 reg = phy_read(phydev, devad, MII_BMCR); 830 while ((reg & BMCR_RESET) && timeout--) { 831 reg = phy_read(phydev, devad, MII_BMCR); 832 833 if (reg < 0) { 834 debug("PHY status read failed\n"); 835 return -1; 836 } 837 udelay(1000); 838 } 839 840 if (reg & BMCR_RESET) { 841 puts("PHY reset timed out\n"); 842 return -1; 843 } 844 845 return 0; 846} 847 848int miiphy_reset(const char *devname, unsigned char addr) 849{ 850 struct mii_dev *bus = miiphy_get_dev_by_name(devname); 851 struct phy_device *phydev; 852 853 /* 854 * miiphy_reset was only used on standard PHYs, so we'll fake it here. 855 * If later code tries to connect with the right interface, this will 856 * be corrected by get_phy_device in phy_connect() 857 */ 858 phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII); 859 860 return phy_reset(phydev); 861} 862 863struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask, 864 phy_interface_t interface) 865{ 866 /* Reset the bus */ 867 if (bus->reset) { 868 bus->reset(bus); 869 870 /* Wait 15ms to make sure the PHY has come out of hard reset */ 871 udelay(15000); 872 } 873 874 return get_phy_device_by_mask(bus, phy_mask, interface); 875} 876 877#ifdef CONFIG_DM_ETH 878void phy_connect_dev(struct phy_device *phydev, struct udevice *dev) 879#else 880void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev) 881#endif 882{ 883 /* Soft Reset the PHY */ 884 phy_reset(phydev); 885 if (phydev->dev && phydev->dev != dev) { 886 printf("%s:%d is connected to %s. Reconnecting to %s\n", 887 phydev->bus->name, phydev->addr, 888 phydev->dev->name, dev->name); 889 } 890 phydev->dev = dev; 891} 892 893#ifdef CONFIG_DM_ETH 894struct phy_device *phy_connect(struct mii_dev *bus, int addr, 895 struct udevice *dev, phy_interface_t interface) 896#else 897struct phy_device *phy_connect(struct mii_dev *bus, int addr, 898 struct eth_device *dev, phy_interface_t interface) 899#endif 900{ 901 struct phy_device *phydev; 902 903 phydev = phy_find_by_mask(bus, 0xffffffff, interface); 904 if (phydev) { 905 phy_connect_dev(phydev, dev); 906 } else { 907 printf("Could not get PHY for %s: addr %d\n", bus->name, addr); 908 } 909 return phydev; 910} 911 912/* 913 * Start the PHY. Returns 0 on success, or a negative error code. 914 */ 915int phy_startup(struct phy_device *phydev) 916{ 917 if (phydev->drv->startup) { 918 return phydev->drv->startup(phydev); 919 } 920 921 return 0; 922} 923 924__weak int board_phy_config(struct phy_device *phydev) 925{ 926 if (phydev->drv->config) { 927 return phydev->drv->config(phydev); 928 } 929 return 0; 930} 931 932int phy_config(struct phy_device *phydev) 933{ 934 /* Invoke an optional board-specific helper */ 935 return board_phy_config(phydev); 936} 937 938int phy_shutdown(struct phy_device *phydev) 939{ 940 if (phydev->drv->shutdown) { 941 phydev->drv->shutdown(phydev); 942 } 943 944 return 0; 945} 946 947int phy_get_interface_by_name(const char *str) 948{ 949 int i; 950 951 for (i = 0; i < PHY_INTERFACE_MODE_COUNT; i++) { 952 if (!strcmp(str, phy_interface_strings[i])) { 953 return i; 954 } 955 } 956 957 return -1; 958} 959