1/* 2 * Copyright 2017, Data61 3 * Commonwealth Scientific and Industrial Research Organisation (CSIRO) 4 * ABN 41 687 119 230. 5 * 6 * This software may be distributed and modified according to the terms of 7 * the BSD 2-Clause license. Note that NO WARRANTY is provided. 8 * See "LICENSE_BSD2.txt" for details. 9 * 10 * @TAG(DATA61_BSD) 11 */ 12#include "../../test.h" 13 14#include <platsupport/plat/clock.h> 15#include <sel4platsupport/io.h> 16#include <utils/zf_log.h> 17 18void plat_init(driver_env_t env) 19{ 20 int error; 21 clock_sys_t clock = {}; 22 clk_t *clk; 23 24 error = clock_sys_init(&env->ops, &clock); 25 if (error != 0) { 26 ZF_LOGF("Failed to initalise clock"); 27 } 28 29 clk = clk_get_clock(&clock, CLK_ARM); 30 if (clk == NULL) { 31 ZF_LOGF("Failed to get clock"); 32 } 33 34 /* set the clock rate to 1GHz */ 35 clk_set_freq(clk, 1000 * MHZ); 36} 37