1/*
2 * Copyright Linux Kernel Team
3 *
4 * SPDX-License-Identifier: GPL-2.0-only
5 *
6 * This file is derived from an intermediate build stage of the
7 * Linux kernel. The licenses of all input files to this process
8 * are compatible with GPL-2.0-only.
9 */
10
11/dts-v1/;
12
13/ {
14	compatible = "fsl,imx8mq-evk\0fsl,imx8mq";
15	interrupt-parent = < 0x01 >;
16	#address-cells = < 0x02 >;
17	#size-cells = < 0x02 >;
18	model = "Freescale i.MX8MQ EVK";
19
20	cpus {
21		#address-cells = < 0x02 >;
22		#size-cells = < 0x00 >;
23
24		idle-states {
25			entry-method = "psci";
26
27			cpu-sleep {
28				compatible = "arm,idle-state";
29				arm,psci-suspend-param = < 0x10033 >;
30				entry-latency-us = < 0x3e8 >;
31				exit-latency-us = < 0x2bc >;
32				min-residency-us = < 0xa8c >;
33				local-timer-stop;
34				wakeup-latency-us = < 0x5dc >;
35				linux,phandle = < 0x03 >;
36				phandle = < 0x03 >;
37			};
38
39			cluster-sleep {
40				compatible = "arm,idle-state";
41				arm,psci-suspend-param = < 0x1000000 >;
42				entry-latency-us = < 0x3e8 >;
43				exit-latency-us = < 0x2bc >;
44				min-residency-us = < 0xa8c >;
45				wakeup-latency-us = < 0x5dc >;
46			};
47		};
48
49		cpu@0 {
50			device_type = "cpu";
51			compatible = "arm,cortex-a53";
52			reg = < 0x00 0x00 >;
53			enable-method = "psci";
54			next-level-cache = < 0x02 >;
55			cpu-idle-states = < 0x03 >;
56			operating-points = < 0x16e360 0xf4240 0x13d620 0xf4240 0xf4240 0xdbba0 0xc3500 0xdbba0 >;
57			clocks = < 0x04 0x5a 0x04 0x58 0x04 0x0a 0x04 0x0c 0x04 0x4e >;
58			clock-names = "a53\0arm_a53_src\0arm_pll\0arm_pll_out\0sys1_pll_800m";
59			clock-latency = < 0xee6c >;
60			#cooling-cells = < 0x02 >;
61			dc-supply = < 0x05 >;
62			linux,phandle = < 0x06 >;
63			phandle = < 0x06 >;
64		};
65
66		cpu@1 {
67			device_type = "cpu";
68			compatible = "arm,cortex-a53";
69			reg = < 0x00 0x01 >;
70			enable-method = "psci";
71			next-level-cache = < 0x02 >;
72			cpu-idle-states = < 0x03 >;
73			linux,phandle = < 0x07 >;
74			phandle = < 0x07 >;
75		};
76
77		cpu@2 {
78			device_type = "cpu";
79			compatible = "arm,cortex-a53";
80			reg = < 0x00 0x02 >;
81			enable-method = "psci";
82			next-level-cache = < 0x02 >;
83			cpu-idle-states = < 0x03 >;
84			linux,phandle = < 0x08 >;
85			phandle = < 0x08 >;
86		};
87
88		cpu@3 {
89			device_type = "cpu";
90			compatible = "arm,cortex-a53";
91			reg = < 0x00 0x03 >;
92			enable-method = "psci";
93			next-level-cache = < 0x02 >;
94			cpu-idle-states = < 0x03 >;
95			linux,phandle = < 0x09 >;
96			phandle = < 0x09 >;
97		};
98
99		l2-cache0 {
100			compatible = "cache";
101			linux,phandle = < 0x02 >;
102			phandle = < 0x02 >;
103		};
104	};
105
106	psci {
107		compatible = "arm,psci-1.0";
108		method = "smc";
109		cpu_suspend = < 0xc4000001 >;
110		cpu_off = < 0xc4000002 >;
111		cpu_on = < 0xc4000003 >;
112	};
113
114	pmu {
115		compatible = "arm,armv8-pmuv3";
116		interrupts = < 0x01 0x07 0x3f04 >;
117		interrupt-affinity = < 0x06 0x07 0x08 0x09 >;
118		interrupt-parent = < 0x0a >;
119	};
120
121	aliases {
122		csi0 = "/mipi_csi1@30a70000";
123		csi1 = "/mipi_csi2@30b60000";
124		ethernet0 = "/ethernet@30be0000";
125		serial0 = "/serial@30860000";
126		serial1 = "/serial@30890000";
127		serial2 = "/serial@30880000";
128		serial3 = "/serial@30a60000";
129		spi0 = "/ecspi@30820000";
130		spi1 = "/ecspi@30830000";
131		spi2 = "/ecspi@30840000";
132		mmc0 = "/usdhc@30b40000";
133		mmc1 = "/usdhc@30b50000";
134		gpio0 = "/gpio@30200000";
135		gpio1 = "/gpio@30210000";
136		gpio2 = "/gpio@30220000";
137		gpio3 = "/gpio@30230000";
138		gpio4 = "/gpio@30240000";
139		dsi_phy0 = "/dsi_phy@30A00300";
140		mipi_dsi0 = "/mipi_dsi@30A00000";
141	};
142
143	memory@40000000 {
144		device_type = "memory";
145		reg = < 0x00 0x40000000 0x00 0xc0000000 >;
146	};
147
148	reserved-memory {
149		#address-cells = < 0x02 >;
150		#size-cells = < 0x02 >;
151		ranges;
152
153		linux,cma {
154			compatible = "shared-dma-pool";
155			reusable;
156			size = < 0x00 0x3c000000 >;
157			alloc-ranges = < 0x00 0x40000000 0x00 0x40000000 >;
158			linux,cma-default;
159		};
160
161		rpmsg@0xb8000000 {
162			no-map;
163			reg = < 0x00 0xb8000000 0x00 0x400000 >;
164			linux,phandle = < 0x58 >;
165			phandle = < 0x58 >;
166		};
167	};
168
169	interrupt-controller@38800000 {
170		compatible = "arm,gic-v3";
171		reg = < 0x00 0x38800000 0x00 0x10000 0x00 0x38880000 0x00 0xc0000 0x00 0x30340000 0x00 0x10000 >;
172		#interrupt-cells = < 0x03 >;
173		interrupt-controller;
174		interrupts = < 0x01 0x09 0x04 >;
175		interrupt-parent = < 0x0a >;
176		linux,phandle = < 0x0a >;
177		phandle = < 0x0a >;
178	};
179
180	timer {
181		compatible = "arm,armv8-timer";
182		interrupts = < 0x01 0x0d 0x3f08 0x01 0x0e 0x3f08 0x01 0x0b 0x3f08 0x01 0x0a 0x3f08 >;
183		clock-frequency = < 0x7f2815 >;
184		interrupt-parent = < 0x0a >;
185		arm,no-tick-in-suspend;
186	};
187
188	busfreq {
189		compatible = "fsl,imx_busfreq";
190		clocks = < 0x04 0xf8 0x04 0x75 0x04 0x76 0x04 0x76 0x04 0x112 0x04 0x111 0x04 0x46 0x04 0x4d 0x04 0x48 0x04 0x4e 0x04 0x71 0x04 0x67 0x04 0x73 0x04 0x02 0x04 0x55 0x04 0x49 >;
191		clock-names = "dram_pll\0dram_alt_src\0dram_apb_src\0dram_apb_pre_div\0dram_core\0dram_alt_root\0sys1_pll_40m\0sys1_pll_400m\0sys1_pll_100m\0sys1_pll_800m\0noc_div\0main_axi_src\0ahb_div\0osc_25m\0sys2_pll_333m\0sys1_pll_133m";
192		interrupts = < 0x00 0x66 0x04 0x00 0x6d 0x04 0x00 0x6e 0x04 0x00 0x6f 0x04 >;
193		interrupt-name = "irq_busfreq_0\0irq_busfreq_1\0irq_busfreq_2\0irq_busfreq_3";
194	};
195
196	clocks {
197		#address-cells = < 0x01 >;
198		#size-cells = < 0x00 >;
199
200		clock@0 {
201			compatible = "fixed-clock";
202			reg = < 0x00 >;
203			#clock-cells = < 0x00 >;
204			clock-frequency = < 0x8000 >;
205			clock-output-names = "ckil";
206			linux,phandle = < 0x24 >;
207			phandle = < 0x24 >;
208		};
209
210		clock@1 {
211			compatible = "fixed-clock";
212			reg = < 0x01 >;
213			#clock-cells = < 0x00 >;
214			clock-frequency = < 0x17d7840 >;
215			clock-output-names = "osc_25m";
216			linux,phandle = < 0x25 >;
217			phandle = < 0x25 >;
218		};
219
220		clock@2 {
221			compatible = "fixed-clock";
222			reg = < 0x02 >;
223			#clock-cells = < 0x00 >;
224			clock-frequency = < 0x19bfcc0 >;
225			clock-output-names = "osc_27m";
226			linux,phandle = < 0x26 >;
227			phandle = < 0x26 >;
228		};
229
230		clock@3 {
231			compatible = "fixed-clock";
232			reg = < 0x03 >;
233			#clock-cells = < 0x00 >;
234			clock-frequency = < 0x7ed6b40 >;
235			clock-output-names = "clk_ext1";
236			linux,phandle = < 0x27 >;
237			phandle = < 0x27 >;
238		};
239
240		clock@4 {
241			compatible = "fixed-clock";
242			reg = < 0x04 >;
243			#clock-cells = < 0x00 >;
244			clock-frequency = < 0x7ed6b40 >;
245			clock-output-names = "clk_ext2";
246			linux,phandle = < 0x28 >;
247			phandle = < 0x28 >;
248		};
249
250		clock@5 {
251			compatible = "fixed-clock";
252			reg = < 0x05 >;
253			#clock-cells = < 0x00 >;
254			clock-frequency = < 0x7ed6b40 >;
255			clock-output-names = "clk_ext3";
256			linux,phandle = < 0x29 >;
257			phandle = < 0x29 >;
258		};
259
260		clock@6 {
261			compatible = "fixed-clock";
262			reg = < 0x06 >;
263			#clock-cells = < 0x00 >;
264			clock-frequency = < 0x7ed6b40 >;
265			clock-output-names = "clk_ext4";
266			linux,phandle = < 0x2a >;
267			phandle = < 0x2a >;
268		};
269	};
270
271	gpc_power_domain@0 {
272		compatible = "fsl,imx8mq-pm-domain";
273		#power-domain-cells = < 0x00 >;
274		domain-id = < 0x00 >;
275		domain-name = "MIPI_PD";
276		linux,phandle = < 0x20 >;
277		phandle = < 0x20 >;
278	};
279
280	gpc_power_domain@1 {
281		compatible = "fsl,imx8mq-pm-domain";
282		#power-domain-cells = < 0x00 >;
283		domain-id = < 0x01 >;
284		domain-name = "PCIE0_PD";
285		linux,phandle = < 0x59 >;
286		phandle = < 0x59 >;
287	};
288
289	gpc_power_domain@2 {
290		compatible = "fsl,imx8mq-pm-domain";
291		#power-domain-cells = < 0x00 >;
292		domain-id = < 0x02 >;
293		domain-name = "USB_OTG1_PD";
294		linux,phandle = < 0x31 >;
295		phandle = < 0x31 >;
296	};
297
298	gpc_power_domain@3 {
299		compatible = "fsl,imx8mq-pm-domain";
300		#power-domain-cells = < 0x00 >;
301		domain-id = < 0x03 >;
302		domain-name = "USB_OTG2_PD";
303		linux,phandle = < 0x34 >;
304		phandle = < 0x34 >;
305	};
306
307	gpc_power_domain@4 {
308		compatible = "fsl,imx8mq-pm-domain";
309		#power-domain-cells = < 0x00 >;
310		domain-id = < 0x04 >;
311		domain-name = "GPU_PD";
312		clocks = < 0x04 0x6f 0x04 0x66 0x04 0xe5 0x04 0x70 >;
313		power-supply = < 0x0b >;
314		linux,phandle = < 0x46 >;
315		phandle = < 0x46 >;
316	};
317
318	gpc_power_domain@5 {
319		compatible = "fsl,imx8mq-pm-domain";
320		#power-domain-cells = < 0x00 >;
321		domain-id = < 0x05 >;
322		domain-name = "VPU_PD";
323		clocks = < 0x04 0xf3 0x04 0xf4 0x04 0xed >;
324		power-supply = < 0x0c >;
325		linux,phandle = < 0x55 >;
326		phandle = < 0x55 >;
327	};
328
329	gpc_power_domain@8 {
330		compatible = "fsl,imx8mq-pm-domain";
331		#power-domain-cells = < 0x00 >;
332		domain-id = < 0x08 >;
333		domain-name = "MIPI_CSI1_PD";
334		linux,phandle = < 0x11 >;
335		phandle = < 0x11 >;
336	};
337
338	gpc_power_domain@9 {
339		compatible = "fsl,imx8mq-pm-domain";
340		#power-domain-cells = < 0x00 >;
341		domain-id = < 0x09 >;
342		domain-name = "MIPI_CSI2_PD";
343		linux,phandle = < 0x16 >;
344		phandle = < 0x16 >;
345	};
346
347	gpc_power_domain@10 {
348		compatible = "fsl,imx8mq-pm-domain";
349		#power-domain-cells = < 0x00 >;
350		domain-id = < 0x0a >;
351		domain-name = "PCIE1_PD";
352		linux,phandle = < 0x5b >;
353		phandle = < 0x5b >;
354	};
355
356	pwm@30660000 {
357		compatible = "fsl,imx8mq-pwm\0fsl,imx27-pwm";
358		reg = < 0x00 0x30660000 0x00 0x10000 >;
359		interrupts = < 0x00 0x51 0x04 >;
360		clocks = < 0x04 0xcd 0x04 0xcd >;
361		clock-names = "ipg\0per";
362		#pwm-cells = < 0x02 >;
363		status = "disabled";
364	};
365
366	pwm@30670000 {
367		compatible = "fsl,imx8mq-pwm\0fsl,imx27-pwm";
368		reg = < 0x00 0x30670000 0x00 0x10000 >;
369		interrupts = < 0x00 0x52 0x04 >;
370		clocks = < 0x04 0xce 0x04 0xce >;
371		clock-names = "ipg\0per";
372		#pwm-cells = < 0x02 >;
373		status = "disabled";
374	};
375
376	pwm@30680000 {
377		compatible = "fsl,imx8mq-pwm\0fsl,imx27-pwm";
378		reg = < 0x00 0x30680000 0x00 0x10000 >;
379		interrupts = < 0x00 0x53 0x04 >;
380		clocks = < 0x04 0xcf 0x04 0xcf >;
381		clock-names = "ipg\0per";
382		#pwm-cells = < 0x02 >;
383		status = "disabled";
384	};
385
386	pwm@30690000 {
387		compatible = "fsl,imx8mq-pwm\0fsl,imx27-pwm";
388		reg = < 0x00 0x30690000 0x00 0x10000 >;
389		interrupts = < 0x00 0x54 0x04 >;
390		clocks = < 0x04 0xd0 0x04 0xd0 >;
391		clock-names = "ipg\0per";
392		#pwm-cells = < 0x02 >;
393		status = "disabled";
394	};
395
396	gpio@30200000 {
397		compatible = "fsl,imx8mq-gpio\0fsl,imx35-gpio";
398		reg = < 0x00 0x30200000 0x00 0x10000 >;
399		interrupts = < 0x00 0x40 0x04 0x00 0x41 0x04 >;
400		gpio-controller;
401		#gpio-cells = < 0x02 >;
402		interrupt-controller;
403		#interrupt-cells = < 0x02 >;
404		linux,phandle = < 0x4c >;
405		phandle = < 0x4c >;
406	};
407
408	gpio@30210000 {
409		compatible = "fsl,imx8mq-gpio\0fsl,imx35-gpio";
410		reg = < 0x00 0x30210000 0x00 0x10000 >;
411		interrupts = < 0x00 0x42 0x04 0x00 0x43 0x04 >;
412		gpio-controller;
413		#gpio-cells = < 0x02 >;
414		interrupt-controller;
415		#interrupt-cells = < 0x02 >;
416		linux,phandle = < 0x3c >;
417		phandle = < 0x3c >;
418	};
419
420	gpio@30220000 {
421		compatible = "fsl,imx8mq-gpio\0fsl,imx35-gpio";
422		reg = < 0x00 0x30220000 0x00 0x10000 >;
423		interrupts = < 0x00 0x44 0x04 0x00 0x45 0x04 >;
424		gpio-controller;
425		#gpio-cells = < 0x02 >;
426		interrupt-controller;
427		#interrupt-cells = < 0x02 >;
428		linux,phandle = < 0x49 >;
429		phandle = < 0x49 >;
430	};
431
432	gpio@30230000 {
433		compatible = "fsl,imx8mq-gpio\0fsl,imx35-gpio";
434		reg = < 0x00 0x30230000 0x00 0x10000 >;
435		interrupts = < 0x00 0x46 0x04 0x00 0x47 0x04 >;
436		gpio-controller;
437		#gpio-cells = < 0x02 >;
438		interrupt-controller;
439		#interrupt-cells = < 0x02 >;
440	};
441
442	gpio@30240000 {
443		compatible = "fsl,imx8mq-gpio\0fsl,imx35-gpio";
444		reg = < 0x00 0x30240000 0x00 0x10000 >;
445		interrupts = < 0x00 0x48 0x04 0x00 0x49 0x04 >;
446		gpio-controller;
447		#gpio-cells = < 0x02 >;
448		interrupt-controller;
449		#interrupt-cells = < 0x02 >;
450		linux,phandle = < 0x53 >;
451		phandle = < 0x53 >;
452	};
453
454	tmu@30260000 {
455		compatible = "fsl,imx8mq-tmu";
456		reg = < 0x00 0x30260000 0x00 0x10000 >;
457		interrupt = < 0x00 0x31 0x04 >;
458		little-endian;
459		fsl,tmu-range = < 0xb0000 0xa0026 0x80048 0x70061 >;
460		fsl,tmu-calibration = < 0x00 0x23 0x01 0x29 0x02 0x2f 0x03 0x35 0x04 0x3d 0x05 0x43 0x06 0x4b 0x07 0x51 0x08 0x57 0x09 0x5f 0x0a 0x67 0x0b 0x6f 0x10000 0x1b 0x10001 0x23 0x10002 0x2b 0x10003 0x33 0x10004 0x3b 0x10005 0x43 0x10006 0x4b 0x10007 0x55 0x10008 0x5d 0x10009 0x67 0x1000a 0x70 0x20000 0x17 0x20001 0x23 0x20002 0x2d 0x20003 0x37 0x20004 0x41 0x20005 0x4b 0x20006 0x57 0x20007 0x63 0x20008 0x6f 0x30000 0x15 0x30001 0x21 0x30002 0x2d 0x30003 0x39 0x30004 0x45 0x30005 0x53 0x30006 0x5f 0x30007 0x71 >;
461		#thermal-sensor-cells = < 0x00 >;
462		linux,phandle = < 0x0d >;
463		phandle = < 0x0d >;
464	};
465
466	thermal-zones {
467
468		cpu-thermal {
469			polling-delay-passive = < 0xfa >;
470			polling-delay = < 0x7d0 >;
471			thermal-sensors = < 0x0d >;
472
473			trips {
474
475				trip0 {
476					temperature = < 0x14c08 >;
477					hysteresis = < 0x7d0 >;
478					type = "passive";
479					linux,phandle = < 0x0e >;
480					phandle = < 0x0e >;
481				};
482
483				trip1 {
484					temperature = < 0x17318 >;
485					hysteresis = < 0x7d0 >;
486					type = "critical";
487				};
488			};
489
490			cooling-maps {
491
492				map0 {
493					trip = < 0x0e >;
494					cooling-device = < 0x06 0xffffffff 0xffffffff >;
495				};
496			};
497		};
498	};
499
500	gpt@302d0000 {
501		compatible = "fsl,imx8mq-gpt\0fsl,imx7d-gpt";
502		reg = < 0x00 0x302d0000 0x00 0x10000 >;
503		interrupts = < 0x00 0x37 0x04 >;
504		clocks = < 0x04 0xc5 0x04 0xc5 0x04 0xf9 >;
505		clock-names = "ipg\0per\0osc_per";
506		status = "disabled";
507	};
508
509	irqsteer@32e2d000 {
510		compatible = "nxp,imx-irqsteer";
511		reg = < 0x00 0x32e2d000 0x00 0x1000 >;
512		interrupts = < 0x00 0x12 0x04 >;
513		interrupt-controller;
514		#interrupt-cells = < 0x02 >;
515		nxp,irqsteer_chans = < 0x02 >;
516		nxp,endian = < 0x01 >;
517		clocks = < 0x04 0x10e >;
518		clock-names = "ipg";
519		linux,phandle = < 0x19 >;
520		phandle = < 0x19 >;
521	};
522
523	csi1_bridge@30a90000 {
524		compatible = "fsl,imx8mq-csi\0fsl,imx6s-csi";
525		reg = < 0x00 0x30a90000 0x00 0x10000 >;
526		interrupts = < 0x00 0x2a 0x04 >;
527		clocks = < 0x04 0x00 0x04 0xee 0x04 0x00 >;
528		clock-names = "disp-axi\0csi_mclk\0disp_dcic";
529		status = "okay";
530		fsl,mipi-mode;
531		fsl,two-8bit-sensor-mode;
532
533		port {
534
535			endpoint {
536				remote-endpoint = < 0x0f >;
537				linux,phandle = < 0x15 >;
538				phandle = < 0x15 >;
539			};
540		};
541	};
542
543	csi2_bridge@30b80000 {
544		compatible = "fsl,imx8mq-csi\0fsl,imx6s-csi";
545		reg = < 0x00 0x30b80000 0x00 0x10000 >;
546		interrupts = < 0x00 0x2b 0x04 >;
547		clocks = < 0x04 0x00 0x04 0xef 0x04 0x00 >;
548		clock-names = "disp-axi\0csi_mclk\0disp_dcic";
549		status = "okay";
550		fsl,mipi-mode;
551		fsl,two-8bit-sensor-mode;
552
553		port {
554
555			endpoint {
556				remote-endpoint = < 0x10 >;
557				linux,phandle = < 0x18 >;
558				phandle = < 0x18 >;
559			};
560		};
561	};
562
563	mipi_csi1@30a70000 {
564		compatible = "fsl,mxc-mipi-csi2_yav";
565		reg = < 0x00 0x30a70000 0x00 0x1000 >;
566		interrupts = < 0x00 0x2c 0x04 >;
567		clocks = < 0x04 0x00 0x04 0xa7 0x04 0xa9 0x04 0xa8 >;
568		clock-names = "clk_apb\0clk_core\0clk_esc\0clk_pxl";
569		assigned-clocks = < 0x04 0xa7 0x04 0xa8 0x04 0xa9 >;
570		assigned-clock-rates = < 0x7ed6b40 0x5f5e100 0x3ef1480 >;
571		power-domains = < 0x11 >;
572		csis-phy-reset = < 0x12 0x4c 0x07 >;
573		phy-gpr = < 0x13 0x88 >;
574		status = "okay";
575		#address-cells = < 0x01 >;
576		#size-cells = < 0x00 >;
577
578		port {
579
580			endpoint1 {
581				remote-endpoint = < 0x14 >;
582				data-lanes = < 0x01 0x02 >;
583				linux,phandle = < 0x50 >;
584				phandle = < 0x50 >;
585			};
586
587			endpoint2 {
588				remote-endpoint = < 0x15 >;
589				linux,phandle = < 0x0f >;
590				phandle = < 0x0f >;
591			};
592		};
593	};
594
595	mipi_csi2@30b60000 {
596		compatible = "fsl,mxc-mipi-csi2_yav";
597		reg = < 0x00 0x30b60000 0x00 0x1000 >;
598		interrupts = < 0x00 0x2d 0x04 >;
599		clocks = < 0x04 0x00 0x04 0xaa 0x04 0xac 0x04 0xab >;
600		clock-names = "clk_apb\0clk_core\0clk_esc\0clk_pxl";
601		assigned-clocks = < 0x04 0xaa 0x04 0xab 0x04 0xac >;
602		assigned-clock-rates = < 0x7ed6b40 0x5f5e100 0x3ef1480 >;
603		power-domains = < 0x16 >;
604		csis-phy-reset = < 0x12 0x50 0x07 >;
605		phy-gpr = < 0x13 0xa4 >;
606		status = "okay";
607		#address-cells = < 0x01 >;
608		#size-cells = < 0x00 >;
609
610		port {
611
612			endpoint1 {
613				remote-endpoint = < 0x17 >;
614				data-lanes = < 0x01 0x02 >;
615				linux,phandle = < 0x4d >;
616				phandle = < 0x4d >;
617			};
618
619			endpoint2 {
620				remote-endpoint = < 0x18 >;
621				linux,phandle = < 0x10 >;
622				phandle = < 0x10 >;
623			};
624		};
625	};
626
627	dcss@0x32e00000 {
628		#address-cells = < 0x01 >;
629		#size-cells = < 0x00 >;
630		compatible = "nxp,imx8mq-dcss";
631		reg = < 0x00 0x32e00000 0x00 0x30000 >;
632		interrupts = < 0x03 0x04 0x04 0x04 0x05 0x04 0x06 0x04 0x08 0x04 0x09 0x01 0x10 0x04 0x11 0x04 >;
633		interrupt-names = "dpr_dc_ch0\0dpr_dc_ch1\0dpr_dc_ch2\0ctx_ld\0ctxld_kick\0dtg_prg1\0dtrc_ch1\0dtrc_ch2";
634		interrupt-parent = < 0x19 >;
635		clocks = < 0x04 0x10e 0x04 0x10d 0x04 0x10f 0x04 0x00 0x04 0x00 0x04 0x79 >;
636		clock-names = "apb\0axi\0rtrm\0pix_div\0pix_out\0dtrc";
637		assigned-clocks = < 0x04 0x7e 0x04 0x6b 0x04 0x6d >;
638		assigned-clock-parents = < 0x04 0x25 0x04 0x4e 0x04 0x4e >;
639		assigned-clock-rates = < 0x2367b880 0x2faf0800 0x17d78400 >;
640		status = "okay";
641		disp-dev = "hdmi_disp";
642
643		port@0 {
644			reg = < 0x00 >;
645			linux,phandle = < 0x1c >;
646			phandle = < 0x1c >;
647
648			hdmi-endpoint {
649				remote-endpoint = < 0x1a >;
650				linux,phandle = < 0x1b >;
651				phandle = < 0x1b >;
652			};
653		};
654	};
655
656	hdmi@32c00000 {
657		#address-cells = < 0x01 >;
658		#size-cells = < 0x00 >;
659		compatible = "fsl,imx8mq-hdmi";
660		reg = < 0x00 0x32c00000 0x00 0x100000 0x00 0x32e40000 0x00 0x40000 0x00 0x32e2f000 0x00 0x10 >;
661		interrupts = < 0x00 0x10 0x04 0x00 0x19 0x04 >;
662		interrupt-names = "plug_in\0plug_out";
663		fsl,cec;
664		status = "okay";
665
666		port@0 {
667			reg = < 0x00 >;
668
669			endpoint {
670				remote-endpoint = < 0x1b >;
671				linux,phandle = < 0x1a >;
672				phandle = < 0x1a >;
673			};
674		};
675	};
676
677	lcdif@30320000 {
678		compatible = "fsl,imx8mq-lcdif\0fsl,imx28-lcdif";
679		reg = < 0x00 0x30320000 0x00 0x10000 >;
680		clocks = < 0x04 0x7f >;
681		clock-names = "pix";
682		assigned-clocks = < 0x04 0x7f >;
683		assigned-clock-parents = < 0x04 0x25 >;
684		assigned-clock-rate = < 0x2367b880 >;
685		interrupts = < 0x00 0x05 0x04 >;
686		status = "disabled";
687	};
688
689	display-subsystem {
690		compatible = "fsl,imx-display-subsystem";
691		ports = < 0x1c >;
692	};
693
694	dsi_phy@30A00300 {
695		#address-cells = < 0x01 >;
696		#size-cells = < 0x00 >;
697		compatible = "mixel,imx8mq-mipi-dsi-phy";
698		reg = < 0x00 0x30a00300 0x00 0x100 >;
699		#phy-cells = < 0x00 >;
700		status = "disabled";
701		linux,phandle = < 0x1d >;
702		phandle = < 0x1d >;
703	};
704
705	mipi_dsi_bridge@30A00000 {
706		#address-cells = < 0x01 >;
707		#size-cells = < 0x00 >;
708		compatible = "nwl,mipi-dsi";
709		reg = < 0x00 0x30a00000 0x00 0x400 >;
710		interrupts = < 0x00 0x22 0x04 >;
711		clocks = < 0x04 0xa4 0x04 0x102 0x04 0x103 >;
712		clock-names = "phy_ref\0rx_esc\0tx_esc";
713		assigned-clocks = < 0x04 0x102 >;
714		assigned-clock-parents = < 0x04 0x47 >;
715		assigned-clock-rates = < 0x4c4b400 >;
716		phys = < 0x1d >;
717		phy-names = "dphy";
718		no_clk_reset;
719		status = "disabled";
720
721		port@0 {
722
723			endpoint {
724				remote-endpoint = < 0x1e >;
725				linux,phandle = < 0x21 >;
726				phandle = < 0x21 >;
727			};
728		};
729
730		port@1 {
731
732			endpoint {
733				remote-endpoint = < 0x1f >;
734				linux,phandle = < 0x54 >;
735				phandle = < 0x54 >;
736			};
737		};
738	};
739
740	mipi_dsi@30A00000 {
741		compatible = "fsl,imx8mq-mipi-dsi_drm";
742		clocks = < 0x04 0xa3 0x04 0xa4 >;
743		clock-names = "core\0phy_ref";
744		assigned-clocks = < 0x04 0xa4 0x04 0xa3 >;
745		assigned-clock-parents = < 0x04 0x25 0x04 0x4c >;
746		assigned-clock-rates = < 0x2367b880 0xfdad680 >;
747		power-domains = < 0x20 >;
748		src = < 0x12 >;
749		mux-sel = < 0x13 >;
750		phys = < 0x1d >;
751		phy-names = "dphy";
752		no_clk_reset;
753		status = "disabled";
754
755		port@0 {
756
757			endpoint {
758				remote-endpoint = < 0x21 >;
759				linux,phandle = < 0x1e >;
760				phandle = < 0x1e >;
761			};
762		};
763	};
764
765	iomuxc@30330000 {
766		compatible = "fsl,imx8mq-iomuxc";
767		reg = < 0x00 0x30330000 0x00 0x10000 >;
768		pinctrl-names = "default";
769		pinctrl-0 = < 0x22 >;
770
771		imx8mq-evk {
772
773			hoggrp {
774				fsl,pins = < 0x134 0x39c 0x00 0x05 0x00 0x19 0x138 0x3a0 0x00 0x05 0x00 0x19 0x13c 0x3a4 0x00 0x05 0x00 0x19 >;
775				linux,phandle = < 0x22 >;
776				phandle = < 0x22 >;
777			};
778
779			csi1_pwn_grp {
780				fsl,pins = < 0x34 0x29c 0x00 0x00 0x00 0x19 >;
781				linux,phandle = < 0x4f >;
782				phandle = < 0x4f >;
783			};
784
785			csi2_pwn_grp {
786				fsl,pins = < 0x3c 0x2a4 0x00 0x00 0x00 0x19 >;
787				linux,phandle = < 0x4a >;
788				phandle = < 0x4a >;
789			};
790
791			csi_rst_grp {
792				fsl,pins = < 0x40 0x2a8 0x00 0x00 0x00 0x19 0x64 0x2cc 0x00 0x06 0x00 0x59 >;
793				linux,phandle = < 0x4b >;
794				phandle = < 0x4b >;
795			};
796
797			fec1grp {
798				fsl,pins = < 0x68 0x2d0 0x00 0x00 0x00 0x03 0x6c 0x2d4 0x4c0 0x00 0x01 0x23 0x70 0x2d8 0x00 0x00 0x00 0x1f 0x74 0x2dc 0x00 0x00 0x00 0x1f 0x78 0x2e0 0x00 0x00 0x00 0x1f 0x7c 0x2e4 0x00 0x00 0x00 0x1f 0x9c 0x304 0x00 0x00 0x00 0x91 0x98 0x300 0x00 0x00 0x00 0x91 0x94 0x2fc 0x00 0x00 0x00 0x91 0x90 0x2f8 0x00 0x00 0x00 0x91 0x84 0x2ec 0x00 0x00 0x00 0x1f 0x8c 0x2f4 0x00 0x00 0x00 0x91 0x88 0x2f0 0x00 0x00 0x00 0x91 0x80 0x2e8 0x00 0x00 0x00 0x1f 0x4c 0x2b4 0x00 0x00 0x00 0x19 >;
799				linux,phandle = < 0x44 >;
800				phandle = < 0x44 >;
801			};
802
803			i2c1grp {
804				fsl,pins = < 0x214 0x47c 0x00 0x00 0x00 0x4000007f 0x218 0x480 0x00 0x00 0x00 0x4000007f >;
805				linux,phandle = < 0x47 >;
806				phandle = < 0x47 >;
807			};
808
809			i2c2grp {
810				fsl,pins = < 0x21c 0x484 0x00 0x00 0x00 0x40000067 0x220 0x488 0x00 0x00 0x00 0x40000067 >;
811				linux,phandle = < 0x4e >;
812				phandle = < 0x4e >;
813			};
814
815			i2c3grp {
816				fsl,pins = < 0x224 0x48c 0x00 0x00 0x00 0x40000067 0x228 0x490 0x00 0x00 0x00 0x40000067 >;
817				linux,phandle = < 0x51 >;
818				phandle = < 0x51 >;
819			};
820
821			pcie0grp {
822				fsl,pins = < 0x22c 0x494 0x524 0x12 0x00 0x76 0x250 0x4b8 0x00 0x05 0x00 0x16 0x24c 0x4b4 0x00 0x05 0x00 0x16 >;
823				linux,phandle = < 0x5a >;
824				phandle = < 0x5a >;
825			};
826
827			pcie1grp {
828				fsl,pins = < 0x230 0x498 0x528 0x12 0x00 0x76 0x204 0x46c 0x00 0x05 0x00 0x16 0x20c 0x474 0x00 0x05 0x00 0x16 >;
829				linux,phandle = < 0x5c >;
830				phandle = < 0x5c >;
831			};
832
833			dvfsgrp {
834				fsl,pins = < 0x5c 0x2c4 0x00 0x00 0x00 0x16 >;
835				linux,phandle = < 0x5e >;
836				phandle = < 0x5e >;
837			};
838
839			typecgrp {
840				fsl,pins = < 0x130 0x398 0x00 0x05 0x00 0x16 0x100 0x368 0x00 0x05 0x00 0x17059 >;
841				linux,phandle = < 0x48 >;
842				phandle = < 0x48 >;
843			};
844
845			qspigrp {
846				fsl,pins = < 0xf4 0x35c 0x00 0x01 0x00 0x82 0xf8 0x360 0x00 0x01 0x00 0x82 0x10c 0x374 0x00 0x01 0x00 0x82 0x110 0x378 0x00 0x01 0x00 0x82 0x114 0x37c 0x00 0x01 0x00 0x82 0x118 0x380 0x00 0x01 0x00 0x82 >;
847				linux,phandle = < 0x57 >;
848				phandle = < 0x57 >;
849			};
850
851			uart1grp {
852				fsl,pins = < 0x234 0x49c 0x4f4 0x00 0x00 0x49 0x238 0x4a0 0x00 0x00 0x00 0x49 >;
853				linux,phandle = < 0x2d >;
854				phandle = < 0x2d >;
855			};
856
857			uart3grp {
858				fsl,pins = < 0x248 0x4b0 0x00 0x00 0x00 0x49 0x244 0x4ac 0x504 0x00 0x02 0x49 0x1fc 0x464 0x00 0x01 0x00 0x49 0x200 0x468 0x500 0x01 0x01 0x49 0x108 0x370 0x00 0x05 0x00 0x19 >;
859				linux,phandle = < 0x2e >;
860				phandle = < 0x2e >;
861			};
862
863			usdhc1grp {
864				fsl,pins = < 0xa0 0x308 0x00 0x00 0x00 0x83 0xa4 0x30c 0x00 0x00 0x00 0xc3 0xa8 0x310 0x00 0x00 0x00 0xc3 0xac 0x314 0x00 0x00 0x00 0xc3 0xb0 0x318 0x00 0x00 0x00 0xc3 0xb4 0x31c 0x00 0x00 0x00 0xc3 0xb8 0x320 0x00 0x00 0x00 0xc3 0xbc 0x324 0x00 0x00 0x00 0xc3 0xc0 0x328 0x00 0x00 0x00 0xc3 0xc4 0x32c 0x00 0x00 0x00 0xc3 0xcc 0x334 0x00 0x00 0x00 0x83 0xc8 0x330 0x00 0x00 0x00 0xc1 >;
865				linux,phandle = < 0x35 >;
866				phandle = < 0x35 >;
867			};
868
869			usdhc1grp100mhz {
870				fsl,pins = < 0xa0 0x308 0x00 0x00 0x00 0x8d 0xa4 0x30c 0x00 0x00 0x00 0xcd 0xa8 0x310 0x00 0x00 0x00 0xcd 0xac 0x314 0x00 0x00 0x00 0xcd 0xb0 0x318 0x00 0x00 0x00 0xcd 0xb4 0x31c 0x00 0x00 0x00 0xcd 0xb8 0x320 0x00 0x00 0x00 0xcd 0xbc 0x324 0x00 0x00 0x00 0xcd 0xc0 0x328 0x00 0x00 0x00 0xcd 0xc4 0x32c 0x00 0x00 0x00 0xcd 0xcc 0x334 0x00 0x00 0x00 0x8d 0xc8 0x330 0x00 0x00 0x00 0xc1 >;
871				linux,phandle = < 0x36 >;
872				phandle = < 0x36 >;
873			};
874
875			usdhc1grp200mhz {
876				fsl,pins = < 0xa0 0x308 0x00 0x00 0x00 0x9f 0xa4 0x30c 0x00 0x00 0x00 0xdf 0xa8 0x310 0x00 0x00 0x00 0xdf 0xac 0x314 0x00 0x00 0x00 0xdf 0xb0 0x318 0x00 0x00 0x00 0xdf 0xb4 0x31c 0x00 0x00 0x00 0xdf 0xb8 0x320 0x00 0x00 0x00 0xdf 0xbc 0x324 0x00 0x00 0x00 0xdf 0xc0 0x328 0x00 0x00 0x00 0xdf 0xc4 0x32c 0x00 0x00 0x00 0xdf 0xcc 0x334 0x00 0x00 0x00 0x9f 0xc8 0x330 0x00 0x00 0x00 0xc1 >;
877				linux,phandle = < 0x37 >;
878				phandle = < 0x37 >;
879			};
880
881			usdhc2grpgpio {
882				fsl,pins = < 0xd0 0x338 0x00 0x05 0x00 0x41 0xec 0x354 0x00 0x05 0x00 0x41 >;
883				linux,phandle = < 0x39 >;
884				phandle = < 0x39 >;
885			};
886
887			usdhc2grp {
888				fsl,pins = < 0xd4 0x33c 0x00 0x00 0x00 0x83 0xd8 0x340 0x00 0x00 0x00 0xc3 0xdc 0x344 0x00 0x00 0x00 0xc3 0xe0 0x348 0x00 0x00 0x00 0xc3 0xe4 0x34c 0x00 0x00 0x00 0xc3 0xe8 0x350 0x00 0x00 0x00 0xc3 0x38 0x2a0 0x00 0x01 0x00 0xc1 >;
889				linux,phandle = < 0x38 >;
890				phandle = < 0x38 >;
891			};
892
893			usdhc2grp100mhz {
894				fsl,pins = < 0xd4 0x33c 0x00 0x00 0x00 0x8d 0xd8 0x340 0x00 0x00 0x00 0xcd 0xdc 0x344 0x00 0x00 0x00 0xcd 0xe0 0x348 0x00 0x00 0x00 0xcd 0xe4 0x34c 0x00 0x00 0x00 0xcd 0xe8 0x350 0x00 0x00 0x00 0xcd 0x38 0x2a0 0x00 0x01 0x00 0xc1 >;
895				linux,phandle = < 0x3a >;
896				phandle = < 0x3a >;
897			};
898
899			usdhc2grp200mhz {
900				fsl,pins = < 0xd4 0x33c 0x00 0x00 0x00 0x9f 0xd8 0x340 0x00 0x00 0x00 0xdf 0xdc 0x344 0x00 0x00 0x00 0xdf 0xe0 0x348 0x00 0x00 0x00 0xdf 0xe4 0x34c 0x00 0x00 0x00 0xdf 0xe8 0x350 0x00 0x00 0x00 0xdf 0x38 0x2a0 0x00 0x01 0x00 0xc1 >;
901				linux,phandle = < 0x3b >;
902				phandle = < 0x3b >;
903			};
904
905			sai1grp_pcm {
906				fsl,pins = < 0x1ac 0x414 0x00 0x00 0x00 0xd6 0x184 0x3ec 0x4cc 0x00 0x03 0xd6 0x180 0x3e8 0x4cc 0x02 0x04 0xd6 0x188 0x3f0 0x4c8 0x00 0x01 0xd6 0x18c 0x3f4 0x00 0x00 0x00 0xd6 0x190 0x3f8 0x00 0x00 0x00 0xd6 0x194 0x3fc 0x00 0x00 0x00 0xd6 0x198 0x400 0x00 0x00 0x00 0xd6 0x19c 0x404 0x00 0x00 0x00 0xd6 0x1a0 0x408 0x00 0x00 0x00 0xd6 0x1a4 0x40c 0x00 0x00 0x00 0xd6 0x1a8 0x410 0x00 0x00 0x00 0xd6 >;
907				linux,phandle = < 0x3f >;
908				phandle = < 0x3f >;
909			};
910
911			sai1grp_pcm_b2m {
912				fsl,pins = < 0x1ac 0x414 0x4c8 0x02 0x02 0xd6 0x184 0x3ec 0x4cc 0x00 0x03 0xd6 0x180 0x3e8 0x4cc 0x02 0x04 0xd6 0x188 0x3f0 0x4c8 0x00 0x01 0xd6 0x18c 0x3f4 0x00 0x00 0x00 0xd6 0x190 0x3f8 0x00 0x00 0x00 0xd6 0x194 0x3fc 0x00 0x00 0x00 0xd6 0x198 0x400 0x00 0x00 0x00 0xd6 0x19c 0x404 0x00 0x00 0x00 0xd6 0x1a0 0x408 0x00 0x00 0x00 0xd6 0x1a4 0x40c 0x00 0x00 0x00 0xd6 0x1a8 0x410 0x00 0x00 0x00 0xd6 >;
913				linux,phandle = < 0x40 >;
914				phandle = < 0x40 >;
915			};
916
917			sai1grp_dsd {
918				fsl,pins = < 0x1ac 0x414 0x00 0x00 0x00 0xd6 0x184 0x3ec 0x4cc 0x00 0x03 0xd6 0x180 0x3e8 0x00 0x03 0x00 0xd6 0x188 0x3f0 0x4c8 0x00 0x01 0xd6 0x18c 0x3f4 0x00 0x00 0x00 0xd6 0x190 0x3f8 0x00 0x00 0x00 0xd6 0x194 0x3fc 0x00 0x00 0x00 0xd6 0x198 0x400 0x00 0x00 0x00 0xd6 0x19c 0x404 0x00 0x00 0x00 0xd6 0x1a0 0x408 0x00 0x00 0x00 0xd6 0x1a4 0x40c 0x00 0x00 0x00 0xd6 0x1a8 0x410 0x00 0x00 0x00 0xd6 >;
919				linux,phandle = < 0x41 >;
920				phandle = < 0x41 >;
921			};
922
923			sai2grp {
924				fsl,pins = < 0x1bc 0x424 0x00 0x00 0x00 0xd6 0x1c0 0x428 0x00 0x00 0x00 0xd6 0x1c8 0x430 0x00 0x00 0x00 0xd6 0x1c4 0x42c 0x00 0x00 0x00 0xd6 0x48 0x2b0 0x00 0x00 0x00 0xd6 >;
925				linux,phandle = < 0x43 >;
926				phandle = < 0x43 >;
927			};
928
929			sai5grp {
930				fsl,pins = < 0x158 0x3c0 0x52c 0x00 0x00 0xd6 0x144 0x3ac 0x4d0 0x00 0x00 0xd6 0x140 0x3a8 0x4e4 0x00 0x00 0xd6 0x148 0x3b0 0x4d4 0x00 0x00 0xd6 0x14c 0x3b4 0x4d8 0x00 0x00 0xd6 0x150 0x3b8 0x4dc 0x00 0x00 0xd6 0x154 0x3bc 0x4e0 0x00 0x00 0xd6 >;
931				linux,phandle = < 0x42 >;
932				phandle = < 0x42 >;
933			};
934
935			spdif1grp {
936				fsl,pins = < 0x1e8 0x450 0x00 0x00 0x00 0xd6 0x1ec 0x454 0x00 0x00 0x00 0xd6 >;
937				linux,phandle = < 0x2c >;
938				phandle = < 0x2c >;
939			};
940
941			wdoggrp {
942				fsl,pins = < 0x30 0x298 0x00 0x01 0x00 0xc6 >;
943				linux,phandle = < 0x56 >;
944				phandle = < 0x56 >;
945			};
946
947			dsi_ts_int {
948				fsl,pins = < 0x1f8 0x460 0x00 0x05 0x00 0x19 >;
949				linux,phandle = < 0x52 >;
950				phandle = < 0x52 >;
951			};
952		};
953	};
954
955	iomuxc-gpr@30340000 {
956		compatible = "fsl,imx8mq-iomuxc-gpr\0fsl,imx7d-iomuxc-gpr\0syscon";
957		reg = < 0x00 0x30340000 0x00 0x10000 >;
958		linux,phandle = < 0x13 >;
959		phandle = < 0x13 >;
960	};
961
962	ocotp-ctrl@30350000 {
963		compatible = "fsl,imx8mq-ocotp\0fsl,imx7d-ocotp\0syscon";
964		reg = < 0x00 0x30350000 0x00 0x10000 >;
965		clocks = < 0x04 0x110 >;
966		#address-cells = < 0x01 >;
967		#size-cells = < 0x01 >;
968	};
969
970	anatop@30360000 {
971		compatible = "fsl,imx8mq-anatop\0fsl,imx6q-anatop\0syscon\0simple-bus";
972		reg = < 0x00 0x30360000 0x00 0x10000 >;
973		interrupts = < 0x00 0x31 0x04 >;
974	};
975
976	snvs@30370000 {
977		compatible = "fsl,sec-v4.0-mon\0syscon\0simple-mfd";
978		reg = < 0x00 0x30370000 0x00 0x10000 >;
979		linux,phandle = < 0x23 >;
980		phandle = < 0x23 >;
981
982		snvs-rtc-lp {
983			compatible = "fsl,sec-v4.0-mon-rtc-lp";
984			regmap = < 0x23 >;
985			offset = < 0x34 >;
986			interrupts = < 0x00 0x13 0x04 0x00 0x14 0x04 >;
987		};
988
989		snvs-powerkey {
990			compatible = "fsl,sec-v4.0-pwrkey";
991			regmap = < 0x23 >;
992			interrupts = < 0x00 0x04 0x04 >;
993			linux,keycode = < 0x74 >;
994			wakeup-source;
995		};
996	};
997
998	ccm@30380000 {
999		compatible = "fsl,imx8mq-ccm";
1000		reg = < 0x00 0x30380000 0x00 0x10000 >;
1001		interrupts = < 0x00 0x55 0x04 0x00 0x56 0x04 >;
1002		#clock-cells = < 0x01 >;
1003		clocks = < 0x24 0x25 0x26 0x27 0x28 0x29 0x2a >;
1004		clock-names = "ckil\0osc_25m\0osc_27m\0clk_ext1\0clk_ext2\0clk_ext3\0clk_ext4";
1005		assigned-clocks = < 0x04 0x19 0x04 0x1e >;
1006		assigned-clock-rates = < 0x2ee00000 0x2b110000 >;
1007		linux,phandle = < 0x04 >;
1008		phandle = < 0x04 >;
1009	};
1010
1011	src@30390000 {
1012		compatible = "fsl,imx8mq-src\0fsl,imx51-src\0syscon";
1013		reg = < 0x00 0x30390000 0x00 0x10000 >;
1014		interrupts = < 0x00 0x59 0x04 >;
1015		#reset-cells = < 0x01 >;
1016		linux,phandle = < 0x12 >;
1017		phandle = < 0x12 >;
1018	};
1019
1020	gpc@303a0000 {
1021		compatible = "fsl,imx8mq-gpc\0fsl,imx7d-gpc\0syscon";
1022		reg = < 0x00 0x303a0000 0x00 0x10000 >;
1023		interrupt-controller;
1024		interrupts = < 0x00 0x57 0x04 >;
1025		#interrupt-cells = < 0x03 >;
1026		interrupt-parent = < 0x0a >;
1027		linux,phandle = < 0x01 >;
1028		phandle = < 0x01 >;
1029	};
1030
1031	system-counter@3036a0000 {
1032		compatible = "nxp,sysctr-timer";
1033		reg = < 0x00 0x306a0000 0x00 0x10000 0x00 0x306b0000 0x00 0x10000 0x00 0x306c0000 0x00 0x10000 >;
1034		clock-frequency = < 0x7f2815 >;
1035		interrupts = < 0x00 0x2f 0x04 0x00 0x30 0x04 >;
1036	};
1037
1038	spdif@30810000 {
1039		compatible = "fsl,imx8mq-spdif\0fsl,imx35-spdif";
1040		reg = < 0x00 0x30810000 0x00 0x10000 >;
1041		interrupts = < 0x00 0x06 0x04 >;
1042		clocks = < 0x04 0xfa 0x04 0x02 0x04 0x86 0x04 0x00 0x04 0x00 0x04 0x00 0x04 0xfa 0x04 0x00 0x04 0x00 0x04 0x00 >;
1043		clock-names = "core\0rxtx0\0rxtx1\0rxtx2\0rxtx3\0rxtx4\0rxtx5\0rxtx6\0rxtx7\0spba";
1044		dmas = < 0x2b 0x08 0x12 0x00 0x2b 0x09 0x12 0x00 >;
1045		dma-names = "rx\0tx";
1046		status = "okay";
1047		pinctrl-names = "default";
1048		pinctrl-0 = < 0x2c >;
1049		assigned-clocks = < 0x04 0x86 >;
1050		assigned-clock-parents = < 0x04 0x1b >;
1051		assigned-clock-rates = < 0x1770000 >;
1052		linux,phandle = < 0x62 >;
1053		phandle = < 0x62 >;
1054	};
1055
1056	ecspi@30820000 {
1057		compatible = "fsl,imx8mq-ecspi\0fsl,imx51-ecspi";
1058		reg = < 0x00 0x30820000 0x00 0x10000 >;
1059		interrupts = < 0x00 0x1f 0x04 >;
1060		clocks = < 0x04 0xc1 0x04 0xc1 >;
1061		clock-names = "ipg\0per";
1062		status = "disabled";
1063		#address-cells = < 0x01 >;
1064		#size-cells = < 0x00 >;
1065	};
1066
1067	ecspi@30830000 {
1068		#address-cells = < 0x01 >;
1069		#size-cells = < 0x00 >;
1070		compatible = "fsl,imx8mq-ecspi\0fsl,imx51-ecspi";
1071		reg = < 0x00 0x30830000 0x00 0x10000 >;
1072		interrupts = < 0x00 0x20 0x04 >;
1073		clocks = < 0x04 0xc2 0x04 0xc2 >;
1074		clock-names = "ipg\0per";
1075		status = "disabled";
1076	};
1077
1078	ecspi@30840000 {
1079		#address-cells = < 0x01 >;
1080		#size-cells = < 0x00 >;
1081		compatible = "fsl,imx8mq-ecspi\0fsl,imx51-ecspi";
1082		reg = < 0x00 0x30840000 0x00 0x10000 >;
1083		interrupts = < 0x00 0x21 0x04 >;
1084		clocks = < 0x04 0xc3 0x04 0xc3 >;
1085		clock-names = "ipg\0per";
1086		status = "disabled";
1087	};
1088
1089	serial@30860000 {
1090		compatible = "fsl,imx8mq-uart\0fsl,imx6q-uart\0fsl,imx21-uart";
1091		reg = < 0x00 0x30860000 0x00 0x10000 >;
1092		interrupts = < 0x00 0x1a 0x04 >;
1093		clocks = < 0x04 0xd8 0x04 0xd8 >;
1094		clock-names = "ipg\0per";
1095		status = "okay";
1096		pinctrl-names = "default";
1097		pinctrl-0 = < 0x2d >;
1098		assigned-clocks = < 0x04 0x94 >;
1099		assigned-clock-parents = < 0x04 0x02 >;
1100	};
1101
1102	serial@30880000 {
1103		compatible = "fsl,imx8mq-uart\0fsl,imx6q-uart\0fsl,imx21-uart";
1104		reg = < 0x00 0x30880000 0x00 0x10000 >;
1105		interrupts = < 0x00 0x1c 0x04 >;
1106		clocks = < 0x04 0xda 0x04 0xda >;
1107		clock-names = "ipg\0per";
1108		dmas = < 0x2b 0x1a 0x04 0x00 0x2b 0x1b 0x04 0x00 >;
1109		dma-names = "rx\0tx";
1110		status = "okay";
1111		pinctrl-names = "default";
1112		pinctrl-0 = < 0x2e >;
1113		assigned-clocks = < 0x04 0x96 >;
1114		assigned-clock-parents = < 0x04 0x47 >;
1115		fsl,uart-has-rtscts;
1116		resets = < 0x2f >;
1117	};
1118
1119	serial@30890000 {
1120		compatible = "fsl,imx8mq-uart\0fsl,imx6q-uart\0fsl,imx21-uart";
1121		reg = < 0x00 0x30890000 0x00 0x10000 >;
1122		interrupts = < 0x00 0x1b 0x04 >;
1123		clocks = < 0x04 0xd9 0x04 0xd9 >;
1124		clock-names = "ipg\0per";
1125		dmas = < 0x2b 0x18 0x04 0x00 0x2b 0x19 0x04 0x00 >;
1126		dma-names = "rx\0tx";
1127		status = "disabled";
1128	};
1129
1130	spdif@308a0000 {
1131		compatible = "fsl,imx8mq-spdif\0fsl,imx35-spdif";
1132		reg = < 0x00 0x308a0000 0x00 0x10000 >;
1133		interrupts = < 0x00 0x0d 0x04 >;
1134		clocks = < 0x04 0xfa 0x04 0x02 0x04 0x87 0x04 0x00 0x04 0x00 0x04 0x00 0x04 0xfa 0x04 0x00 0x04 0x00 0x04 0x00 >;
1135		clock-names = "core\0rxtx0\0rxtx1\0rxtx2\0rxtx3\0rxtx4\0rxtx5\0rxtx6\0rxtx7\0spba";
1136		dmas = < 0x2b 0x10 0x12 0x00 0x2b 0x11 0x12 0x00 >;
1137		dma-names = "rx\0tx";
1138		status = "okay";
1139		assigned-clocks = < 0x04 0x87 >;
1140		assigned-clock-parents = < 0x04 0x1b >;
1141		assigned-clock-rates = < 0x1770000 >;
1142		linux,phandle = < 0x63 >;
1143		phandle = < 0x63 >;
1144	};
1145
1146	serial@30a60000 {
1147		compatible = "fsl,imx8mq-uart\0fsl,imx6q-uart\0fsl,imx21-uart";
1148		reg = < 0x00 0x30a60000 0x00 0x10000 >;
1149		interrupts = < 0x00 0x1d 0x04 >;
1150		clocks = < 0x04 0xdb 0x04 0xdb >;
1151		clock-names = "ipg\0per";
1152		dmas = < 0x2b 0x1c 0x04 0x00 0x2b 0x1d 0x04 0x00 >;
1153		dma-names = "rx\0tx";
1154		status = "disabled";
1155	};
1156
1157	mu@30aa0000 {
1158		compatible = "fsl,imx8mq-mu\0fsl,imx6sx-mu";
1159		reg = < 0x00 0x30aa0000 0x00 0x10000 >;
1160		interrupts = < 0x00 0x58 0x04 >;
1161		clocks = < 0x04 0x113 >;
1162		clock-names = "mu";
1163		status = "okay";
1164	};
1165
1166	phy@381f0040 {
1167		compatible = "fsl,imx8mq-usb-phy";
1168		#phy-cells = < 0x01 >;
1169		reg = < 0x00 0x381f0040 0x00 0x40 >;
1170		clocks = < 0x04 0xde >;
1171		clock-names = "usb_phy_root_clk";
1172		assigned-clocks = < 0x04 0x99 >;
1173		assigned-clock-parents = < 0x04 0x48 >;
1174		assigned-clock-rates = < 0x5f5e100 >;
1175		status = "okay";
1176		linux,phandle = < 0x30 >;
1177		phandle = < 0x30 >;
1178	};
1179
1180	usb@38100000 {
1181		compatible = "fsl, imx8mq-dwc3";
1182		#address-cells = < 0x02 >;
1183		#size-cells = < 0x02 >;
1184		ranges;
1185		clocks = < 0x04 0xdc >;
1186		clock-names = "usb1_ctrl_root_clk";
1187		assigned-clocks = < 0x04 0x6e 0x04 0x98 >;
1188		assigned-clock-parents = < 0x04 0x56 0x04 0x48 >;
1189		assigned-clock-rates = < 0x1dcd6500 0x5f5e100 >;
1190		status = "okay";
1191
1192		dwc3 {
1193			compatible = "snps,dwc3";
1194			reg = < 0x00 0x38100000 0x00 0x10000 >;
1195			interrupts = < 0x00 0x28 0x04 >;
1196			phys = < 0x30 0x00 0x30 0x01 >;
1197			phy-names = "usb2-phy\0usb3-phy";
1198			power-domains = < 0x31 >;
1199			snps,power-down-scale = < 0x02 >;
1200			usb3-resume-missing-cas;
1201			usb3-lpm-capable;
1202			snps,has-lpm-erratum;
1203			snps,lpm-nyet-threshold = < 0x0f >;
1204			status = "okay";
1205			extcon = < 0x32 >;
1206			dr_mode = "otg";
1207			hnp-disable;
1208			srp-disable;
1209			adp-disable;
1210		};
1211	};
1212
1213	phy@382f0040 {
1214		compatible = "fsl,imx8mq-usb-phy";
1215		#phy-cells = < 0x01 >;
1216		reg = < 0x00 0x382f0040 0x00 0x40 >;
1217		clocks = < 0x04 0xdf >;
1218		clock-names = "usb_phy_root_clk";
1219		assigned-clocks = < 0x04 0x99 >;
1220		assigned-clock-parents = < 0x04 0x48 >;
1221		assigned-clock-rates = < 0x5f5e100 >;
1222		status = "okay";
1223		linux,phandle = < 0x33 >;
1224		phandle = < 0x33 >;
1225	};
1226
1227	usb@38200000 {
1228		compatible = "fsl, imx8mq-dwc3";
1229		#address-cells = < 0x02 >;
1230		#size-cells = < 0x02 >;
1231		ranges;
1232		clocks = < 0x04 0xdd >;
1233		clock-names = "usb2_ctrl_root_clk";
1234		assigned-clocks = < 0x04 0x6e 0x04 0x98 >;
1235		assigned-clock-parents = < 0x04 0x56 0x04 0x48 >;
1236		assigned-clock-rates = < 0x1dcd6500 0x5f5e100 >;
1237		status = "okay";
1238
1239		dwc3 {
1240			compatible = "snps,dwc3";
1241			reg = < 0x00 0x38200000 0x00 0x10000 >;
1242			interrupts = < 0x00 0x29 0x04 >;
1243			phys = < 0x33 0x00 0x33 0x01 >;
1244			phy-names = "usb2-phy\0usb3-phy";
1245			power-domains = < 0x34 >;
1246			snps,power-down-scale = < 0x02 >;
1247			usb3-resume-missing-cas;
1248			usb3-lpm-capable;
1249			status = "okay";
1250			dr_mode = "host";
1251		};
1252	};
1253
1254	usdhc@30b40000 {
1255		compatible = "fsl,imx8mq-usdhc\0fsl,imx7d-usdhc";
1256		reg = < 0x00 0x30b40000 0x00 0x10000 >;
1257		interrupts = < 0x00 0x16 0x04 >;
1258		clocks = < 0x04 0x00 0x04 0x69 0x04 0xe0 >;
1259		clock-names = "ipg\0ahb\0per";
1260		assigned-clocks = < 0x04 0x8d >;
1261		assigned-clock-rates = < 0x17d78400 >;
1262		fsl,tuning-start-tap = < 0x14 >;
1263		fsl,tuning-step = < 0x02 >;
1264		fsl,strobe-dll-delay-target = < 0x05 >;
1265		bus-width = < 0x08 >;
1266		status = "okay";
1267		pinctrl-names = "default\0state_100mhz\0state_200mhz";
1268		pinctrl-0 = < 0x35 >;
1269		pinctrl-1 = < 0x36 >;
1270		pinctrl-2 = < 0x37 >;
1271		non-removable;
1272	};
1273
1274	usdhc@30b50000 {
1275		compatible = "fsl,imx8mq-usdhc\0fsl,imx7d-usdhc";
1276		reg = < 0x00 0x30b50000 0x00 0x10000 >;
1277		interrupts = < 0x00 0x17 0x04 >;
1278		clocks = < 0x04 0x00 0x04 0x69 0x04 0xe1 >;
1279		clock-names = "ipg\0ahb\0per";
1280		fsl,tuning-start-tap = < 0x14 >;
1281		fsl,tuning-step = < 0x02 >;
1282		bus-width = < 0x04 >;
1283		status = "okay";
1284		pinctrl-names = "default\0state_100mhz\0state_200mhz";
1285		pinctrl-0 = < 0x38 0x39 >;
1286		pinctrl-1 = < 0x3a 0x39 >;
1287		pinctrl-2 = < 0x3b 0x39 >;
1288		cd-gpios = < 0x3c 0x0c 0x01 >;
1289		vmmc-supply = < 0x3d >;
1290	};
1291
1292	sai@30010000 {
1293		compatible = "fsl,imx8mq-sai\0fsl,imx6sx-sai";
1294		reg = < 0x00 0x30010000 0x00 0x10000 >;
1295		interrupts = < 0x00 0x5f 0x04 >;
1296		clocks = < 0x04 0xfc 0x04 0x00 0x04 0xd2 0x04 0x00 0x04 0x00 0x04 0x1b 0x04 0x20 >;
1297		clock-names = "bus\0mclk0\0mclk1\0mclk2\0mclk3\0pll8k\0pll11k";
1298		dmas = < 0x3e 0x08 0x1a 0x00 0x3e 0x09 0x1a 0x00 >;
1299		dma-names = "rx\0tx";
1300		fsl,dataline = < 0x00 0xff 0xff >;
1301		status = "okay";
1302		pinctrl-names = "default\0pcm_b2m\0dsd";
1303		pinctrl-0 = < 0x3f >;
1304		pinctrl-1 = < 0x40 >;
1305		pinctrl-2 = < 0x41 >;
1306		assigned-clocks = < 0x04 0x80 >;
1307		assigned-clock-parents = < 0x04 0x1b >;
1308		assigned-clock-rates = < 0x2ee0000 >;
1309		fsl,sai-multi-lane;
1310		fsl,dataline,dsd = < 0x00 0xff 0xff 0x02 0xff 0x11 >;
1311		linux,phandle = < 0x64 >;
1312		phandle = < 0x64 >;
1313	};
1314
1315	sai@30030000 {
1316		compatible = "fsl,imx8mq-sai\0fsl,imx6sx-sai";
1317		reg = < 0x00 0x30030000 0x00 0x10000 >;
1318		interrupts = < 0x00 0x5a 0x04 >;
1319		clocks = < 0x04 0x101 0x04 0x00 0x04 0xd7 0x04 0x00 0x04 0x00 >;
1320		clock-names = "bus\0mclk0\0mclk1\0mclk2\0mclk3";
1321		dmas = < 0x3e 0x04 0x18 0x00 0x3e 0x05 0x18 0x00 >;
1322		dma-names = "rx\0tx";
1323		fsl,shared-interrupt;
1324		status = "disabled";
1325	};
1326
1327	sai@30040000 {
1328		compatible = "fsl,imx8mq-sai\0fsl,imx6sx-sai";
1329		reg = < 0x00 0x30040000 0x00 0x10000 >;
1330		interrupts = < 0x00 0x5a 0x04 >;
1331		clocks = < 0x04 0x100 0x04 0x00 0x04 0xd6 0x04 0x00 0x04 0x00 0x04 0x1b 0x04 0x20 >;
1332		clock-names = "bus\0mclk0\0mclk1\0mclk2\0mclk3\0pll8k\0pll11k";
1333		dmas = < 0x3e 0x02 0x18 0x00 0x3e 0x03 0x18 0x00 >;
1334		dma-names = "rx\0tx";
1335		fsl,shared-interrupt;
1336		fsl,dataline = < 0x00 0x0f 0x0f >;
1337		status = "okay";
1338		pinctrl-names = "default";
1339		pinctrl-0 = < 0x42 >;
1340		assigned-clocks = < 0x04 0x84 >;
1341		assigned-clock-parents = < 0x04 0x1b >;
1342		assigned-clock-rates = < 0x2ee0000 >;
1343		fsl,sai-asynchronous;
1344		linux,phandle = < 0x67 >;
1345		phandle = < 0x67 >;
1346	};
1347
1348	sai@30050000 {
1349		compatible = "fsl,imx8mq-sai\0fsl,imx6sx-sai";
1350		reg = < 0x00 0x30050000 0x00 0x10000 >;
1351		interrupts = < 0x00 0x64 0x04 >;
1352		clocks = < 0x04 0xff 0x04 0x00 0x04 0xd5 0x04 0x00 0x04 0x00 0x04 0x1b 0x04 0x20 >;
1353		clock-names = "bus\0mclk0\0mclk1\0mclk2\0mclk3\0pll8k\0pll11k";
1354		dmas = < 0x3e 0x00 0x18 0x00 0x3e 0x01 0x18 0x00 >;
1355		dma-names = "rx\0tx";
1356		fsl,dataline = < 0x00 0x00 0x0f >;
1357		status = "okay";
1358		assigned-clocks = < 0x04 0x83 >;
1359		assigned-clock-parents = < 0x04 0x1b >;
1360		assigned-clock-rates = < 0x1770000 >;
1361		linux,phandle = < 0x61 >;
1362		phandle = < 0x61 >;
1363	};
1364
1365	sai@308b0000 {
1366		compatible = "fsl,imx8mq-sai\0fsl,imx6sx-sai";
1367		reg = < 0x00 0x308b0000 0x00 0x10000 >;
1368		interrupts = < 0x00 0x60 0x04 >;
1369		clocks = < 0x04 0xfd 0x04 0x00 0x04 0xd3 0x04 0x00 0x04 0x00 >;
1370		clock-names = "bus\0mclk0\0mclk1\0mclk2\0mclk3";
1371		dmas = < 0x2b 0x0a 0x18 0x00 0x2b 0x0b 0x18 0x00 >;
1372		dma-names = "rx\0tx";
1373		status = "okay";
1374		pinctrl-names = "default";
1375		pinctrl-0 = < 0x43 >;
1376		assigned-clocks = < 0x04 0x81 >;
1377		assigned-clock-parents = < 0x04 0x1b >;
1378		assigned-clock-rates = < 0x1770000 >;
1379		linux,phandle = < 0x5f >;
1380		phandle = < 0x5f >;
1381	};
1382
1383	sai@308c0000 {
1384		compatible = "fsl,imx8mq-sai\0fsl,imx6sx-sai";
1385		reg = < 0x00 0x308c0000 0x00 0x10000 >;
1386		interrupts = < 0x00 0x32 0x04 >;
1387		clocks = < 0x04 0xfe 0x04 0x00 0x04 0xd4 0x04 0x00 0x04 0x00 >;
1388		clock-names = "bus\0mclk0\0mclk1\0mclk2\0mclk3";
1389		dmas = < 0x2b 0x0c 0x18 0x00 0x2b 0x0d 0x18 0x00 >;
1390		dma-names = "rx\0tx";
1391		status = "disabled";
1392	};
1393
1394	sdma@30bd0000 {
1395		compatible = "fsl,imx8mq-sdma\0fsl,imx7d-sdma";
1396		reg = < 0x00 0x30bd0000 0x00 0x10000 >;
1397		interrupts = < 0x00 0x02 0x04 >;
1398		clocks = < 0x04 0xf1 0x04 0xf1 >;
1399		clock-names = "ipg\0ahb";
1400		#dma-cells = < 0x03 >;
1401		fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
1402		status = "okay";
1403		linux,phandle = < 0x2b >;
1404		phandle = < 0x2b >;
1405	};
1406
1407	sdma@302c0000 {
1408		compatible = "fsl,imx8mq-sdma\0fsl,imx7d-sdma";
1409		reg = < 0x00 0x302c0000 0x00 0x10000 >;
1410		interrupts = < 0x00 0x67 0x04 >;
1411		clocks = < 0x04 0xf2 0x04 0xf2 >;
1412		clock-names = "ipg\0ahb";
1413		#dma-cells = < 0x03 >;
1414		fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
1415		fsl,ratio-1-1;
1416		status = "okay";
1417		linux,phandle = < 0x3e >;
1418		phandle = < 0x3e >;
1419	};
1420
1421	ethernet@30be0000 {
1422		compatible = "fsl,imx8mq-fec\0fsl,imx6sx-fec";
1423		reg = < 0x00 0x30be0000 0x00 0x10000 >;
1424		interrupts = < 0x00 0x76 0x04 0x00 0x77 0x04 0x00 0x78 0x04 >;
1425		clocks = < 0x04 0xc4 0x04 0xc4 0x04 0x89 0x04 0x88 0x04 0x8a >;
1426		clock-names = "ipg\0ahb\0ptp\0enet_clk_ref\0enet_out";
1427		assigned-clocks = < 0x04 0x68 0x04 0x89 0x04 0x88 0x04 0x89 >;
1428		assigned-clock-parents = < 0x04 0x4c 0x04 0x50 0x04 0x51 >;
1429		assigned-clock-rates = < 0x00 0x00 0x7735940 0x5f5e100 >;
1430		stop-mode = < 0x13 0x10 0x03 >;
1431		fsl,num-tx-queues = < 0x03 >;
1432		fsl,num-rx-queues = < 0x03 >;
1433		fsl,wakeup_irq = < 0x02 >;
1434		status = "okay";
1435		pinctrl-names = "default";
1436		pinctrl-0 = < 0x44 >;
1437		phy-mode = "rgmii-id";
1438		phy-handle = < 0x45 >;
1439		fsl,magic-packet;
1440
1441		mdio {
1442			#address-cells = < 0x01 >;
1443			#size-cells = < 0x00 >;
1444
1445			ethernet-phy@0 {
1446				compatible = "ethernet-phy-ieee802.3-c22";
1447				reg = < 0x00 >;
1448				at803x,led-act-blind-workaround;
1449				at803x,eee-disabled;
1450				linux,phandle = < 0x45 >;
1451				phandle = < 0x45 >;
1452			};
1453		};
1454	};
1455
1456	gpu@38000000 {
1457		compatible = "fsl,imx8mq-gpu\0fsl,imx6q-gpu";
1458		reg = < 0x00 0x38000000 0x00 0x40000 0x00 0x40000000 0x00 0xc0000000 0x00 0x00 0x00 0x10000000 >;
1459		reg-names = "iobase_3d\0phys_baseaddr\0contiguous_mem";
1460		interrupts = < 0x00 0x03 0x04 >;
1461		interrupt-names = "irq_3d";
1462		clocks = < 0x04 0xe5 0x04 0x66 0x04 0x6f 0x04 0x70 >;
1463		clock-names = "gpu3d_clk\0gpu3d_shader_clk\0gpu3d_axi_clk\0gpu3d_ahb_clk";
1464		assigned-clocks = < 0x04 0x61 0x04 0x64 0x04 0x6f 0x04 0x70 >;
1465		assigned-clock-parents = < 0x04 0x11 0x04 0x11 0x04 0x11 0x04 0x11 >;
1466		assigned-clock-rates = < 0x2faf0800 0x2faf0800 0x2faf0800 0x2faf0800 >;
1467		power-domains = < 0x46 >;
1468		depth-compression = < 0x00 >;
1469		status = "okay";
1470	};
1471
1472	imx_ion {
1473		compatible = "fsl,mxc-ion";
1474		fsl,heap-id = < 0x00 >;
1475	};
1476
1477	i2c@30a20000 {
1478		#address-cells = < 0x01 >;
1479		#size-cells = < 0x00 >;
1480		compatible = "fsl,imx21-i2c";
1481		reg = < 0x00 0x30a20000 0x00 0x10000 >;
1482		interrupts = < 0x00 0x23 0x04 >;
1483		clocks = < 0x04 0xc6 >;
1484		status = "okay";
1485		clock-frequency = < 0x61a80 >;
1486		pinctrl-names = "default";
1487		pinctrl-0 = < 0x47 >;
1488
1489		pfuze100@08 {
1490			compatible = "fsl,pfuze100";
1491			reg = < 0x08 >;
1492
1493			regulators {
1494
1495				sw1ab {
1496					regulator-min-microvolt = < 0x493e0 >;
1497					regulator-max-microvolt = < 0x1c9c38 >;
1498					linux,phandle = < 0x0b >;
1499					phandle = < 0x0b >;
1500				};
1501
1502				sw1c {
1503					regulator-min-microvolt = < 0x493e0 >;
1504					regulator-max-microvolt = < 0x1c9c38 >;
1505					linux,phandle = < 0x0c >;
1506					phandle = < 0x0c >;
1507				};
1508
1509				sw2 {
1510					regulator-min-microvolt = < 0xc3500 >;
1511					regulator-max-microvolt = < 0x325aa0 >;
1512					regulator-always-on;
1513				};
1514
1515				sw3ab {
1516					regulator-min-microvolt = < 0x61a80 >;
1517					regulator-max-microvolt = < 0x1e22d8 >;
1518					regulator-always-on;
1519				};
1520
1521				sw4 {
1522					regulator-min-microvolt = < 0xc3500 >;
1523					regulator-max-microvolt = < 0x325aa0 >;
1524					regulator-always-on;
1525				};
1526
1527				swbst {
1528					regulator-min-microvolt = < 0x4c4b40 >;
1529					regulator-max-microvolt = < 0x4e9530 >;
1530				};
1531
1532				vsnvs {
1533					regulator-min-microvolt = < 0xf4240 >;
1534					regulator-max-microvolt = < 0x2dc6c0 >;
1535					regulator-always-on;
1536				};
1537
1538				vrefddr {
1539					regulator-always-on;
1540				};
1541
1542				vgen1 {
1543					regulator-min-microvolt = < 0xc3500 >;
1544					regulator-max-microvolt = < 0x17a6b0 >;
1545				};
1546
1547				vgen2 {
1548					regulator-min-microvolt = < 0xc3500 >;
1549					regulator-max-microvolt = < 0x17a6b0 >;
1550					regulator-always-on;
1551				};
1552
1553				vgen3 {
1554					regulator-min-microvolt = < 0x1b7740 >;
1555					regulator-max-microvolt = < 0x325aa0 >;
1556					regulator-always-on;
1557				};
1558
1559				vgen4 {
1560					regulator-min-microvolt = < 0x1b7740 >;
1561					regulator-max-microvolt = < 0x325aa0 >;
1562					regulator-always-on;
1563				};
1564
1565				vgen5 {
1566					regulator-min-microvolt = < 0x1b7740 >;
1567					regulator-max-microvolt = < 0x325aa0 >;
1568					regulator-always-on;
1569				};
1570
1571				vgen6 {
1572					regulator-min-microvolt = < 0x1b7740 >;
1573					regulator-max-microvolt = < 0x325aa0 >;
1574				};
1575			};
1576		};
1577
1578		ptn5110@50 {
1579			compatible = "usb,tcpci";
1580			pinctrl-names = "default";
1581			pinctrl-0 = < 0x48 >;
1582			reg = < 0x50 >;
1583			interrupt-parent = < 0x49 >;
1584			interrupts = < 0x03 0x08 >;
1585			ss-sel-gpios = < 0x49 0x0f 0x00 >;
1586			src-pdos = < 0x380190c8 >;
1587			snk-pdos = < 0x380190c8 0x3802d0c8 >;
1588			max-snk-mv = < 0x2328 >;
1589			max-snk-ma = < 0x7d0 >;
1590			op-snk-mw = < 0x2328 >;
1591			max-snk-mw = < 0x4650 >;
1592			port-type = "drp";
1593			default-role = "sink";
1594			linux,phandle = < 0x32 >;
1595			phandle = < 0x32 >;
1596		};
1597
1598		ov5640_mipi2@3c {
1599			compatible = "ovti,ov5640_mipi";
1600			reg = < 0x3c >;
1601			status = "okay";
1602			pinctrl-names = "default";
1603			pinctrl-0 = < 0x4a 0x4b >;
1604			clocks = < 0x04 0x115 >;
1605			clock-names = "csi_mclk";
1606			assigned-clocks = < 0x04 0x115 >;
1607			assigned-clock-parents = < 0x04 0x53 >;
1608			assigned-clock-rates = < 0x1312d00 >;
1609			csi_id = < 0x01 >;
1610			pwn-gpios = < 0x4c 0x05 0x00 >;
1611			mclk = < 0x1312d00 >;
1612			mclk_source = < 0x00 >;
1613
1614			port {
1615
1616				endpoint {
1617					remote-endpoint = < 0x4d >;
1618					linux,phandle = < 0x17 >;
1619					phandle = < 0x17 >;
1620				};
1621			};
1622		};
1623	};
1624
1625	i2c@30a30000 {
1626		#address-cells = < 0x01 >;
1627		#size-cells = < 0x00 >;
1628		compatible = "fsl,imx21-i2c";
1629		reg = < 0x00 0x30a30000 0x00 0x10000 >;
1630		interrupts = < 0x00 0x24 0x04 >;
1631		clocks = < 0x04 0xc7 >;
1632		status = "okay";
1633		clock-frequency = < 0x186a0 >;
1634		pinctrl-names = "default";
1635		pinctrl-0 = < 0x4e >;
1636
1637		ov5640_mipi@3c {
1638			compatible = "ovti,ov5640_mipi";
1639			reg = < 0x3c >;
1640			status = "okay";
1641			pinctrl-names = "default";
1642			pinctrl-0 = < 0x4f >;
1643			clocks = < 0x04 0x115 >;
1644			clock-names = "csi_mclk";
1645			assigned-clocks = < 0x04 0x115 >;
1646			assigned-clock-parents = < 0x04 0x53 >;
1647			assigned-clock-rates = < 0x1312d00 >;
1648			csi_id = < 0x00 >;
1649			pwn-gpios = < 0x4c 0x03 0x00 >;
1650			mclk = < 0x1312d00 >;
1651			mclk_source = < 0x00 >;
1652
1653			port {
1654
1655				endpoint {
1656					remote-endpoint = < 0x50 >;
1657					linux,phandle = < 0x14 >;
1658					phandle = < 0x14 >;
1659				};
1660			};
1661		};
1662	};
1663
1664	i2c@30a40000 {
1665		#address-cells = < 0x01 >;
1666		#size-cells = < 0x00 >;
1667		compatible = "fsl,imx21-i2c";
1668		reg = < 0x00 0x30a40000 0x00 0x10000 >;
1669		interrupts = < 0x00 0x25 0x04 >;
1670		clocks = < 0x04 0xc8 >;
1671		status = "okay";
1672		clock-frequency = < 0x186a0 >;
1673		pinctrl-names = "default";
1674		pinctrl-0 = < 0x51 >;
1675
1676		ak4458@10 {
1677			compatible = "asahi-kasei,ak4458";
1678			reg = < 0x10 >;
1679			linux,phandle = < 0x65 >;
1680			phandle = < 0x65 >;
1681		};
1682
1683		ak4458@12 {
1684			compatible = "asahi-kasei,ak4458";
1685			reg = < 0x12 >;
1686			linux,phandle = < 0x66 >;
1687			phandle = < 0x66 >;
1688		};
1689
1690		ak5558@13 {
1691			compatible = "asahi-kasei,ak5558";
1692			reg = < 0x13 >;
1693			ak5558,pdn-gpio = < 0x49 0x11 0x00 >;
1694			linux,phandle = < 0x68 >;
1695			phandle = < 0x68 >;
1696		};
1697
1698		ak4497@11 {
1699			compatible = "asahi-kasei,ak4497";
1700			reg = < 0x11 >;
1701			ak4497,pdn-gpio = < 0x49 0x10 0x00 >;
1702			linux,phandle = < 0x69 >;
1703			phandle = < 0x69 >;
1704		};
1705
1706		synaptics_dsx_ts@20 {
1707			compatible = "synaptics_dsx";
1708			reg = < 0x20 >;
1709			pinctrl-names = "default";
1710			pinctrl-0 = < 0x52 >;
1711			interrupt-parent = < 0x53 >;
1712			interrupts = < 0x07 0x08 >;
1713			synaptics,diagonal-rotation;
1714			status = "disabled";
1715		};
1716
1717		adv7535@3d {
1718			compatible = "adi,adv7533";
1719			reg = < 0x3d >;
1720			adi,addr-cec = < 0x3b >;
1721			adi,dsi-lanes = < 0x04 >;
1722			pinctrl-0 = < 0x52 >;
1723			interrupt-parent = < 0x53 >;
1724			interrupts = < 0x07 0x08 >;
1725			status = "disabled";
1726
1727			port {
1728
1729				endpoint {
1730					remote-endpoint = < 0x54 >;
1731					linux,phandle = < 0x1f >;
1732					phandle = < 0x1f >;
1733				};
1734			};
1735		};
1736	};
1737
1738	i2c@30a50000 {
1739		#address-cells = < 0x01 >;
1740		#size-cells = < 0x00 >;
1741		compatible = "fsl,imx21-i2c";
1742		reg = < 0x00 0x30a50000 0x00 0x10000 >;
1743		interrupts = < 0x00 0x26 0x04 >;
1744		clocks = < 0x04 0xc9 >;
1745		status = "disabled";
1746	};
1747
1748	vpu@38300000 {
1749		compatible = "nxp,imx8mq-hantro";
1750		reg = < 0x00 0x38300000 0x00 0x200000 >;
1751		reg-names = "regs_hantro";
1752		interrupts = < 0x00 0x07 0x04 0x00 0x08 0x04 >;
1753		interrupt-names = "irq_hantro_g1\0irq_hantro_g2";
1754		clocks = < 0x04 0xf3 0x04 0xf4 0x04 0xed >;
1755		clock-names = "clk_hantro_g1\0clk_hantro_g2\0clk_hantro_bus";
1756		assigned-clocks = < 0x04 0x77 0x04 0x78 0x04 0x6a >;
1757		assigned-clock-parents = < 0x04 0x16 0x04 0x16 0x04 0x4e >;
1758		assigned-clock-rates = < 0x23c34600 0x23c34600 0x2faf0800 >;
1759		power-domains = < 0x55 >;
1760		regulator-supply = < 0x0c >;
1761		status = "okay";
1762	};
1763
1764	wdog@30280000 {
1765		compatible = "fsl,imx21-wdt";
1766		reg = < 0x00 0x30280000 0x00 0x10000 >;
1767		interrupts = < 0x00 0x4e 0x04 >;
1768		clocks = < 0x04 0xe2 >;
1769		status = "okay";
1770		pinctrl-names = "default";
1771		pinctrl-0 = < 0x56 >;
1772		fsl,ext-reset-output;
1773	};
1774
1775	wdog@30290000 {
1776		compatible = "fsl,imx21-wdt";
1777		reg = < 0x00 0x30290000 0x00 0x10000 >;
1778		interrupts = < 0x00 0x4f 0x04 >;
1779		clocks = < 0x04 0xe3 >;
1780		status = "disabled";
1781	};
1782
1783	wdog@302a0000 {
1784		compatible = "fsl,imx21-wdt";
1785		reg = < 0x00 0x302a0000 0x00 0x10000 >;
1786		interrupts = < 0x00 0x0a 0x04 >;
1787		clocks = < 0x04 0xe4 >;
1788		status = "disabled";
1789	};
1790
1791	dma_cap {
1792		compatible = "dma-capability";
1793		only-dma-mask32 = < 0x01 >;
1794	};
1795
1796	qspi@30bb0000 {
1797		#address-cells = < 0x01 >;
1798		#size-cells = < 0x00 >;
1799		compatible = "fsl,imx7d-qspi";
1800		reg = < 0x00 0x30bb0000 0x00 0x10000 0x00 0x8000000 0x00 0x10000000 >;
1801		reg-names = "QuadSPI\0QuadSPI-memory";
1802		interrupts = < 0x00 0x6b 0x04 >;
1803		clocks = < 0x04 0xd1 0x04 0xd1 >;
1804		clock-names = "qspi_en\0qspi";
1805		status = "okay";
1806		pinctrl-names = "default";
1807		pinctrl-0 = < 0x57 >;
1808
1809		n25q256a@0 {
1810			reg = < 0x00 >;
1811			#address-cells = < 0x01 >;
1812			#size-cells = < 0x01 >;
1813			compatible = "micron,n25q256a";
1814			spi-max-frequency = < 0x1ba8140 >;
1815			spi-nor,ddr-quad-read-dummy = < 0x06 >;
1816		};
1817	};
1818
1819	pcie@0x33800000 {
1820		compatible = "fsl,imx8mq-pcie\0snps,dw-pcie";
1821		reg = < 0x00 0x33800000 0x00 0x400000 0x00 0x1ff00000 0x00 0x80000 >;
1822		reg-names = "dbi\0config";
1823		reserved-region = < 0x58 >;
1824		#address-cells = < 0x03 >;
1825		#size-cells = < 0x02 >;
1826		device_type = "pci";
1827		ranges = < 0x81000000 0x00 0x00 0x00 0x1ff80000 0x00 0x10000 0x82000000 0x00 0x18000000 0x00 0x18000000 0x00 0x7f00000 >;
1828		num-lanes = < 0x01 >;
1829		interrupts = < 0x00 0x7a 0x04 0x00 0x7f 0x04 >;
1830		interrupt-names = "msi";
1831		#interrupt-cells = < 0x01 >;
1832		interrupt-map-mask = < 0x00 0x00 0x00 0x07 >;
1833		interrupt-map = < 0x00 0x00 0x00 0x01 0x0a 0x00 0x7d 0x04 0x00 0x00 0x00 0x02 0x0a 0x00 0x7c 0x04 0x00 0x00 0x00 0x03 0x0a 0x00 0x7b 0x04 0x00 0x00 0x00 0x04 0x0a 0x00 0x7a 0x04 >;
1834		clocks = < 0x04 0xcb 0x04 0x7d 0x04 0x7c >;
1835		clock-names = "pcie\0pcie_bus\0pcie_phy";
1836		fsl,max-link-speed = < 0x02 >;
1837		ctrl-id = < 0x00 >;
1838		power-domains = < 0x59 >;
1839		status = "okay";
1840		pinctrl-names = "default";
1841		pinctrl-0 = < 0x5a >;
1842		disable-gpio = < 0x53 0x1d 0x01 >;
1843		reset-gpio = < 0x53 0x1c 0x01 >;
1844		ext_osc = < 0x01 >;
1845		hard-wired = < 0x01 >;
1846	};
1847
1848	pcie@0x33c00000 {
1849		compatible = "fsl,imx8mq-pcie\0snps,dw-pcie";
1850		reg = < 0x00 0x33c00000 0x00 0x400000 0x00 0x27f00000 0x00 0x80000 >;
1851		reg-names = "dbi\0config";
1852		reserved-region = < 0x58 >;
1853		#address-cells = < 0x03 >;
1854		#size-cells = < 0x02 >;
1855		device_type = "pci";
1856		ranges = < 0x81000000 0x00 0x00 0x00 0x27f80000 0x00 0x10000 0x82000000 0x00 0x20000000 0x00 0x20000000 0x00 0x7f00000 >;
1857		num-lanes = < 0x01 >;
1858		interrupts = < 0x00 0x4a 0x04 0x00 0x50 0x04 >;
1859		interrupt-names = "msi";
1860		#interrupt-cells = < 0x01 >;
1861		interrupt-map-mask = < 0x00 0x00 0x00 0x07 >;
1862		interrupt-map = < 0x00 0x00 0x00 0x01 0x0a 0x00 0x4d 0x04 0x00 0x00 0x00 0x02 0x0a 0x00 0x4c 0x04 0x00 0x00 0x00 0x03 0x0a 0x00 0x4b 0x04 0x00 0x00 0x00 0x04 0x0a 0x00 0x4a 0x04 >;
1863		clocks = < 0x04 0xcc 0x04 0xaf 0x04 0xae >;
1864		clock-names = "pcie\0pcie_bus\0pcie_phy";
1865		fsl,max-link-speed = < 0x02 >;
1866		ctrl-id = < 0x01 >;
1867		power-domains = < 0x5b >;
1868		status = "okay";
1869		pinctrl-names = "default";
1870		pinctrl-0 = < 0x5c >;
1871		disable-gpio = < 0x53 0x0a 0x01 >;
1872		reset-gpio = < 0x53 0x0c 0x01 >;
1873		ext_osc = < 0x01 >;
1874	};
1875
1876	ddr_pmu@3d800000 {
1877		compatible = "fsl,imx8-ddr-pmu";
1878		reg = < 0x00 0x3d800000 0x00 0x400000 >;
1879		interrupts = < 0x00 0x62 0x04 >;
1880	};
1881
1882	imx_rpmsg {
1883		compatible = "fsl,rpmsg-bus\0simple-bus";
1884		#address-cells = < 0x02 >;
1885		#size-cells = < 0x02 >;
1886		ranges;
1887
1888		rpmsg {
1889			compatible = "fsl,imx8qm-rpmsg";
1890			status = "okay";
1891			vdev-nums = < 0x01 >;
1892			reg = < 0x00 0xb8000000 0x00 0x10000 >;
1893		};
1894	};
1895
1896	caam@30900000 {
1897		compatible = "fsl,sec-v4.0";
1898		#address-cells = < 0x01 >;
1899		#size-cells = < 0x01 >;
1900		reg = < 0x00 0x30900000 0x00 0x40000 >;
1901		ranges = < 0x00 0x00 0x30900000 0x40000 >;
1902		interrupts = < 0x00 0x5b 0x04 >;
1903
1904		jr0@1000 {
1905			compatible = "fsl,sec-v4.0-job-ring";
1906			reg = < 0x1000 0x1000 >;
1907			interrupts = < 0x00 0x69 0x04 >;
1908		};
1909
1910		jr1@2000 {
1911			compatible = "fsl,sec-v4.0-job-ring";
1912			reg = < 0x2000 0x1000 >;
1913			interrupts = < 0x00 0x6a 0x04 >;
1914		};
1915
1916		jr2@3000 {
1917			compatible = "fsl,sec-v4.0-job-ring";
1918			reg = < 0x3000 0x1000 >;
1919			interrupts = < 0x00 0x72 0x04 >;
1920		};
1921	};
1922
1923	caam-sm@00100000 {
1924		compatible = "fsl,imx6q-caam-sm";
1925		reg = < 0x00 0x100000 0x00 0x8000 >;
1926	};
1927
1928	caam-snvs@30370000 {
1929		compatible = "fsl,imx6q-caam-snvs";
1930		reg = < 0x00 0x30370000 0x00 0x10000 >;
1931	};
1932
1933	caam_secvio {
1934		compatible = "fsl,imx7d-caam-secvio\0fsl,imx6q-caam-secvio";
1935		interrupts = < 0x00 0x14 0x04 >;
1936		jtag-tamper = "disabled";
1937		watchdog-tamper = "enabled";
1938		internal-boot-tamper = "enabled";
1939		external-pin-tamper = "disabled";
1940	};
1941
1942	dma-apbh@33000000 {
1943		compatible = "fsl,imx7d-dma-apbh\0fsl,imx28-dma-apbh";
1944		reg = < 0x00 0x33000000 0x00 0x2000 >;
1945		interrupts = < 0x00 0x0c 0x04 0x00 0x0c 0x04 0x00 0x0c 0x04 0x00 0x0c 0x04 >;
1946		interrupt-names = "gpmi0\0gpmi1\0gpmi2\0gpmi3";
1947		#dma-cells = < 0x01 >;
1948		dma-channels = < 0x04 >;
1949		clocks = < 0x04 0x116 >;
1950		linux,phandle = < 0x5d >;
1951		phandle = < 0x5d >;
1952	};
1953
1954	gpmi-nand@33002000 {
1955		compatible = "fsl,imx7d-gpmi-nand";
1956		#address-cells = < 0x01 >;
1957		#size-cells = < 0x01 >;
1958		reg = < 0x00 0x33002000 0x00 0x2000 0x00 0x33004000 0x00 0x4000 >;
1959		reg-names = "gpmi-nand\0bch";
1960		interrupts = < 0x00 0x0e 0x04 >;
1961		interrupt-names = "bch";
1962		clocks = < 0x04 0xf0 0x04 0x116 >;
1963		clock-names = "gpmi_io\0gpmi_bch_apb";
1964		dmas = < 0x5d 0x00 >;
1965		dma-names = "rx-tx";
1966		status = "disabled";
1967	};
1968
1969	chosen {
1970		bootargs = "console=ttymxc0,115200 earlycon=ec_imx6q,0x30860000,115200";
1971		stdout-path = "/serial@30860000";
1972	};
1973
1974	regulators {
1975		compatible = "simple-bus";
1976		#address-cells = < 0x01 >;
1977		#size-cells = < 0x00 >;
1978
1979		usdhc2_vmmc {
1980			compatible = "regulator-fixed";
1981			regulator-name = "VSD_3V3";
1982			regulator-min-microvolt = < 0x325aa0 >;
1983			regulator-max-microvolt = < 0x325aa0 >;
1984			gpio = < 0x3c 0x13 0x00 >;
1985			off-on-delay = < 0x4e20 >;
1986			enable-active-high;
1987			linux,phandle = < 0x3d >;
1988			phandle = < 0x3d >;
1989		};
1990
1991		regulator-gpio {
1992			compatible = "regulator-gpio";
1993			pinctrl-names = "default";
1994			pinctrl-0 = < 0x5e >;
1995			regulator-min-microvolt = < 0xdbba0 >;
1996			regulator-max-microvolt = < 0xf4240 >;
1997			regulator-name = "gpio_dvfs";
1998			regulator-type = "voltage";
1999			gpios = < 0x4c 0x0d 0x00 >;
2000			states = < 0xdbba0 0x01 0xf4240 0x00 >;
2001			linux,phandle = < 0x05 >;
2002			phandle = < 0x05 >;
2003		};
2004	};
2005
2006	modem-reset {
2007		compatible = "gpio-reset";
2008		reset-gpios = < 0x49 0x05 0x01 >;
2009		reset-delay-us = < 0x7d0 >;
2010		reset-post-delay-ms = < 0x28 >;
2011		#reset-cells = < 0x00 >;
2012		linux,phandle = < 0x2f >;
2013		phandle = < 0x2f >;
2014	};
2015
2016	wm8524 {
2017		compatible = "wlf,wm8524";
2018		clocks = < 0x04 0xd3 >;
2019		clock-names = "mclk";
2020		wlf,mute-gpios = < 0x4c 0x08 0x01 >;
2021		linux,phandle = < 0x60 >;
2022		phandle = < 0x60 >;
2023	};
2024
2025	sound-wm8524 {
2026		compatible = "fsl,imx-audio-wm8524";
2027		model = "wm8524-audio";
2028		audio-cpu = < 0x5f >;
2029		audio-codec = < 0x60 >;
2030		audio-routing = "Line Out Jack\0LINEVOUTL\0Line Out Jack\0LINEVOUTR";
2031	};
2032
2033	sound-hdmi {
2034		compatible = "fsl,imx8mq-evk-cdnhdmi\0fsl,imx-audio-cdnhdmi";
2035		model = "imx-audio-hdmi";
2036		audio-cpu = < 0x61 >;
2037		protocol = < 0x01 >;
2038		hdmi-out;
2039		constraint-rate = < 0xac44 0x15888 0x2b110 0x7d00 0xbb80 0x17700 0x2ee00 >;
2040	};
2041
2042	sound-spdif {
2043		compatible = "fsl,imx-audio-spdif";
2044		model = "imx-spdif";
2045		spdif-controller = < 0x62 >;
2046		spdif-out;
2047		spdif-in;
2048	};
2049
2050	sound-hdmi-arc {
2051		compatible = "fsl,imx-audio-spdif";
2052		model = "imx-hdmi-arc";
2053		spdif-controller = < 0x63 >;
2054		spdif-in;
2055	};
2056
2057	sound-ak4458 {
2058		compatible = "fsl,imx-audio-ak4458-mq";
2059		model = "ak4458-audio";
2060		audio-cpu = < 0x64 >;
2061		audio-codec = < 0x65 0x66 >;
2062		ak4458,pdn-gpio = < 0x49 0x12 0x00 >;
2063	};
2064
2065	sound-ak5558 {
2066		compatible = "fsl,imx-audio-ak5558-mq";
2067		model = "ak5558-audio";
2068		audio-cpu = < 0x67 >;
2069		audio-codec = < 0x68 >;
2070	};
2071
2072	sound-ak4497 {
2073		compatible = "fsl,imx-audio-ak4497-mq";
2074		model = "ak4497-audio";
2075		audio-cpu = < 0x64 >;
2076		audio-codec = < 0x69 >;
2077		status = "disabled";
2078	};
2079};
2080