1/*
2 * Copyright Linux Kernel Team
3 *
4 * SPDX-License-Identifier: GPL-2.0-only
5 *
6 * This file is derived from an intermediate build stage of the
7 * Linux kernel. The licenses of all input files to this process
8 * are compatible with GPL-2.0-only.
9 */
10
11/dts-v1/;
12
13/ {
14	compatible = "fsl,imx8mm-evk\0fsl,imx8mm";
15	interrupt-parent = < 0x01 >;
16	#address-cells = < 0x02 >;
17	#size-cells = < 0x02 >;
18	model = "FSL i.MX8MM EVK board";
19
20	cpus {
21		#address-cells = < 0x02 >;
22		#size-cells = < 0x00 >;
23
24		idle-states {
25			entry-method = "psci";
26
27			cpu-sleep {
28				compatible = "arm,idle-state";
29				arm,psci-suspend-param = < 0x10033 >;
30				entry-latency-us = < 0x61a8 >;
31				exit-latency-us = < 0x2710 >;
32				min-residency-us = < 0x7530 >;
33				local-timer-stop;
34				wakeup-latency-us = < 0x3a98 >;
35				linux,phandle = < 0x03 >;
36				phandle = < 0x03 >;
37			};
38
39			cluster-sleep {
40				compatible = "arm,idle-state";
41				arm,psci-suspend-param = < 0x1000000 >;
42				entry-latency-us = < 0x3e8 >;
43				exit-latency-us = < 0x2bc >;
44				min-residency-us = < 0xa8c >;
45				wakeup-latency-us = < 0x5dc >;
46			};
47		};
48
49		cpu@0 {
50			device_type = "cpu";
51			compatible = "arm,cortex-a53";
52			reg = < 0x00 0x00 >;
53			enable-method = "psci";
54			next-level-cache = < 0x02 >;
55			cpu-idle-states = < 0x03 >;
56			operating-points = < 0x1b7740 0xf4240 0x186a00 0xdbba0 0x124f80 0xc3500 >;
57			clocks = < 0x04 0x4c 0x04 0x42 0x04 0x18 0x04 0x2c 0x04 0x38 >;
58			clock-names = "a53\0arm_a53_src\0arm_pll\0arm_pll_out\0sys1_pll_800m";
59			clock-latency = < 0xee6c >;
60			#cooling-cells = < 0x02 >;
61			arm-supply = < 0x05 >;
62			linux,phandle = < 0x06 >;
63			phandle = < 0x06 >;
64		};
65
66		cpu@1 {
67			device_type = "cpu";
68			compatible = "arm,cortex-a53";
69			reg = < 0x00 0x01 >;
70			enable-method = "psci";
71			next-level-cache = < 0x02 >;
72			cpu-idle-states = < 0x03 >;
73			linux,phandle = < 0x07 >;
74			phandle = < 0x07 >;
75		};
76
77		cpu@2 {
78			device_type = "cpu";
79			compatible = "arm,cortex-a53";
80			reg = < 0x00 0x02 >;
81			enable-method = "psci";
82			next-level-cache = < 0x02 >;
83			cpu-idle-states = < 0x03 >;
84			linux,phandle = < 0x08 >;
85			phandle = < 0x08 >;
86		};
87
88		cpu@3 {
89			device_type = "cpu";
90			compatible = "arm,cortex-a53";
91			reg = < 0x00 0x03 >;
92			enable-method = "psci";
93			next-level-cache = < 0x02 >;
94			cpu-idle-states = < 0x03 >;
95			linux,phandle = < 0x09 >;
96			phandle = < 0x09 >;
97		};
98
99		l2-cache0 {
100			compatible = "cache";
101			linux,phandle = < 0x02 >;
102			phandle = < 0x02 >;
103		};
104	};
105
106	psci {
107		compatible = "arm,psci-1.0";
108		method = "smc";
109		cpu_suspend = < 0xc4000001 >;
110		cpu_off = < 0xc4000002 >;
111		cpu_on = < 0xc4000003 >;
112	};
113
114	pmu {
115		compatible = "arm,armv8-pmuv3";
116		interrupts = < 0x01 0x07 0x3f04 >;
117		interrupt-affinity = < 0x06 0x07 0x08 0x09 >;
118		interrupt-parent = < 0x0a >;
119	};
120
121	aliases {
122		ethernet0 = "/ethernet@30be0000";
123		i2c0 = "/i2c@30a20000";
124		i2c1 = "/i2c@30a30000";
125		i2c2 = "/i2c@30a40000";
126		i2c3 = "/i2c@30a50000";
127		serial0 = "/serial@30860000";
128		serial1 = "/serial@30890000";
129		serial2 = "/serial@30880000";
130		serial3 = "/serial@30a60000";
131		spi0 = "/ecspi@30820000";
132		spi1 = "/ecspi@30830000";
133		spi2 = "/ecspi@30840000";
134		mmc0 = "/mmc@30b40000";
135		mmc1 = "/mmc@30b50000";
136		mmc2 = "/mmc@30b60000";
137		gpio0 = "/gpio@30200000";
138		gpio1 = "/gpio@30210000";
139		gpio2 = "/gpio@30220000";
140		gpio3 = "/gpio@30230000";
141		gpio4 = "/gpio@30240000";
142	};
143
144	memory@40000000 {
145		device_type = "memory";
146		reg = < 0x00 0x40000000 0x00 0x80000000 >;
147	};
148
149	reserved-memory {
150		#address-cells = < 0x02 >;
151		#size-cells = < 0x02 >;
152		ranges;
153
154		linux,cma {
155			compatible = "shared-dma-pool";
156			reusable;
157			size = < 0x00 0x28000000 >;
158			alloc-ranges = < 0x00 0x40000000 0x00 0x60000000 >;
159			linux,cma-default;
160		};
161
162		rpmsg@0xb8000000 {
163			no-map;
164			reg = < 0x00 0xb8000000 0x00 0x400000 >;
165			linux,phandle = < 0x52 >;
166			phandle = < 0x52 >;
167		};
168	};
169
170	interrupt-controller@38800000 {
171		compatible = "arm,gic-v3";
172		reg = < 0x00 0x38800000 0x00 0x10000 0x00 0x38880000 0x00 0xc0000 >;
173		#interrupt-cells = < 0x03 >;
174		interrupt-controller;
175		interrupts = < 0x01 0x09 0x04 >;
176		interrupt-parent = < 0x0a >;
177		linux,phandle = < 0x0a >;
178		phandle = < 0x0a >;
179	};
180
181	timer {
182		compatible = "arm,armv8-timer";
183		interrupts = < 0x01 0x0d 0x3f08 0x01 0x0e 0x3f08 0x01 0x0b 0x3f08 0x01 0x0a 0x3f08 >;
184		clock-frequency = < 0x7a1200 >;
185		arm,no-tick-in-suspend;
186		interrupt-parent = < 0x0a >;
187	};
188
189	busfreq {
190		compatible = "fsl,imx_busfreq";
191		clocks = < 0x04 0x29 0x04 0x90 0x04 0x91 0x04 0x10b 0x04 0x1c5 0x04 0x1c6 0x04 0x30 0x04 0x32 0x04 0x3f 0x04 0x7f 0x04 0x8a 0x04 0x51 0x04 0x02 0x04 0x38 >;
192		clock-names = "dram_pll\0dram_alt_src\0dram_apb_src\0dram_apb_pre_div\0dram_core\0dram_alt_root\0sys_pll1_40m\0sys_pll1_100m\0sys_pll2_333m\0noc_div\0ahb_div\0main_axi_src\0osc_24m\0sys_pll1_800m";
193		interrupts = < 0x00 0x4a 0x04 0x00 0x4b 0x04 0x00 0x4c 0x04 0x00 0x4d 0x04 >;
194		interrupt-name = "irq_busfreq_0\0irq_busfreq_1\0irq_busfreq_2\0irq_busfreq_3";
195	};
196
197	ddr_pmu@3d800000 {
198		compatible = "fsl,imx8m-ddr-pmu\0fsl,imx8-ddr-pmu";
199		reg = < 0x00 0x3d800000 0x00 0x400000 >;
200		interrupts = < 0x00 0x62 0x04 >;
201	};
202
203	clocks {
204		#address-cells = < 0x01 >;
205		#size-cells = < 0x00 >;
206
207		clock@0 {
208			compatible = "fixed-clock";
209			reg = < 0x00 >;
210			#clock-cells = < 0x00 >;
211			clock-frequency = < 0x8000 >;
212			clock-output-names = "osc_32k";
213			linux,phandle = < 0x14 >;
214			phandle = < 0x14 >;
215		};
216
217		clock@1 {
218			compatible = "fixed-clock";
219			reg = < 0x01 >;
220			#clock-cells = < 0x00 >;
221			clock-frequency = < 0x16e3600 >;
222			clock-output-names = "osc_24m";
223			linux,phandle = < 0x15 >;
224			phandle = < 0x15 >;
225		};
226
227		clock@2 {
228			compatible = "fixed-clock";
229			reg = < 0x03 >;
230			#clock-cells = < 0x00 >;
231			clock-frequency = < 0x7ed6b40 >;
232			clock-output-names = "clk_ext1";
233			linux,phandle = < 0x16 >;
234			phandle = < 0x16 >;
235		};
236
237		clock@3 {
238			compatible = "fixed-clock";
239			reg = < 0x04 >;
240			#clock-cells = < 0x00 >;
241			clock-frequency = < 0x7ed6b40 >;
242			clock-output-names = "clk_ext2";
243			linux,phandle = < 0x17 >;
244			phandle = < 0x17 >;
245		};
246
247		clock@4 {
248			compatible = "fixed-clock";
249			reg = < 0x05 >;
250			#clock-cells = < 0x00 >;
251			clock-frequency = < 0x7ed6b40 >;
252			clock-output-names = "clk_ext3";
253			linux,phandle = < 0x18 >;
254			phandle = < 0x18 >;
255		};
256
257		clock@5 {
258			compatible = "fixed-clock";
259			reg = < 0x06 >;
260			#clock-cells = < 0x00 >;
261			clock-frequency = < 0x7ed6b40 >;
262			clock-output-names = "clk_ext4";
263			linux,phandle = < 0x19 >;
264			phandle = < 0x19 >;
265		};
266	};
267
268	power-domains {
269		compatible = "simple-bus";
270		#address-cells = < 0x01 >;
271		#size-cells = < 0x00 >;
272
273		power-domain@0 {
274			compatible = "fsl,imx8mm-pm-domain";
275			#address-cells = < 0x01 >;
276			#size-cells = < 0x00 >;
277			domain-id = < 0x00 >;
278			#power-domain-cells = < 0x00 >;
279			domain-name = "HSIO_PD";
280			clocks = < 0x04 0x1a5 >;
281
282			power-domain@1 {
283				domain-id = < 0x01 >;
284				#power-domain-cells = < 0x00 >;
285				domain-name = "PCIE0_PD";
286				clocks = < 0x04 0x18e >;
287				linux,phandle = < 0x53 >;
288				phandle = < 0x53 >;
289			};
290
291			power-domain@2 {
292				domain-id = < 0x02 >;
293				#power-domain-cells = < 0x00 >;
294				domain-name = "USB_OTG1_PD";
295				linux,phandle = < 0x2f >;
296				phandle = < 0x2f >;
297			};
298
299			power-domain@3 {
300				domain-id = < 0x03 >;
301				#power-domain-cells = < 0x00 >;
302				domain-name = "USB_OTG2_PD";
303				linux,phandle = < 0x33 >;
304				phandle = < 0x33 >;
305			};
306		};
307
308		power-domain@4 {
309			compatible = "fsl,imx8mm-pm-domain";
310			domain-id = < 0x04 >;
311			#power-domain-cells = < 0x00 >;
312			domain-name = "GPUMIX_PD";
313			clocks = < 0x04 0x1ad 0x04 0x1be 0x04 0x1a6 0x04 0x7e >;
314			linux,phandle = < 0x59 >;
315			phandle = < 0x59 >;
316		};
317
318		power-domain@5 {
319			compatible = "fsl,imx8mm-pm-domain";
320			#address-cells = < 0x01 >;
321			#size-cells = < 0x00 >;
322			domain-id = < 0x05 >;
323			#power-domain-cells = < 0x00 >;
324			domain-name = "VPUMIX_PD";
325			clocks = < 0x04 0x1b7 >;
326
327			power-domain@6 {
328				domain-id = < 0x06 >;
329				#power-domain-cells = < 0x00 >;
330				domain-name = "VPU_G1_PD";
331				clocks = < 0x04 0x1ac >;
332				linux,phandle = < 0x57 >;
333				phandle = < 0x57 >;
334			};
335
336			power-domain@7 {
337				domain-id = < 0x07 >;
338				#power-domain-cells = < 0x00 >;
339				domain-name = "VPU_G2_PD";
340				clocks = < 0x04 0x1af >;
341				linux,phandle = < 0x58 >;
342				phandle = < 0x58 >;
343			};
344
345			power-domain@8 {
346				domain-id = < 0x08 >;
347				#power-domain-cells = < 0x00 >;
348				domain-name = "VPU_H1_PD";
349				clocks = < 0x04 0x1ae >;
350				linux,phandle = < 0x56 >;
351				phandle = < 0x56 >;
352			};
353		};
354
355		power-domain@9 {
356			compatible = "fsl,imx8mm-pm-domain";
357			#address-cells = < 0x01 >;
358			#size-cells = < 0x00 >;
359			domain-id = < 0x09 >;
360			#power-domain-cells = < 0x00 >;
361			domain-name = "DISPMIX_PD";
362			clocks = < 0x04 0x1b1 >;
363			linux,phandle = < 0x0b >;
364			phandle = < 0x0b >;
365
366			power-domain@10 {
367				domain-id = < 0x0a >;
368				#power-domain-cells = < 0x00 >;
369				domain-name = "MIPI_PD";
370				linux,phandle = < 0x0e >;
371				phandle = < 0x0e >;
372			};
373		};
374	};
375
376	csi1_bridge@32e20000 {
377		compatible = "fsl,imx8mm-csi\0fsl,imx8mq-csi\0fsl,imx6s-csi";
378		reg = < 0x00 0x32e20000 0x00 0x10000 >;
379		interrupts = < 0x00 0x10 0x04 >;
380		clocks = < 0x04 0x1b2 0x04 0x1c0 0x04 0x1b3 >;
381		clock-names = "disp-axi\0csi_mclk\0disp_dcic";
382		power-domains = < 0x0b >;
383		status = "okay";
384		fsl,mipi-mode;
385
386		port {
387
388			endpoint {
389				remote-endpoint = < 0x0c >;
390				linux,phandle = < 0x10 >;
391				phandle = < 0x10 >;
392			};
393		};
394	};
395
396	mipi_csi@32e30000 {
397		compatible = "fsl,imx8mm-mipi-csi";
398		reg = < 0x00 0x32e30000 0x00 0x1000 >;
399		interrupts = < 0x00 0x11 0x04 >;
400		clock-frequency = < 0x13d92d40 >;
401		clocks = < 0x04 0x178 0x04 0x179 0x04 0x1b2 0x04 0x1b3 >;
402		clock-names = "mipi_clk\0phy_clk\0disp_axi\0disp_apb";
403		bus-width = < 0x04 >;
404		csi-gpr = < 0x0d >;
405		power-domains = < 0x0e >;
406		status = "okay";
407		#address-cells = < 0x01 >;
408		#size-cells = < 0x00 >;
409
410		port {
411
412			endpoint1 {
413				remote-endpoint = < 0x0f >;
414				data-lanes = < 0x02 >;
415				csis-hs-settle = < 0x0d >;
416				csis-clk-settle = < 0x02 >;
417				csis-wclk;
418				linux,phandle = < 0x2c >;
419				phandle = < 0x2c >;
420			};
421
422			endpoint2 {
423				remote-endpoint = < 0x10 >;
424				linux,phandle = < 0x0c >;
425				phandle = < 0x0c >;
426			};
427		};
428	};
429
430	gpio@30200000 {
431		compatible = "fsl,imx8mm-gpio\0fsl,imx35-gpio";
432		reg = < 0x00 0x30200000 0x00 0x10000 >;
433		interrupts = < 0x00 0x40 0x04 0x00 0x41 0x04 >;
434		gpio-controller;
435		#gpio-cells = < 0x02 >;
436		interrupt-controller;
437		#interrupt-cells = < 0x02 >;
438		linux,phandle = < 0x21 >;
439		phandle = < 0x21 >;
440	};
441
442	gpio@30210000 {
443		compatible = "fsl,imx8mm-gpio\0fsl,imx35-gpio";
444		reg = < 0x00 0x30210000 0x00 0x10000 >;
445		interrupts = < 0x00 0x42 0x04 0x00 0x43 0x04 >;
446		gpio-controller;
447		#gpio-cells = < 0x02 >;
448		interrupt-controller;
449		#interrupt-cells = < 0x02 >;
450		linux,phandle = < 0x25 >;
451		phandle = < 0x25 >;
452	};
453
454	gpio@30220000 {
455		compatible = "fsl,imx8mm-gpio\0fsl,imx35-gpio";
456		reg = < 0x00 0x30220000 0x00 0x10000 >;
457		interrupts = < 0x00 0x44 0x04 0x00 0x45 0x04 >;
458		gpio-controller;
459		#gpio-cells = < 0x02 >;
460		interrupt-controller;
461		#interrupt-cells = < 0x02 >;
462		linux,phandle = < 0x5c >;
463		phandle = < 0x5c >;
464	};
465
466	gpio@30230000 {
467		compatible = "fsl,imx8mm-gpio\0fsl,imx35-gpio";
468		reg = < 0x00 0x30230000 0x00 0x10000 >;
469		interrupts = < 0x00 0x46 0x04 0x00 0x47 0x04 >;
470		gpio-controller;
471		#gpio-cells = < 0x02 >;
472		interrupt-controller;
473		#interrupt-cells = < 0x02 >;
474		linux,phandle = < 0x55 >;
475		phandle = < 0x55 >;
476	};
477
478	gpio@30240000 {
479		compatible = "fsl,imx8mm-gpio\0fsl,imx35-gpio";
480		reg = < 0x00 0x30240000 0x00 0x10000 >;
481		interrupts = < 0x00 0x48 0x04 0x00 0x49 0x04 >;
482		gpio-controller;
483		#gpio-cells = < 0x02 >;
484		interrupt-controller;
485		#interrupt-cells = < 0x02 >;
486		linux,phandle = < 0x5d >;
487		phandle = < 0x5d >;
488	};
489
490	tmu@0x30260000 {
491		compatible = "fsl,imx8mm-tmu";
492		reg = < 0x00 0x30260000 0x00 0x10000 >;
493		clocks = < 0x04 0x1b6 >;
494		interrupt = < 0x00 0x31 0x04 >;
495		#thermal-sensor-cells = < 0x00 >;
496		linux,phandle = < 0x11 >;
497		phandle = < 0x11 >;
498	};
499
500	thermal-zones {
501
502		cpu-thermal {
503			polling-delay-passive = < 0xfa >;
504			polling-delay = < 0x7d0 >;
505			thermal-sensors = < 0x11 >;
506
507			trips {
508
509				trip0 {
510					temperature = < 0x14c08 >;
511					hysteresis = < 0x7d0 >;
512					type = "passive";
513					linux,phandle = < 0x12 >;
514					phandle = < 0x12 >;
515				};
516
517				trip1 {
518					temperature = < 0x17318 >;
519					hysteresis = < 0x7d0 >;
520					type = "critical";
521				};
522			};
523
524			cooling-maps {
525
526				map0 {
527					trip = < 0x12 >;
528					cooling-device = < 0x06 0xffffffff 0xffffffff >;
529				};
530			};
531		};
532	};
533
534	pinctrl@30330000 {
535		compatible = "fsl,imx8mm-iomuxc";
536		reg = < 0x00 0x30330000 0x00 0x10000 >;
537		pinctrl-names = "default";
538
539		imx8mm-evk {
540
541			csi_pwn_grp {
542				fsl,pins = < 0x44 0x2ac 0x00 0x00 0x00 0x19 >;
543				linux,phandle = < 0x2a >;
544				phandle = < 0x2a >;
545			};
546
547			csi_rst_grp {
548				fsl,pins = < 0x40 0x2a8 0x00 0x00 0x00 0x19 0x60 0x2c8 0x00 0x06 0x00 0x59 >;
549				linux,phandle = < 0x2b >;
550				phandle = < 0x2b >;
551			};
552
553			mipi_dsi_en {
554				fsl,pins = < 0x48 0x2b0 0x00 0x00 0x00 0x16 >;
555			};
556
557			synaptics_dsx_iogrp {
558				fsl,pins = < 0x4c 0x2b4 0x00 0x00 0x00 0x19 >;
559			};
560
561			fec1grp {
562				fsl,pins = < 0x68 0x2d0 0x00 0x00 0x00 0x03 0x6c 0x2d4 0x4c0 0x00 0x01 0x03 0x70 0x2d8 0x00 0x00 0x00 0x1f 0x74 0x2dc 0x00 0x00 0x00 0x1f 0x78 0x2e0 0x00 0x00 0x00 0x1f 0x7c 0x2e4 0x00 0x00 0x00 0x1f 0x9c 0x304 0x00 0x00 0x00 0x91 0x98 0x300 0x00 0x00 0x00 0x91 0x94 0x2fc 0x00 0x00 0x00 0x91 0x90 0x2f8 0x00 0x00 0x00 0x91 0x84 0x2ec 0x00 0x00 0x00 0x1f 0x8c 0x2f4 0x00 0x00 0x00 0x91 0x88 0x2f0 0x00 0x00 0x00 0x91 0x80 0x2e8 0x00 0x00 0x00 0x1f 0x1b4 0x41c 0x00 0x05 0x00 0x19 >;
563				linux,phandle = < 0x4c >;
564				phandle = < 0x4c >;
565			};
566
567			flexspi0grp {
568				fsl,pins = < 0xf4 0x35c 0x00 0x01 0x00 0x1c2 0xf8 0x360 0x00 0x01 0x00 0x82 0x10c 0x374 0x00 0x01 0x00 0x82 0x110 0x378 0x00 0x01 0x00 0x82 0x114 0x37c 0x00 0x01 0x00 0x82 0x118 0x380 0x00 0x01 0x00 0x82 >;
569				linux,phandle = < 0x4a >;
570				phandle = < 0x4a >;
571			};
572
573			gpioledgrp {
574				fsl,pins = < 0x134 0x39c 0x00 0x05 0x00 0x19 >;
575				linux,phandle = < 0x5b >;
576				phandle = < 0x5b >;
577			};
578
579			i2c1grp {
580				fsl,pins = < 0x214 0x47c 0x00 0x00 0x00 0x400001c3 0x218 0x480 0x00 0x00 0x00 0x400001c3 >;
581				linux,phandle = < 0x1f >;
582				phandle = < 0x1f >;
583			};
584
585			i2c2grp {
586				fsl,pins = < 0x21c 0x484 0x00 0x00 0x00 0x400001c3 0x220 0x488 0x00 0x00 0x00 0x400001c3 >;
587				linux,phandle = < 0x22 >;
588				phandle = < 0x22 >;
589			};
590
591			i2c3grp {
592				fsl,pins = < 0x224 0x48c 0x00 0x00 0x00 0x400001c3 0x228 0x490 0x00 0x00 0x00 0x400001c3 >;
593				linux,phandle = < 0x27 >;
594				phandle = < 0x27 >;
595			};
596
597			pcie0grp {
598				fsl,pins = < 0x22c 0x494 0x524 0x12 0x00 0x61 0x3c 0x2a4 0x00 0x00 0x00 0x41 0x1b0 0x418 0x00 0x05 0x00 0x41 >;
599				linux,phandle = < 0x54 >;
600				phandle = < 0x54 >;
601			};
602
603			pmicirq {
604				fsl,pins = < 0x34 0x29c 0x00 0x00 0x00 0x41 >;
605				linux,phandle = < 0x20 >;
606				phandle = < 0x20 >;
607			};
608
609			typec1grp {
610				fsl,pins = < 0xcc 0x334 0x00 0x05 0x00 0x159 >;
611				linux,phandle = < 0x24 >;
612				phandle = < 0x24 >;
613			};
614
615			typec2grp {
616				fsl,pins = < 0xd0 0x338 0x00 0x05 0x00 0x159 >;
617				linux,phandle = < 0x26 >;
618				phandle = < 0x26 >;
619			};
620
621			sai1grp {
622				fsl,pins = < 0x1ac 0x414 0x00 0x00 0x00 0xd6 0x184 0x3ec 0x4cc 0x00 0x03 0xd6 0x180 0x3e8 0x4cc 0x02 0x04 0xd6 0x188 0x3f0 0x4c8 0x00 0x01 0xd6 0x18c 0x3f4 0x00 0x00 0x00 0xd6 0x190 0x3f8 0x00 0x00 0x00 0xd6 0x194 0x3fc 0x00 0x00 0x00 0xd6 0x198 0x400 0x00 0x00 0x00 0xd6 0x19c 0x404 0x00 0x00 0x00 0xd6 0x1a0 0x408 0x00 0x00 0x00 0xd6 0x1a4 0x40c 0x00 0x00 0x00 0xd6 0x1a8 0x410 0x00 0x00 0x00 0xd6 >;
623				linux,phandle = < 0x43 >;
624				phandle = < 0x43 >;
625			};
626
627			sai1grp_dsd {
628				fsl,pins = < 0x1ac 0x414 0x00 0x00 0x00 0xd6 0x184 0x3ec 0x4cc 0x00 0x03 0xd6 0x180 0x3e8 0x00 0x03 0x00 0xd6 0x188 0x3f0 0x4c8 0x00 0x01 0xd6 0x18c 0x3f4 0x00 0x00 0x00 0xd6 0x190 0x3f8 0x00 0x00 0x00 0xd6 0x194 0x3fc 0x00 0x00 0x00 0xd6 0x198 0x400 0x00 0x00 0x00 0xd6 0x19c 0x404 0x00 0x00 0x00 0xd6 0x1a0 0x408 0x00 0x00 0x00 0xd6 0x1a4 0x40c 0x00 0x00 0x00 0xd6 0x1a8 0x410 0x00 0x00 0x00 0xd6 >;
629				linux,phandle = < 0x44 >;
630				phandle = < 0x44 >;
631			};
632
633			sai3grp {
634				fsl,pins = < 0x1d8 0x440 0x00 0x00 0x00 0xd6 0x1dc 0x444 0x00 0x00 0x00 0xd6 0x1e4 0x44c 0x00 0x00 0x00 0xd6 0x1e0 0x448 0x00 0x00 0x00 0xd6 0x230 0x498 0x00 0x05 0x00 0xd6 >;
635				linux,phandle = < 0x45 >;
636				phandle = < 0x45 >;
637			};
638
639			sai5grp {
640				fsl,pins = < 0x158 0x3c0 0x52c 0x00 0x00 0xd6 0x144 0x3ac 0x4d0 0x00 0x00 0xd6 0x140 0x3a8 0x4e4 0x00 0x00 0xd6 0x148 0x3b0 0x4d4 0x00 0x00 0xd6 0x14c 0x3b4 0x4d8 0x00 0x00 0xd6 0x150 0x3b8 0x4dc 0x00 0x00 0xd6 0x154 0x3bc 0x4e0 0x00 0x00 0xd6 >;
641				linux,phandle = < 0x46 >;
642				phandle = < 0x46 >;
643			};
644
645			pdmgrp {
646				fsl,pins = < 0x158 0x3c0 0x52c 0x00 0x00 0xd6 0x144 0x3ac 0x00 0x04 0x00 0xd6 0x140 0x3a8 0x4e4 0x00 0x00 0xd6 0x148 0x3b0 0x534 0x04 0x00 0xd6 0x14c 0x3b4 0x538 0x04 0x00 0xd6 0x150 0x3b8 0x53c 0x04 0x00 0xd6 0x154 0x3bc 0x540 0x04 0x00 0xd6 >;
647				linux,phandle = < 0x47 >;
648				phandle = < 0x47 >;
649			};
650
651			spdif1grp {
652				fsl,pins = < 0x1e8 0x450 0x00 0x00 0x00 0xd6 0x1ec 0x454 0x00 0x00 0x00 0xd6 >;
653				linux,phandle = < 0x48 >;
654				phandle = < 0x48 >;
655			};
656
657			uart1grp {
658				fsl,pins = < 0x234 0x49c 0x4f4 0x00 0x00 0x140 0x238 0x4a0 0x00 0x00 0x00 0x140 0x244 0x4ac 0x00 0x01 0x00 0x140 0x248 0x4b0 0x4f0 0x01 0x01 0x140 0xb8 0x320 0x00 0x05 0x00 0x19 >;
659				linux,phandle = < 0x1b >;
660				phandle = < 0x1b >;
661			};
662
663			uart2grp {
664				fsl,pins = < 0x23c 0x4a4 0x4fc 0x00 0x00 0x140 0x240 0x4a8 0x00 0x00 0x00 0x140 >;
665				linux,phandle = < 0x1e >;
666				phandle = < 0x1e >;
667			};
668
669			uart3grp {
670				fsl,pins = < 0x1f4 0x45c 0x504 0x01 0x00 0x140 0x1f8 0x460 0x00 0x01 0x00 0x140 0x200 0x468 0x500 0x01 0x01 0x140 0x1fc 0x464 0x00 0x01 0x00 0x140 >;
671				linux,phandle = < 0x1d >;
672				phandle = < 0x1d >;
673			};
674
675			usdhc1grpgpio {
676				fsl,pins = < 0xc8 0x330 0x00 0x05 0x00 0x41 >;
677				linux,phandle = < 0x36 >;
678				phandle = < 0x36 >;
679			};
680
681			usdhc1grp {
682				fsl,pins = < 0xa0 0x308 0x00 0x00 0x00 0x190 0xa4 0x30c 0x00 0x00 0x00 0x1d0 0xa8 0x310 0x00 0x00 0x00 0x1d0 0xac 0x314 0x00 0x00 0x00 0x1d0 0xb0 0x318 0x00 0x00 0x00 0x1d0 0xb4 0x31c 0x00 0x00 0x00 0x1d0 >;
683				linux,phandle = < 0x35 >;
684				phandle = < 0x35 >;
685			};
686
687			usdhc1grp100mhz {
688				fsl,pins = < 0xa0 0x308 0x00 0x00 0x00 0x194 0xa4 0x30c 0x00 0x00 0x00 0x1d4 0xa8 0x310 0x00 0x00 0x00 0x1d4 0xac 0x314 0x00 0x00 0x00 0x1d4 0xb0 0x318 0x00 0x00 0x00 0x1d4 0xb4 0x31c 0x00 0x00 0x00 0x1d4 >;
689				linux,phandle = < 0x37 >;
690				phandle = < 0x37 >;
691			};
692
693			usdhc1grp200mhz {
694				fsl,pins = < 0xa0 0x308 0x00 0x00 0x00 0x196 0xa4 0x30c 0x00 0x00 0x00 0x1d6 0xa8 0x310 0x00 0x00 0x00 0x1d6 0xac 0x314 0x00 0x00 0x00 0x1d6 0xb0 0x318 0x00 0x00 0x00 0x1d6 0xb4 0x31c 0x00 0x00 0x00 0x1d6 >;
695				linux,phandle = < 0x38 >;
696				phandle = < 0x38 >;
697			};
698
699			usdhc2grpgpio {
700				fsl,pins = < 0x64 0x2cc 0x00 0x00 0x00 0x1c4 0xec 0x354 0x00 0x05 0x00 0x41 >;
701				linux,phandle = < 0x3b >;
702				phandle = < 0x3b >;
703			};
704
705			usdhc2grp {
706				fsl,pins = < 0xd4 0x33c 0x00 0x00 0x00 0x190 0xd8 0x340 0x00 0x00 0x00 0x1d0 0xdc 0x344 0x00 0x00 0x00 0x1d0 0xe0 0x348 0x00 0x00 0x00 0x1d0 0xe4 0x34c 0x00 0x00 0x00 0x1d0 0xe8 0x350 0x00 0x00 0x00 0x1d0 0x38 0x2a0 0x00 0x01 0x00 0x1d0 >;
707				linux,phandle = < 0x3a >;
708				phandle = < 0x3a >;
709			};
710
711			usdhc2grp100mhz {
712				fsl,pins = < 0xd4 0x33c 0x00 0x00 0x00 0x194 0xd8 0x340 0x00 0x00 0x00 0x1d4 0xdc 0x344 0x00 0x00 0x00 0x1d4 0xe0 0x348 0x00 0x00 0x00 0x1d4 0xe4 0x34c 0x00 0x00 0x00 0x1d4 0xe8 0x350 0x00 0x00 0x00 0x1d4 0x38 0x2a0 0x00 0x01 0x00 0x1d0 >;
713				linux,phandle = < 0x3c >;
714				phandle = < 0x3c >;
715			};
716
717			usdhc2grp200mhz {
718				fsl,pins = < 0xd4 0x33c 0x00 0x00 0x00 0x196 0xd8 0x340 0x00 0x00 0x00 0x1d6 0xdc 0x344 0x00 0x00 0x00 0x1d6 0xe0 0x348 0x00 0x00 0x00 0x1d6 0xe4 0x34c 0x00 0x00 0x00 0x1d6 0xe8 0x350 0x00 0x00 0x00 0x1d6 0x38 0x2a0 0x00 0x01 0x00 0x1d0 >;
719				linux,phandle = < 0x3d >;
720				phandle = < 0x3d >;
721			};
722
723			usdhc3grp {
724				fsl,pins = < 0x138 0x3a0 0x00 0x12 0x00 0x190 0x13c 0x3a4 0x00 0x02 0x00 0x1d0 0x11c 0x384 0x00 0x02 0x00 0x1d0 0x120 0x388 0x00 0x02 0x00 0x1d0 0x124 0x38c 0x00 0x02 0x00 0x1d0 0x128 0x390 0x00 0x02 0x00 0x1d0 0x130 0x398 0x00 0x02 0x00 0x1d0 0x100 0x368 0x00 0x02 0x00 0x1d0 0x104 0x36c 0x00 0x02 0x00 0x1d0 0x108 0x370 0x00 0x02 0x00 0x1d0 0xfc 0x364 0x00 0x02 0x00 0x190 >;
725				linux,phandle = < 0x3f >;
726				phandle = < 0x3f >;
727			};
728
729			usdhc3grp100mhz {
730				fsl,pins = < 0x138 0x3a0 0x00 0x12 0x00 0x194 0x13c 0x3a4 0x00 0x02 0x00 0x1d4 0x11c 0x384 0x00 0x02 0x00 0x1d4 0x120 0x388 0x00 0x02 0x00 0x1d4 0x124 0x38c 0x00 0x02 0x00 0x1d4 0x128 0x390 0x00 0x02 0x00 0x1d4 0x130 0x398 0x00 0x02 0x00 0x1d4 0x100 0x368 0x00 0x02 0x00 0x1d4 0x104 0x36c 0x00 0x02 0x00 0x1d4 0x108 0x370 0x00 0x02 0x00 0x1d4 0xfc 0x364 0x00 0x02 0x00 0x194 >;
731				linux,phandle = < 0x40 >;
732				phandle = < 0x40 >;
733			};
734
735			usdhc3grp200mhz {
736				fsl,pins = < 0x138 0x3a0 0x00 0x12 0x00 0x196 0x13c 0x3a4 0x00 0x02 0x00 0x1d6 0x11c 0x384 0x00 0x02 0x00 0x1d6 0x120 0x388 0x00 0x02 0x00 0x1d6 0x124 0x38c 0x00 0x02 0x00 0x1d6 0x128 0x390 0x00 0x02 0x00 0x1d6 0x130 0x398 0x00 0x02 0x00 0x1d6 0x100 0x368 0x00 0x02 0x00 0x1d6 0x104 0x36c 0x00 0x02 0x00 0x1d6 0x108 0x370 0x00 0x02 0x00 0x1d6 0xfc 0x364 0x00 0x02 0x00 0x196 >;
737				linux,phandle = < 0x41 >;
738				phandle = < 0x41 >;
739			};
740
741			wdoggrp {
742				fsl,pins = < 0x30 0x298 0x00 0x01 0x00 0xc6 >;
743				linux,phandle = < 0x49 >;
744				phandle = < 0x49 >;
745			};
746		};
747	};
748
749	iomuxc-gpr@30340000 {
750		compatible = "fsl,imx8mm-iomuxc-gpr\0fsl,imx7d-iomuxc-gpr\0syscon";
751		reg = < 0x00 0x30340000 0x00 0x10000 >;
752		linux,phandle = < 0x4b >;
753		phandle = < 0x4b >;
754	};
755
756	anatop@30360000 {
757		compatible = "fsl,imx8mm-anatop\0syscon\0simple-bus";
758		reg = < 0x00 0x30360000 0x00 0x10000 >;
759	};
760
761	snvs@30370000 {
762		compatible = "fsl,sec-v4.0-mon\0syscon\0simple-mfd";
763		reg = < 0x00 0x30370000 0x00 0x10000 >;
764		linux,phandle = < 0x13 >;
765		phandle = < 0x13 >;
766
767		snvs-rtc-lp {
768			compatible = "fsl,sec-v4.0-mon-rtc-lp";
769			regmap = < 0x13 >;
770			offset = < 0x34 >;
771			interrupts = < 0x00 0x13 0x04 0x00 0x14 0x04 >;
772		};
773
774		snvs-powerkey {
775			compatible = "fsl,sec-v4.0-pwrkey";
776			regmap = < 0x13 >;
777			interrupts = < 0x00 0x04 0x04 >;
778			linux,keycode = < 0x74 >;
779			wakeup-source;
780		};
781	};
782
783	clock-controller@30380000 {
784		compatible = "fsl,imx8mm-ccm";
785		reg = < 0x00 0x30380000 0x00 0x10000 >;
786		#clock-cells = < 0x01 >;
787		clocks = < 0x14 0x15 0x16 0x17 0x18 0x19 >;
788		clock-names = "osc_32k\0osc_24m\0clk_ext1\0clk_ext2\0clk_ext3\0clk_ext4";
789		assigned-clocks = < 0x04 0x12 0x04 0x13 >;
790		assigned-clock-rates = < 0x2ee00000 0x2b110000 >;
791		linux,phandle = < 0x04 >;
792		phandle = < 0x04 >;
793	};
794
795	src@30390000 {
796		compatible = "fsl,imx8mm-src\0fsl,imx8mq-src\0syscon";
797		reg = < 0x00 0x30390000 0x00 0x10000 >;
798		interrupts = < 0x00 0x59 0x04 >;
799		#reset-cells = < 0x01 >;
800	};
801
802	gpc@303a0000 {
803		compatible = "fsl,imx8mm-gpc\0fsl,imx8mq-gpc\0syscon";
804		reg = < 0x00 0x303a0000 0x00 0x10000 >;
805		interrupt-controller;
806		interrupts = < 0x00 0x57 0x04 >;
807		#interrupt-cells = < 0x03 >;
808		interrupt-parent = < 0x0a >;
809		linux,phandle = < 0x01 >;
810		phandle = < 0x01 >;
811	};
812
813	timer@306a0000 {
814		compatible = "nxp,sysctr-timer";
815		reg = < 0x00 0x306a0000 0x00 0x10000 0x00 0x306b0000 0x00 0x10000 0x00 0x306c0000 0x00 0x10000 >;
816		clock-frequency = < 0x7a1200 >;
817		interrupts = < 0x00 0x2f 0x04 0x00 0x30 0x04 >;
818	};
819
820	serial@30860000 {
821		compatible = "fsl,imx8mm-uart\0fsl,imx6q-uart\0fsl,imx21-uart";
822		reg = < 0x00 0x30860000 0x00 0x10000 >;
823		interrupts = < 0x00 0x1a 0x04 >;
824		clocks = < 0x04 0x1a1 0x04 0x1a1 >;
825		clock-names = "ipg\0per";
826		dmas = < 0x1a 0x16 0x04 0x00 0x1a 0x17 0x04 0x00 >;
827		dma-names = "rx\0tx";
828		status = "okay";
829		pinctrl-names = "default";
830		pinctrl-0 = < 0x1b >;
831		assigned-clocks = < 0x04 0xae >;
832		assigned-clock-parents = < 0x04 0x31 >;
833		fsl,uart-has-rtscts;
834		resets = < 0x1c >;
835	};
836
837	serial@30880000 {
838		compatible = "fsl,imx8mm-uart\0fsl,imx6q-uart\0fsl,imx21-uart";
839		reg = < 0x00 0x30880000 0x00 0x10000 >;
840		interrupts = < 0x00 0x1c 0x04 >;
841		clocks = < 0x04 0x1a3 0x04 0x1a3 >;
842		clock-names = "ipg\0per";
843		dmas = < 0x1a 0x1a 0x04 0x00 0x1a 0x1b 0x04 0x00 >;
844		dma-names = "rx\0tx";
845		status = "okay";
846		pinctrl-names = "default";
847		pinctrl-0 = < 0x1d >;
848		assigned-clocks = < 0x04 0xb0 >;
849		assigned-clock-parents = < 0x04 0x31 >;
850		fsl,uart-has-rtscts;
851	};
852
853	serial@30890000 {
854		compatible = "fsl,imx8mm-uart\0fsl,imx6q-uart\0fsl,imx21-uart";
855		reg = < 0x00 0x30890000 0x00 0x10000 >;
856		interrupts = < 0x00 0x1b 0x04 >;
857		clocks = < 0x04 0x1a2 0x04 0x1a2 >;
858		clock-names = "ipg\0per";
859		status = "okay";
860		pinctrl-names = "default";
861		pinctrl-0 = < 0x1e >;
862	};
863
864	i2c@30a20000 {
865		#address-cells = < 0x01 >;
866		#size-cells = < 0x00 >;
867		compatible = "fsl,imx8mm-i2c\0fsl,imx21-i2c";
868		reg = < 0x00 0x30a20000 0x00 0x10000 >;
869		interrupts = < 0x00 0x23 0x04 >;
870		clocks = < 0x04 0x189 >;
871		status = "okay";
872		clock-frequency = < 0x61a80 >;
873		pinctrl-names = "default";
874		pinctrl-0 = < 0x1f >;
875
876		bd71837@4b {
877			reg = < 0x4b >;
878			compatible = "rohm,bd71840\0rohm,bd71837";
879			pinctrl-0 = < 0x20 >;
880			gpio_intr = < 0x21 0x03 0x01 >;
881
882			gpo {
883				rohm,drv = < 0x0c >;
884			};
885
886			regulators {
887				#address-cells = < 0x01 >;
888				#size-cells = < 0x00 >;
889				bd71837,pmic-buck2-uses-i2c-dvs;
890				bd71837,pmic-buck2-dvs-voltage = < 0xf4240 0xdbba0 0x00 >;
891
892				regulator@0 {
893					reg = < 0x00 >;
894					regulator-compatible = "buck1";
895					regulator-min-microvolt = < 0xaae60 >;
896					regulator-max-microvolt = < 0x13d620 >;
897					regulator-boot-on;
898					regulator-always-on;
899					regulator-ramp-delay = < 0x4e2 >;
900				};
901
902				regulator@1 {
903					reg = < 0x01 >;
904					regulator-compatible = "buck2";
905					regulator-min-microvolt = < 0xaae60 >;
906					regulator-max-microvolt = < 0x13d620 >;
907					regulator-boot-on;
908					regulator-always-on;
909					regulator-ramp-delay = < 0x4e2 >;
910					linux,phandle = < 0x05 >;
911					phandle = < 0x05 >;
912				};
913
914				regulator@2 {
915					reg = < 0x02 >;
916					regulator-compatible = "buck3";
917					regulator-min-microvolt = < 0xaae60 >;
918					regulator-max-microvolt = < 0x13d620 >;
919				};
920
921				regulator@3 {
922					reg = < 0x03 >;
923					regulator-compatible = "buck4";
924					regulator-min-microvolt = < 0xaae60 >;
925					regulator-max-microvolt = < 0x13d620 >;
926				};
927
928				regulator@4 {
929					reg = < 0x04 >;
930					regulator-compatible = "buck5";
931					regulator-min-microvolt = < 0xaae60 >;
932					regulator-max-microvolt = < 0x149970 >;
933					regulator-boot-on;
934					regulator-always-on;
935				};
936
937				regulator@5 {
938					reg = < 0x05 >;
939					regulator-compatible = "buck6";
940					regulator-min-microvolt = < 0x2dc6c0 >;
941					regulator-max-microvolt = < 0x325aa0 >;
942					regulator-boot-on;
943					regulator-always-on;
944				};
945
946				regulator@6 {
947					reg = < 0x06 >;
948					regulator-compatible = "buck7";
949					regulator-min-microvolt = < 0x187d88 >;
950					regulator-max-microvolt = < 0x1e70f8 >;
951					regulator-boot-on;
952					regulator-always-on;
953				};
954
955				regulator@7 {
956					reg = < 0x07 >;
957					regulator-compatible = "buck8";
958					regulator-min-microvolt = < 0xc3500 >;
959					regulator-max-microvolt = < 0x155cc0 >;
960					regulator-boot-on;
961					regulator-always-on;
962				};
963
964				regulator@8 {
965					reg = < 0x08 >;
966					regulator-compatible = "ldo1";
967					regulator-min-microvolt = < 0x2dc6c0 >;
968					regulator-max-microvolt = < 0x325aa0 >;
969					regulator-boot-on;
970					regulator-always-on;
971				};
972
973				regulator@9 {
974					reg = < 0x09 >;
975					regulator-compatible = "ldo2";
976					regulator-min-microvolt = < 0xdbba0 >;
977					regulator-max-microvolt = < 0xdbba0 >;
978					regulator-boot-on;
979					regulator-always-on;
980				};
981
982				regulator@10 {
983					reg = < 0x0a >;
984					regulator-compatible = "ldo3";
985					regulator-min-microvolt = < 0x1b7740 >;
986					regulator-max-microvolt = < 0x325aa0 >;
987					regulator-boot-on;
988					regulator-always-on;
989				};
990
991				regulator@11 {
992					reg = < 0x0b >;
993					regulator-compatible = "ldo4";
994					regulator-min-microvolt = < 0xdbba0 >;
995					regulator-max-microvolt = < 0x1b7740 >;
996					regulator-boot-on;
997					regulator-always-on;
998				};
999
1000				regulator@13 {
1001					reg = < 0x0d >;
1002					regulator-compatible = "ldo6";
1003					regulator-min-microvolt = < 0xdbba0 >;
1004					regulator-max-microvolt = < 0x1b7740 >;
1005					regulator-boot-on;
1006					regulator-always-on;
1007				};
1008			};
1009		};
1010	};
1011
1012	i2c@30a30000 {
1013		#address-cells = < 0x01 >;
1014		#size-cells = < 0x00 >;
1015		compatible = "fsl,imx8mm-i2c\0fsl,imx21-i2c";
1016		reg = < 0x00 0x30a30000 0x00 0x10000 >;
1017		interrupts = < 0x00 0x24 0x04 >;
1018		clocks = < 0x04 0x18a >;
1019		status = "okay";
1020		clock-frequency = < 0x61a80 >;
1021		pinctrl-names = "default";
1022		pinctrl-0 = < 0x22 >;
1023
1024		adv7535@3d {
1025			compatible = "adi,adv7533";
1026			reg = < 0x3d >;
1027			adi,addr-cec = < 0x3b >;
1028			adi,dsi-lanes = < 0x04 >;
1029			status = "okay";
1030
1031			port {
1032
1033				endpoint {
1034					remote-endpoint = < 0x23 >;
1035					linux,phandle = < 0x50 >;
1036					phandle = < 0x50 >;
1037				};
1038			};
1039		};
1040
1041		tcpci@50 {
1042			compatible = "usb,tcpci";
1043			pinctrl-names = "default";
1044			pinctrl-0 = < 0x24 >;
1045			reg = < 0x50 >;
1046			interrupt-parent = < 0x25 >;
1047			interrupts = < 0x0b 0x08 >;
1048			src-pdos = < 0x380190c8 >;
1049			snk-pdos = < 0x380190c8 >;
1050			max-snk-mv = < 0x1388 >;
1051			max-snk-ma = < 0xbb8 >;
1052			op-snk-mw = < 0x2710 >;
1053			max-snk-mw = < 0x3a98 >;
1054			port-type = "drp";
1055			default-role = "sink";
1056			status = "okay";
1057			linux,phandle = < 0x30 >;
1058			phandle = < 0x30 >;
1059		};
1060
1061		tcpci@52 {
1062			compatible = "usb,tcpci";
1063			pinctrl-names = "default";
1064			pinctrl-0 = < 0x26 >;
1065			reg = < 0x52 >;
1066			interrupt-parent = < 0x25 >;
1067			interrupts = < 0x0c 0x08 >;
1068			src-pdos = < 0x380190c8 >;
1069			snk-pdos = < 0x380190c8 >;
1070			max-snk-mv = < 0x1388 >;
1071			max-snk-ma = < 0xbb8 >;
1072			op-snk-mw = < 0x2710 >;
1073			max-snk-mw = < 0x3a98 >;
1074			port-type = "drp";
1075			default-role = "sink";
1076			status = "okay";
1077			linux,phandle = < 0x34 >;
1078			phandle = < 0x34 >;
1079		};
1080	};
1081
1082	i2c@30a40000 {
1083		#address-cells = < 0x01 >;
1084		#size-cells = < 0x00 >;
1085		compatible = "fsl,imx8mm-i2c\0fsl,imx21-i2c";
1086		reg = < 0x00 0x30a40000 0x00 0x10000 >;
1087		interrupts = < 0x00 0x25 0x04 >;
1088		clocks = < 0x04 0x18b >;
1089		status = "okay";
1090		clock-frequency = < 0x186a0 >;
1091		pinctrl-names = "default";
1092		pinctrl-0 = < 0x27 >;
1093
1094		gpio@20 {
1095			compatible = "ti,tca6416";
1096			reg = < 0x20 >;
1097			gpio-controller;
1098			#gpio-cells = < 0x02 >;
1099			linux,phandle = < 0x29 >;
1100			phandle = < 0x29 >;
1101		};
1102
1103		ak4458@10 {
1104			compatible = "asahi-kasei,ak4458";
1105			reg = < 0x10 >;
1106			AVDD-supply = < 0x28 >;
1107			DVDD-supply = < 0x28 >;
1108			linux,phandle = < 0x61 >;
1109			phandle = < 0x61 >;
1110		};
1111
1112		ak4458@12 {
1113			compatible = "asahi-kasei,ak4458";
1114			reg = < 0x12 >;
1115			AVDD-supply = < 0x28 >;
1116			DVDD-supply = < 0x28 >;
1117			linux,phandle = < 0x62 >;
1118			phandle = < 0x62 >;
1119		};
1120
1121		ak5558@13 {
1122			compatible = "asahi-kasei,ak5558";
1123			reg = < 0x13 >;
1124			ak5558,pdn-gpio = < 0x29 0x03 0x00 >;
1125			AVDD-supply = < 0x28 >;
1126			DVDD-supply = < 0x28 >;
1127			linux,phandle = < 0x64 >;
1128			phandle = < 0x64 >;
1129		};
1130
1131		ak4497@11 {
1132			compatible = "asahi-kasei,ak4497";
1133			reg = < 0x11 >;
1134			ak4497,pdn-gpio = < 0x29 0x05 0x00 >;
1135			AVDD-supply = < 0x28 >;
1136			DVDD-supply = < 0x28 >;
1137			linux,phandle = < 0x65 >;
1138			phandle = < 0x65 >;
1139		};
1140
1141		ov5640_mipi@3c {
1142			compatible = "ovti,ov5640_mipi";
1143			reg = < 0x3c >;
1144			status = "okay";
1145			pinctrl-names = "default";
1146			pinctrl-0 = < 0x2a 0x2b >;
1147			clocks = < 0x04 0x1c4 >;
1148			clock-names = "csi_mclk";
1149			assigned-clocks = < 0x04 0x1c1 0x04 0x1c4 >;
1150			assigned-clock-parents = < 0x04 0x02 >;
1151			assigned-clock-rates = < 0x00 0x16e3600 >;
1152			csi_id = < 0x00 >;
1153			pwn-gpios = < 0x21 0x07 0x00 >;
1154			mclk = < 0x16e3600 >;
1155			mclk_source = < 0x00 >;
1156
1157			port {
1158
1159				endpoint {
1160					remote-endpoint = < 0x2c >;
1161					linux,phandle = < 0x0f >;
1162					phandle = < 0x0f >;
1163				};
1164			};
1165		};
1166	};
1167
1168	i2c@30a50000 {
1169		#address-cells = < 0x01 >;
1170		#size-cells = < 0x00 >;
1171		compatible = "fsl,imx8mm-i2c\0fsl,imx21-i2c";
1172		reg = < 0x00 0x30a50000 0x00 0x10000 >;
1173		interrupts = < 0x00 0x26 0x04 >;
1174		clocks = < 0x04 0x18c >;
1175		status = "disabled";
1176	};
1177
1178	serial@30a60000 {
1179		compatible = "fsl,imx8mq-uart\0fsl,imx6q-uart\0fsl,imx21-uart";
1180		reg = < 0x00 0x30a60000 0x00 0x10000 >;
1181		interrupts = < 0x00 0x1d 0x04 >;
1182		clocks = < 0x04 0x1a4 0x04 0x1a4 >;
1183		clock-names = "ipg\0per";
1184		dmas = < 0x1a 0x1c 0x04 0x00 0x1a 0x1d 0x04 0x00 >;
1185		dma-names = "rx\0tx";
1186		status = "disabled";
1187	};
1188
1189	imx_rpmsg {
1190		compatible = "fsl,rpmsg-bus\0simple-bus";
1191		#address-cells = < 0x02 >;
1192		#size-cells = < 0x02 >;
1193		ranges;
1194
1195		mu@30aa0000 {
1196			compatible = "fsl,imx8mq-mu\0fsl,imx6sx-mu";
1197			reg = < 0x00 0x30aa0000 0x00 0x10000 >;
1198			interrupts = < 0x00 0x58 0x04 >;
1199			clocks = < 0x04 0x1bf >;
1200			clock-names = "mu";
1201			status = "okay";
1202		};
1203
1204		rpmsg {
1205			compatible = "fsl,imx8qm-rpmsg";
1206			status = "okay";
1207			vdev-nums = < 0x01 >;
1208			reg = < 0x00 0xb8000000 0x00 0x10000 >;
1209		};
1210	};
1211
1212	ocotp-ctrl@30350000 {
1213		compatible = "fsl,imx8mq-ocotp\0fsl,imx7d-ocotp\0syscon";
1214		reg = < 0x00 0x30350000 0x00 0x10000 >;
1215		clocks = < 0x04 0x18d >;
1216		#address-cells = < 0x01 >;
1217		#size-cells = < 0x01 >;
1218	};
1219
1220	display-gpr@32e28000 {
1221		compatible = "fsl, imx8mm-iomuxc-gpr\0syscon";
1222		reg = < 0x00 0x32e28000 0x00 0x100 >;
1223		linux,phandle = < 0x0d >;
1224		phandle = < 0x0d >;
1225	};
1226
1227	usb@32e40000 {
1228		compatible = "fsl,imx8mm-usb\0fsl,imx7d-usb\0fsl,imx27-usb";
1229		reg = < 0x00 0x32e40000 0x00 0x200 >;
1230		interrupts = < 0x00 0x28 0x04 >;
1231		clocks = < 0x04 0x1a5 >;
1232		clock-names = "usb1_ctrl_root_clk";
1233		assigned-clocks = < 0x04 0x58 0x04 0xb2 >;
1234		assigned-clock-parents = < 0x04 0x40 0x04 0x32 >;
1235		fsl,usbphy = < 0x2d >;
1236		fsl,usbmisc = < 0x2e 0x00 >;
1237		power-domains = < 0x2f >;
1238		status = "okay";
1239		dr_mode = "otg";
1240		extcon = < 0x00 0x30 >;
1241		picophy,pre-emp-curr-control = < 0x03 >;
1242		picophy,dc-vol-level-adjust = < 0x07 >;
1243	};
1244
1245	usbphynop1 {
1246		compatible = "usb-nop-xceiv";
1247		clocks = < 0x04 0xb3 >;
1248		assigned-clocks = < 0x04 0xb3 >;
1249		assigned-clock-parents = < 0x04 0x32 >;
1250		clock-names = "main_clk";
1251		linux,phandle = < 0x2d >;
1252		phandle = < 0x2d >;
1253	};
1254
1255	usbmisc@32e40200 {
1256		#index-cells = < 0x01 >;
1257		compatible = "fsl,imx7d-usbmisc\0fsl,imx6q-usbmisc";
1258		reg = < 0x00 0x32e40200 0x00 0x200 >;
1259		linux,phandle = < 0x2e >;
1260		phandle = < 0x2e >;
1261	};
1262
1263	usb@32e50000 {
1264		compatible = "fsl,imx8mm-usb\0fsl,imx7d-usb\0fsl,imx27-usb";
1265		reg = < 0x00 0x32e50000 0x00 0x200 >;
1266		interrupts = < 0x00 0x29 0x04 >;
1267		clocks = < 0x04 0x1a5 >;
1268		clock-names = "usb1_ctrl_root_clk";
1269		assigned-clocks = < 0x04 0x58 0x04 0xb2 >;
1270		assigned-clock-parents = < 0x04 0x40 0x04 0x32 >;
1271		fsl,usbphy = < 0x31 >;
1272		fsl,usbmisc = < 0x32 0x00 >;
1273		power-domains = < 0x33 >;
1274		status = "disabled";
1275		dr_mode = "otg";
1276		extcon = < 0x00 0x34 >;
1277		picophy,pre-emp-curr-control = < 0x03 >;
1278		picophy,dc-vol-level-adjust = < 0x07 >;
1279	};
1280
1281	usbphynop2 {
1282		compatible = "usb-nop-xceiv";
1283		clocks = < 0x04 0xb3 >;
1284		assigned-clocks = < 0x04 0xb3 >;
1285		assigned-clock-parents = < 0x04 0x32 >;
1286		clock-names = "main_clk";
1287		linux,phandle = < 0x31 >;
1288		phandle = < 0x31 >;
1289	};
1290
1291	usbmisc@32e50200 {
1292		#index-cells = < 0x01 >;
1293		compatible = "fsl,imx7d-usbmisc\0fsl,imx6q-usbmisc";
1294		reg = < 0x00 0x32e50200 0x00 0x200 >;
1295		linux,phandle = < 0x32 >;
1296		phandle = < 0x32 >;
1297	};
1298
1299	mmc@30b40000 {
1300		compatible = "fsl,imx8mq-usdhc\0fsl,imx7d-usdhc";
1301		reg = < 0x00 0x30b40000 0x00 0x10000 >;
1302		interrupts = < 0x00 0x16 0x04 >;
1303		clocks = < 0x04 0x00 0x04 0x77 0x04 0x1a7 >;
1304		clock-names = "ipg\0ahb\0per";
1305		assigned-clocks = < 0x04 0x15f >;
1306		assigned-clock-rates = < 0x17d78400 >;
1307		fsl,tuning-start-tap = < 0x14 >;
1308		fsl,tuning-step = < 0x02 >;
1309		bus-width = < 0x04 >;
1310		status = "okay";
1311		pinctrl-names = "default\0state_100mhz\0state_200mhz";
1312		pinctrl-0 = < 0x35 0x36 >;
1313		pinctrl-1 = < 0x37 0x36 >;
1314		pinctrl-2 = < 0x38 0x36 >;
1315		vmmc-supply = < 0x39 >;
1316		pm-ignore-notify;
1317		keep-power-in-suspend;
1318		non-removable;
1319	};
1320
1321	mmc@30b50000 {
1322		compatible = "fsl,imx8mq-usdhc\0fsl,imx7d-usdhc";
1323		reg = < 0x00 0x30b50000 0x00 0x10000 >;
1324		interrupts = < 0x00 0x17 0x04 >;
1325		clocks = < 0x04 0x00 0x04 0x77 0x04 0x1a8 >;
1326		clock-names = "ipg\0ahb\0per";
1327		fsl,tuning-start-tap = < 0x14 >;
1328		fsl,tuning-step = < 0x02 >;
1329		bus-width = < 0x04 >;
1330		status = "okay";
1331		pinctrl-names = "default\0state_100mhz\0state_200mhz";
1332		pinctrl-0 = < 0x3a 0x3b >;
1333		pinctrl-1 = < 0x3c 0x3b >;
1334		pinctrl-2 = < 0x3d 0x3b >;
1335		cd-gpios = < 0x21 0x0f 0x01 >;
1336		vmmc-supply = < 0x3e >;
1337	};
1338
1339	mmc@30b60000 {
1340		compatible = "fsl,imx8mq-usdhc\0fsl,imx7d-usdhc";
1341		reg = < 0x00 0x30b60000 0x00 0x10000 >;
1342		interrupts = < 0x00 0x18 0x04 >;
1343		clocks = < 0x04 0x00 0x04 0x77 0x04 0x1b5 >;
1344		clock-names = "ipg\0ahb\0per";
1345		assigned-clocks = < 0x04 0x1b5 >;
1346		assigned-clock-rates = < 0x17d78400 >;
1347		fsl,tuning-start-tap = < 0x14 >;
1348		fsl,tuning-step = < 0x02 >;
1349		bus-width = < 0x08 >;
1350		status = "okay";
1351		pinctrl-names = "default\0state_100mhz\0state_200mhz";
1352		pinctrl-0 = < 0x3f >;
1353		pinctrl-1 = < 0x40 >;
1354		pinctrl-2 = < 0x41 >;
1355		non-removable;
1356	};
1357
1358	sai@30010000 {
1359		compatible = "fsl,imx8mq-sai\0fsl,imx6sx-sai";
1360		reg = < 0x00 0x30010000 0x00 0x10000 >;
1361		interrupts = < 0x00 0x5f 0x04 >;
1362		clocks = < 0x04 0x196 0x04 0x00 0x04 0x195 0x04 0x00 0x04 0x00 0x04 0x26 0x04 0x27 >;
1363		clock-names = "bus\0mclk0\0mclk1\0mclk2\0mclk3\0pll8k\0pll11k";
1364		dmas = < 0x42 0x00 0x1a 0x00 0x42 0x01 0x1a 0x00 >;
1365		dma-names = "rx\0tx";
1366		fsl,dataline = < 0x00 0xff 0xff >;
1367		status = "okay";
1368		pinctrl-names = "default\0dsd";
1369		pinctrl-0 = < 0x43 >;
1370		pinctrl-1 = < 0x44 >;
1371		assigned-clocks = < 0x04 0x9b 0x04 0x152 >;
1372		assigned-clock-parents = < 0x04 0x26 >;
1373		assigned-clock-rates = < 0x00 0x2ee0000 >;
1374		fsl,sai-multi-lane;
1375		fsl,dataline,dsd = < 0x00 0xff 0xff 0x02 0xff 0x11 >;
1376		linux,phandle = < 0x60 >;
1377		phandle = < 0x60 >;
1378	};
1379
1380	sai@30020000 {
1381		compatible = "fsl,imx8mq-sai\0fsl,imx6sx-sai";
1382		reg = < 0x00 0x30020000 0x00 0x10000 >;
1383		interrupts = < 0x00 0x60 0x04 >;
1384		clocks = < 0x04 0x198 0x04 0x00 0x04 0x197 0x04 0x00 0x04 0x00 >;
1385		clock-names = "bus\0mclk0\0mclk1\0mclk2\0mclk3";
1386		dmas = < 0x42 0x02 0x02 0x00 0x42 0x03 0x02 0x00 >;
1387		dma-names = "rx\0tx";
1388		status = "disabled";
1389	};
1390
1391	sai@30030000 {
1392		compatible = "fsl,imx8mm-sai\0fsl,imx8mq-sai\0fsl,imx6sx-sai";
1393		reg = < 0x00 0x30030000 0x00 0x10000 >;
1394		interrupts = < 0x00 0x32 0x04 >;
1395		clocks = < 0x04 0x19a 0x04 0x00 0x04 0x199 0x04 0x00 0x04 0x00 >;
1396		clock-names = "bus\0mclk0\0mclk1\0mclk2\0mclk3";
1397		dmas = < 0x42 0x04 0x02 0x00 0x42 0x05 0x02 0x00 >;
1398		dma-names = "rx\0tx";
1399		status = "okay";
1400		pinctrl-names = "default";
1401		pinctrl-0 = < 0x45 >;
1402		assigned-clocks = < 0x04 0x9d 0x04 0x154 >;
1403		assigned-clock-parents = < 0x04 0x26 >;
1404		assigned-clock-rates = < 0x00 0x1770000 >;
1405		linux,phandle = < 0x5e >;
1406		phandle = < 0x5e >;
1407	};
1408
1409	sai@30050000 {
1410		compatible = "fsl,imx8mm-sai\0fsl,imx8mq-sai\0fsl,imx6sx-sai";
1411		reg = < 0x00 0x30050000 0x00 0x10000 >;
1412		interrupts = < 0x00 0x5a 0x04 >;
1413		clocks = < 0x04 0x19e 0x04 0x00 0x04 0x19d 0x04 0x00 0x04 0x00 0x04 0x26 0x04 0x27 >;
1414		clock-names = "bus\0mclk0\0mclk1\0mclk2\0mclk3\0pll8k\0pll11k";
1415		dmas = < 0x42 0x08 0x02 0x00 0x42 0x09 0x02 0x00 >;
1416		dma-names = "rx\0tx";
1417		fsl,shared-interrupt;
1418		fsl,dataline = < 0x00 0x0f 0x0f >;
1419		status = "disabled";
1420		pinctrl-names = "default";
1421		pinctrl-0 = < 0x46 >;
1422		assigned-clocks = < 0x04 0x9f 0x04 0x156 >;
1423		assigned-clock-parents = < 0x04 0x26 >;
1424		assigned-clock-rates = < 0x00 0x2ee0000 >;
1425		fsl,sai-asynchronous;
1426		linux,phandle = < 0x63 >;
1427		phandle = < 0x63 >;
1428	};
1429
1430	sai@30060000 {
1431		compatible = "fsl,imx8mq-sai\0fsl,imx6sx-sai";
1432		reg = < 0x00 0x30060000 0x00 0x10000 >;
1433		interrupts = < 0x00 0x5a 0x04 >;
1434		clocks = < 0x04 0x1a0 0x04 0x00 0x04 0x19f 0x04 0x00 0x04 0x00 >;
1435		clock-names = "bus\0mclk0\0mclk1\0mclk2\0mclk3";
1436		dmas = < 0x42 0x0a 0x02 0x00 0x42 0x0b 0x02 0x00 >;
1437		dma-names = "rx\0tx";
1438		fsl,shared-interrupt;
1439		status = "disabled";
1440	};
1441
1442	micfil@30080000 {
1443		compatible = "fsl,imx8mm-micfil";
1444		reg = < 0x00 0x30080000 0x00 0x10000 >;
1445		interrupts = < 0x00 0x2c 0x04 0x00 0x2d 0x04 0x00 0x6d 0x04 0x00 0x6e 0x04 >;
1446		clocks = < 0x04 0x1bd 0x04 0x1b0 0x04 0x26 0x04 0x27 0x04 0x06 >;
1447		clock-names = "ipg_clk\0ipg_clk_app\0pll8k\0pll11k\0clkext3";
1448		dmas = < 0x42 0x18 0x1a 0x80000000 >;
1449		dma-names = "rx";
1450		status = "okay";
1451		pinctrl-names = "default";
1452		pinctrl-0 = < 0x47 >;
1453		assigned-clocks = < 0x04 0xcb 0x04 0x182 >;
1454		assigned-clock-parents = < 0x04 0x26 >;
1455		assigned-clock-rates = < 0x00 0xbb80000 >;
1456		linux,phandle = < 0x67 >;
1457		phandle = < 0x67 >;
1458	};
1459
1460	spdif@30090000 {
1461		compatible = "fsl,imx8mm-spdif";
1462		reg = < 0x00 0x30090000 0x00 0x10000 >;
1463		interrupts = < 0x00 0x06 0x04 >;
1464		clocks = < 0x04 0x8b 0x04 0x02 0x04 0x158 0x04 0x00 0x04 0x00 0x04 0x00 0x04 0x8b 0x04 0x00 0x04 0x00 0x04 0x00 0x04 0x26 0x04 0x27 >;
1465		clock-names = "core\0rxtx0\0rxtx1\0rxtx2\0rxtx3\0rxtx4\0rxtx5\0rxtx6\0rxtx7\0spba\0pll8k\0pll11k";
1466		dmas = < 0x42 0x1c 0x12 0x00 0x42 0x1d 0x12 0x00 >;
1467		dma-names = "rx\0tx";
1468		status = "okay";
1469		pinctrl-names = "default";
1470		pinctrl-0 = < 0x48 >;
1471		assigned-clocks = < 0x04 0xa1 0x04 0x158 >;
1472		assigned-clock-parents = < 0x04 0x26 >;
1473		assigned-clock-rates = < 0x00 0x1770000 >;
1474		linux,phandle = < 0x66 >;
1475		phandle = < 0x66 >;
1476	};
1477
1478	dma-controller@30bd0000 {
1479		compatible = "fsl,imx8mm-sdma\0fsl,imx8mq-sdma\0fsl,imx7d-sdma";
1480		reg = < 0x00 0x30bd0000 0x00 0x10000 >;
1481		interrupts = < 0x00 0x02 0x04 >;
1482		clocks = < 0x04 0x1b8 0x04 0x1b8 >;
1483		clock-names = "ipg\0ahb";
1484		#dma-cells = < 0x03 >;
1485		fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
1486		status = "okay";
1487		linux,phandle = < 0x1a >;
1488		phandle = < 0x1a >;
1489	};
1490
1491	dma-controller@302c0000 {
1492		compatible = "fsl,imx8mm-sdma\0fsl,imx8mq-sdma\0fsl,imx7d-sdma";
1493		reg = < 0x00 0x302c0000 0x00 0x10000 >;
1494		interrupts = < 0x00 0x67 0x04 >;
1495		clocks = < 0x04 0x1b9 0x04 0x1b9 >;
1496		clock-names = "ipg\0ahb";
1497		#dma-cells = < 0x03 >;
1498		fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
1499		fsl,ratio-1-1;
1500		status = "okay";
1501		linux,phandle = < 0x42 >;
1502		phandle = < 0x42 >;
1503	};
1504
1505	dma-controller@302b0000 {
1506		compatible = "fsl,imx8mm-sdma\0fsl,imx8mq-sdma\0fsl,imx7d-sdma";
1507		reg = < 0x00 0x302b0000 0x00 0x10000 >;
1508		interrupts = < 0x00 0x22 0x04 >;
1509		clocks = < 0x04 0x1ba 0x04 0x1ba >;
1510		clock-names = "ipg\0ahb";
1511		#dma-cells = < 0x03 >;
1512		fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
1513		fsl,ratio-1-1;
1514		status = "okay";
1515	};
1516
1517	wdog@30280000 {
1518		compatible = "fsl,imx21-wdt";
1519		reg = < 0x00 0x30280000 0x00 0x10000 >;
1520		interrupts = < 0x00 0x4e 0x04 >;
1521		clocks = < 0x04 0x1a9 >;
1522		status = "okay";
1523		pinctrl-names = "default";
1524		pinctrl-0 = < 0x49 >;
1525		fsl,ext-reset-output;
1526	};
1527
1528	wdog@30290000 {
1529		compatible = "fsl,imx21-wdt";
1530		reg = < 0x00 0x30290000 0x00 0x10000 >;
1531		interrupts = < 0x00 0x4f 0x04 >;
1532		clocks = < 0x04 0x1aa >;
1533		status = "disabled";
1534	};
1535
1536	wdog@302a0000 {
1537		compatible = "fsl,imx21-wdt";
1538		reg = < 0x00 0x302a0000 0x00 0x10000 >;
1539		interrupts = < 0x00 0x0a 0x04 >;
1540		clocks = < 0x04 0x1ab >;
1541		status = "disabled";
1542	};
1543
1544	flexspi@30bb0000 {
1545		#address-cells = < 0x01 >;
1546		#size-cells = < 0x00 >;
1547		compatible = "fsl,imx8mm-flexspi";
1548		reg = < 0x00 0x30bb0000 0x00 0x10000 0x00 0x8000000 0x00 0x10000000 >;
1549		reg-names = "FlexSPI\0FlexSPI-memory";
1550		interrupts = < 0x00 0x6b 0x04 >;
1551		clocks = < 0x04 0x193 >;
1552		clock-names = "fspi";
1553		status = "okay";
1554		pinctrl-names = "default";
1555		pinctrl-0 = < 0x4a >;
1556
1557		mt25qu256aba@0 {
1558			reg = < 0x00 >;
1559			#address-cells = < 0x01 >;
1560			#size-cells = < 0x01 >;
1561			compatible = "micron,mt25qu256aba";
1562			spi-max-frequency = < 0x1ba8140 >;
1563			spi-nor,ddr-quad-read-dummy = < 0x06 >;
1564		};
1565	};
1566
1567	ecspi@30820000 {
1568		#address-cells = < 0x01 >;
1569		#size-cells = < 0x00 >;
1570		compatible = "fsl,imx8mm-ecspi\0fsl,imx51-ecspi";
1571		reg = < 0x00 0x30820000 0x00 0x10000 >;
1572		interrupts = < 0x00 0x1f 0x04 >;
1573		clocks = < 0x04 0x184 0x04 0x184 >;
1574		clock-names = "ipg\0per";
1575		dmas = < 0x1a 0x00 0x07 0x01 0x1a 0x01 0x07 0x02 >;
1576		dma-names = "rx\0tx";
1577		status = "disabled";
1578	};
1579
1580	ecspi@30830000 {
1581		#address-cells = < 0x01 >;
1582		#size-cells = < 0x00 >;
1583		compatible = "fsl,imx8mm-ecspi\0fsl,imx51-ecspi";
1584		reg = < 0x00 0x30830000 0x00 0x10000 >;
1585		interrupts = < 0x00 0x20 0x04 >;
1586		clocks = < 0x04 0x185 0x04 0x185 >;
1587		clock-names = "ipg\0per";
1588		dmas = < 0x1a 0x02 0x07 0x01 0x1a 0x03 0x07 0x02 >;
1589		dma-names = "rx\0tx";
1590		status = "disabled";
1591	};
1592
1593	ecspi@30840000 {
1594		#address-cells = < 0x01 >;
1595		#size-cells = < 0x00 >;
1596		compatible = "fsl,imx8mm-ecspi\0fsl,imx51-ecspi";
1597		reg = < 0x00 0x30840000 0x00 0x10000 >;
1598		interrupts = < 0x00 0x21 0x04 >;
1599		clocks = < 0x04 0x186 0x04 0x186 >;
1600		clock-names = "ipg\0per";
1601		dmas = < 0x1a 0x04 0x07 0x01 0x1a 0x05 0x07 0x02 >;
1602		dma-names = "rx\0tx";
1603		status = "disabled";
1604	};
1605
1606	ethernet@30be0000 {
1607		compatible = "fsl,imx8mm-fec\0fsl,imx8mq-fec\0fsl,imx6sx-fec";
1608		reg = < 0x00 0x30be0000 0x00 0x10000 >;
1609		interrupts = < 0x00 0x76 0x04 0x00 0x77 0x04 0x00 0x78 0x04 >;
1610		clocks = < 0x04 0x187 0x04 0x187 0x04 0x15b 0x04 0x15a 0x04 0x15c >;
1611		clock-names = "ipg\0ahb\0ptp\0enet_clk_ref\0enet_out";
1612		assigned-clocks = < 0x04 0x52 0x04 0xa4 0x04 0xa3 0x04 0x15b >;
1613		assigned-clock-parents = < 0x04 0x36 0x04 0x3a 0x04 0x3b >;
1614		assigned-clock-rates = < 0x00 0x00 0x7735940 0x5f5e100 >;
1615		stop-mode = < 0x4b 0x10 0x03 >;
1616		fsl,num-tx-queues = < 0x03 >;
1617		fsl,num-rx-queues = < 0x03 >;
1618		fsl,wakeup_irq = < 0x02 >;
1619		status = "okay";
1620		pinctrl-names = "default";
1621		pinctrl-0 = < 0x4c >;
1622		phy-mode = "rgmii-id";
1623		phy-handle = < 0x4d >;
1624		fsl,magic-packet;
1625
1626		mdio {
1627			#address-cells = < 0x01 >;
1628			#size-cells = < 0x00 >;
1629
1630			ethernet-phy@0 {
1631				compatible = "ethernet-phy-ieee802.3-c22";
1632				reg = < 0x00 >;
1633				at803x,led-act-blind-workaround;
1634				at803x,eee-okay;
1635				at803x,vddio-1p8v;
1636				linux,phandle = < 0x4d >;
1637				phandle = < 0x4d >;
1638			};
1639		};
1640	};
1641
1642	dma_cap {
1643		compatible = "dma-capability";
1644		only-dma-mask32 = < 0x01 >;
1645	};
1646
1647	imx_ion {
1648		compatible = "fsl,mxc-ion";
1649		fsl,heap-id = < 0x00 >;
1650	};
1651
1652	lcdif@32E00000 {
1653		#address-cells = < 0x01 >;
1654		#size-cells = < 0x00 >;
1655		compatible = "fsl,imx8mm-lcdif";
1656		reg = < 0x00 0x32e00000 0x00 0x10000 >;
1657		clocks = < 0x04 0x151 0x04 0x1b2 0x04 0x1b3 >;
1658		clock-names = "pix\0disp-axi\0disp-apb";
1659		assigned-clocks = < 0x04 0x9a 0x04 0x55 0x04 0x56 >;
1660		assigned-clock-parents = < 0x04 0x28 0x04 0x41 0x04 0x38 >;
1661		assigned-clock-rate = < 0x2367b880 0x1dcd6500 0xbebc200 >;
1662		interrupts = < 0x00 0x05 0x04 >;
1663		lcdif-gpr = < 0x0d >;
1664		power-domains = < 0x0b >;
1665		status = "okay";
1666
1667		port@0 {
1668			reg = < 0x00 >;
1669			linux,phandle = < 0x51 >;
1670			phandle = < 0x51 >;
1671
1672			endpoint {
1673				remote-endpoint = < 0x4e >;
1674				linux,phandle = < 0x4f >;
1675				phandle = < 0x4f >;
1676			};
1677		};
1678	};
1679
1680	mipi_dsi@32E10000 {
1681		#address-cells = < 0x01 >;
1682		#size-cells = < 0x00 >;
1683		compatible = "fsl,imx8mm-mipi-dsim";
1684		reg = < 0x00 0x32e10000 0x00 0x400 >;
1685		clocks = < 0x04 0x174 0x04 0x175 >;
1686		clock-names = "cfg\0pll-ref";
1687		assigned-clocks = < 0x04 0xbd 0x04 0xbe >;
1688		assigned-clock-parents = < 0x04 0x36 0x04 0x28 >;
1689		assigned-clock-rates = < 0xfdad680 0x2367b880 >;
1690		interrupts = < 0x00 0x12 0x04 >;
1691		dsi-gpr = < 0x0d >;
1692		power-domains = < 0x0e >;
1693		status = "okay";
1694
1695		port@0 {
1696
1697			endpoint {
1698				remote-endpoint = < 0x4f >;
1699				linux,phandle = < 0x4e >;
1700				phandle = < 0x4e >;
1701			};
1702		};
1703
1704		port@1 {
1705
1706			endpoint {
1707				remote-endpoint = < 0x50 >;
1708				linux,phandle = < 0x23 >;
1709				phandle = < 0x23 >;
1710			};
1711		};
1712	};
1713
1714	display-subsystem {
1715		compatible = "fsl,imx-display-subsystem";
1716		ports = < 0x51 >;
1717	};
1718
1719	pcie@0x33800000 {
1720		compatible = "fsl,imx8mm-pcie\0snps,dw-pcie";
1721		reg = < 0x00 0x33800000 0x00 0x400000 0x00 0x32f00000 0x00 0x10000 0x00 0x1ff00000 0x00 0x80000 >;
1722		reg-names = "dbi\0phy\0config";
1723		reserved-region = < 0x52 >;
1724		#address-cells = < 0x03 >;
1725		#size-cells = < 0x02 >;
1726		device_type = "pci";
1727		ranges = < 0x81000000 0x00 0x00 0x00 0x1ff80000 0x00 0x10000 0x82000000 0x00 0x18000000 0x00 0x18000000 0x00 0x7f00000 >;
1728		num-lanes = < 0x01 >;
1729		interrupts = < 0x00 0x7a 0x04 0x00 0x7f 0x04 >;
1730		interrupt-names = "msi";
1731		#interrupt-cells = < 0x01 >;
1732		interrupt-map-mask = < 0x00 0x00 0x00 0x07 >;
1733		interrupt-map = < 0x00 0x00 0x00 0x01 0x0a 0x00 0x7d 0x04 0x00 0x00 0x00 0x02 0x0a 0x00 0x7c 0x04 0x00 0x00 0x00 0x03 0x0a 0x00 0x7b 0x04 0x00 0x00 0x00 0x04 0x0a 0x00 0x7a 0x04 >;
1734		clocks = < 0x04 0x18e 0x04 0xd5 0x04 0xd4 >;
1735		clock-names = "pcie\0pcie_bus\0pcie_phy";
1736		fsl,max-link-speed = < 0x02 >;
1737		ctrl-id = < 0x00 >;
1738		power-domains = < 0x53 >;
1739		status = "okay";
1740		pinctrl-names = "default";
1741		pinctrl-0 = < 0x54 >;
1742		disable-gpio = < 0x21 0x05 0x01 >;
1743		reset-gpio = < 0x55 0x15 0x01 >;
1744		ext_osc = < 0x01 >;
1745	};
1746
1747	pwm@30660000 {
1748		compatible = "fsl,imx8mm-pwm\0fsl,imx27-pwm";
1749		reg = < 0x00 0x30660000 0x00 0x10000 >;
1750		interrupts = < 0x00 0x51 0x04 >;
1751		clocks = < 0x04 0x18f 0x04 0x18f >;
1752		clock-names = "ipg\0per";
1753		#pwm-cells = < 0x02 >;
1754		status = "disabled";
1755	};
1756
1757	pwm@30670000 {
1758		compatible = "fsl,imx8mm-pwm\0fsl,imx27-pwm";
1759		reg = < 0x00 0x30670000 0x00 0x10000 >;
1760		interrupts = < 0x00 0x52 0x04 >;
1761		clocks = < 0x04 0x190 0x04 0x190 >;
1762		clock-names = "ipg\0per";
1763		#pwm-cells = < 0x02 >;
1764		status = "disabled";
1765	};
1766
1767	pwm@30680000 {
1768		compatible = "fsl,imx8mm-pwm\0fsl,imx27-pwm";
1769		reg = < 0x00 0x30680000 0x00 0x10000 >;
1770		interrupts = < 0x00 0x53 0x04 >;
1771		clocks = < 0x04 0x191 0x04 0x191 >;
1772		clock-names = "ipg\0per";
1773		#pwm-cells = < 0x02 >;
1774		status = "disabled";
1775	};
1776
1777	pwm@30690000 {
1778		compatible = "fsl,imx8mm-pwm\0fsl,imx27-pwm";
1779		reg = < 0x00 0x30690000 0x00 0x10000 >;
1780		interrupts = < 0x00 0x54 0x04 >;
1781		clocks = < 0x04 0x192 0x04 0x192 >;
1782		clock-names = "ipg\0per";
1783		#pwm-cells = < 0x02 >;
1784		status = "disabled";
1785	};
1786
1787	vpu_h1@38320000 {
1788		compatible = "nxp,imx8mm-hantro-h1";
1789		reg = < 0x00 0x38320000 0x00 0x10000 >;
1790		reg-names = "regs_hantro_h1";
1791		interrupts = < 0x00 0x1e 0x04 >;
1792		interrupt-names = "irq_hantro_h1";
1793		clocks = < 0x04 0x1ae 0x04 0x1b7 >;
1794		clock-names = "clk_hantro_h1\0clk_hantro_h1_bus";
1795		assigned-clocks = < 0x04 0xcc 0x04 0x54 >;
1796		assigned-clock-parents = < 0x04 0x2b 0x04 0x38 >;
1797		assigned-clock-rates = < 0x23c34600 0x2faf0800 >;
1798		power-domains = < 0x56 >;
1799		status = "okay";
1800	};
1801
1802	vpu_g1@38300000 {
1803		compatible = "nxp,imx8mm-hantro";
1804		reg = < 0x00 0x38300000 0x00 0x100000 >;
1805		reg-names = "regs_hantro";
1806		interrupts = < 0x00 0x07 0x04 >;
1807		interrupt-names = "irq_hantro";
1808		clocks = < 0x04 0x1ac 0x04 0x1b7 >;
1809		clock-names = "clk_hantro\0clk_hantro_bus";
1810		assigned-clocks = < 0x04 0x92 0x04 0x54 >;
1811		assigned-clock-parents = < 0x04 0x2b 0x04 0x38 >;
1812		assigned-clock-rates = < 0x23c34600 0x2faf0800 >;
1813		power-domains = < 0x57 >;
1814		status = "okay";
1815	};
1816
1817	vpu_g2@38310000 {
1818		compatible = "nxp,imx8mm-hantro";
1819		reg = < 0x00 0x38310000 0x00 0x100000 >;
1820		reg-names = "regs_hantro";
1821		interrupts = < 0x00 0x08 0x04 >;
1822		interrupt-names = "irq_hantro";
1823		clocks = < 0x04 0x1af 0x04 0x1b7 >;
1824		clock-names = "clk_hantro\0clk_hantro_bus";
1825		assigned-clocks = < 0x04 0x93 0x04 0x54 >;
1826		assigned-clock-parents = < 0x04 0x2b 0x04 0x38 >;
1827		assigned-clock-rates = < 0x23c34600 0x2faf0800 >;
1828		power-domains = < 0x58 >;
1829		status = "okay";
1830	};
1831
1832	gpu@38000000 {
1833		compatible = "fsl,imx8mm-gpu\0fsl,imx6q-gpu";
1834		reg = < 0x00 0x38000000 0x00 0x8000 0x00 0x38008000 0x00 0x8000 0x00 0x40000000 0x00 0x80000000 0x00 0x00 0x00 0x8000000 >;
1835		reg-names = "iobase_3d\0iobase_2d\0phys_baseaddr\0contiguous_mem";
1836		interrupts = < 0x00 0x03 0x04 0x00 0x19 0x04 >;
1837		interrupt-names = "irq_3d\0irq_2d";
1838		clocks = < 0x04 0x1a6 0x04 0x00 0x04 0x1ad 0x04 0x7e 0x04 0x1be 0x04 0x1ad 0x04 0x7e >;
1839		clock-names = "gpu3d_clk\0gpu3d_shader_clk\0gpu3d_axi_clk\0gpu3d_ahb_clk\0gpu2d_clk\0gpu2d_axi_clk\0gpu2d_ahb_clk";
1840		assigned-clocks = < 0x04 0x45 0x04 0x46 0x04 0x59 0x04 0x5a 0x04 0x2a 0x04 0x7e >;
1841		assigned-clock-parents = < 0x04 0x2a 0x04 0x2a 0x04 0x38 0x04 0x38 >;
1842		assigned-clock-rates = < 0x00 0x00 0x00 0x00 0x3b9aca00 0x17d78400 >;
1843		power-domains = < 0x59 >;
1844		status = "okay";
1845	};
1846
1847	caam@30900000 {
1848		compatible = "fsl,sec-v4.0";
1849		#address-cells = < 0x01 >;
1850		#size-cells = < 0x01 >;
1851		reg = < 0x00 0x30900000 0x00 0x40000 >;
1852		ranges = < 0x00 0x00 0x30900000 0x40000 >;
1853		interrupts = < 0x00 0x5b 0x04 >;
1854
1855		jr0@1000 {
1856			compatible = "fsl,sec-v4.0-job-ring";
1857			reg = < 0x1000 0x1000 >;
1858			interrupts = < 0x00 0x69 0x04 >;
1859		};
1860
1861		jr1@2000 {
1862			compatible = "fsl,sec-v4.0-job-ring";
1863			reg = < 0x2000 0x1000 >;
1864			interrupts = < 0x00 0x6a 0x04 >;
1865		};
1866
1867		jr2@3000 {
1868			compatible = "fsl,sec-v4.0-job-ring";
1869			reg = < 0x3000 0x1000 >;
1870			interrupts = < 0x00 0x72 0x04 >;
1871		};
1872	};
1873
1874	caam-sm@00100000 {
1875		compatible = "fsl,imx6q-caam-sm";
1876		reg = < 0x00 0x100000 0x00 0x8000 >;
1877	};
1878
1879	caam-snvs@30370000 {
1880		compatible = "fsl,imx6q-caam-snvs";
1881		reg = < 0x00 0x30370000 0x00 0x10000 >;
1882	};
1883
1884	caam_secvio {
1885		compatible = "fsl,imx7d-caam-secvio\0fsl,imx6q-caam-secvio";
1886		interrupts = < 0x00 0x14 0x04 >;
1887		jtag-tamper = "disabled";
1888		watchdog-tamper = "enabled";
1889		internal-boot-tamper = "enabled";
1890		external-pin-tamper = "disabled";
1891	};
1892
1893	dma-apbh@33000000 {
1894		compatible = "fsl,imx7d-dma-apbh\0fsl,imx28-dma-apbh";
1895		reg = < 0x00 0x33000000 0x00 0x2000 >;
1896		interrupts = < 0x00 0x0c 0x04 0x00 0x0c 0x04 0x00 0x0c 0x04 0x00 0x0c 0x04 >;
1897		interrupt-names = "gpmi0\0gpmi1\0gpmi2\0gpmi3";
1898		#dma-cells = < 0x01 >;
1899		dma-channels = < 0x04 >;
1900		clocks = < 0x04 0x1c7 >;
1901		linux,phandle = < 0x5a >;
1902		phandle = < 0x5a >;
1903	};
1904
1905	gpmi-nand@33002000 {
1906		compatible = "fsl,imx7d-gpmi-nand";
1907		#address-cells = < 0x01 >;
1908		#size-cells = < 0x01 >;
1909		reg = < 0x00 0x33002000 0x00 0x2000 0x00 0x33004000 0x00 0x4000 >;
1910		reg-names = "gpmi-nand\0bch";
1911		interrupts = < 0x00 0x0e 0x04 >;
1912		interrupt-names = "bch";
1913		clocks = < 0x04 0x194 0x04 0x1c7 >;
1914		clock-names = "gpmi_io\0gpmi_bch_apb";
1915		dmas = < 0x5a 0x00 >;
1916		dma-names = "rx-tx";
1917		status = "disabled";
1918	};
1919
1920	chosen {
1921		bootargs = "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200";
1922		stdout-path = "/serial@30890000";
1923	};
1924
1925	leds {
1926		compatible = "gpio-leds";
1927		pinctrl-names = "default";
1928		pinctrl-0 = < 0x5b >;
1929
1930		status {
1931			label = "status";
1932			gpios = < 0x5c 0x10 0x00 >;
1933			default-state = "on";
1934		};
1935	};
1936
1937	modem-reset {
1938		compatible = "gpio-reset";
1939		reset-gpios = < 0x25 0x06 0x01 >;
1940		reset-delay-us = < 0x7d0 >;
1941		reset-post-delay-ms = < 0x28 >;
1942		#reset-cells = < 0x00 >;
1943		linux,phandle = < 0x1c >;
1944		phandle = < 0x1c >;
1945	};
1946
1947	regulators {
1948		compatible = "simple-bus";
1949		#address-cells = < 0x01 >;
1950		#size-cells = < 0x00 >;
1951
1952		sd1_regulator {
1953			compatible = "regulator-fixed";
1954			regulator-name = "WLAN_EN";
1955			regulator-min-microvolt = < 0x325aa0 >;
1956			regulator-max-microvolt = < 0x325aa0 >;
1957			gpio = < 0x25 0x0a 0x00 >;
1958			off-on-delay = < 0x4e20 >;
1959			startup-delay-us = < 0x64 >;
1960			enable-active-high;
1961			linux,phandle = < 0x39 >;
1962			phandle = < 0x39 >;
1963		};
1964
1965		regulator-usdhc2 {
1966			compatible = "regulator-fixed";
1967			regulator-name = "VSD_3V3";
1968			regulator-min-microvolt = < 0x325aa0 >;
1969			regulator-max-microvolt = < 0x325aa0 >;
1970			gpio = < 0x25 0x13 0x00 >;
1971			off-on-delay = < 0x4e20 >;
1972			enable-active-high;
1973			linux,phandle = < 0x3e >;
1974			phandle = < 0x3e >;
1975		};
1976
1977		regulator-audio-board {
1978			compatible = "regulator-fixed";
1979			regulator-name = "EXT_PWREN";
1980			regulator-min-microvolt = < 0x325aa0 >;
1981			regulator-max-microvolt = < 0x325aa0 >;
1982			enable-active-high;
1983			startup-delay-us = < 0x493e0 >;
1984			gpio = < 0x29 0x01 0x00 >;
1985			linux,phandle = < 0x28 >;
1986			phandle = < 0x28 >;
1987		};
1988	};
1989
1990	wm8524 {
1991		compatible = "wlf,wm8524";
1992		clocks = < 0x04 0x199 >;
1993		clock-names = "mclk";
1994		wlf,mute-gpios = < 0x5d 0x15 0x01 >;
1995		linux,phandle = < 0x5f >;
1996		phandle = < 0x5f >;
1997	};
1998
1999	sound-wm8524 {
2000		compatible = "fsl,imx-audio-wm8524";
2001		model = "wm8524-audio";
2002		audio-cpu = < 0x5e >;
2003		audio-codec = < 0x5f >;
2004		audio-routing = "Line Out Jack\0LINEVOUTL\0Line Out Jack\0LINEVOUTR";
2005	};
2006
2007	sound-ak4458 {
2008		compatible = "fsl,imx-audio-ak4458";
2009		model = "ak4458-audio";
2010		audio-cpu = < 0x60 >;
2011		audio-codec = < 0x61 0x62 >;
2012		ak4458,pdn-gpio = < 0x29 0x04 0x00 >;
2013	};
2014
2015	sound-ak5558 {
2016		compatible = "fsl,imx-audio-ak5558";
2017		model = "ak5558-audio";
2018		audio-cpu = < 0x63 >;
2019		audio-codec = < 0x64 >;
2020		status = "disabled";
2021	};
2022
2023	sound-ak4497 {
2024		compatible = "fsl,imx-audio-ak4497";
2025		model = "ak4497-audio";
2026		audio-cpu = < 0x60 >;
2027		audio-codec = < 0x65 >;
2028		status = "disabled";
2029	};
2030
2031	sound-spdif {
2032		compatible = "fsl,imx-audio-spdif";
2033		model = "imx-spdif";
2034		spdif-controller = < 0x66 >;
2035		spdif-out;
2036		spdif-in;
2037	};
2038
2039	sound-micfil {
2040		compatible = "fsl,imx-audio-micfil";
2041		model = "imx-audio-micfil";
2042		cpu-dai = < 0x67 >;
2043	};
2044};
2045