/*
 * Copyright Linux Kernel Team
 *
 * SPDX-License-Identifier: GPL-2.0-only
 *
 * This file is derived from an intermediate build stage of the
 * Linux kernel. The licenses of all input files to this process
 * are compatible with GPL-2.0-only.
 */

/dts-v1/;

/ {
	compatible = "fsl,imx8mm-evk\0fsl,imx8mm";
	interrupt-parent = < 0x01 >;
	#address-cells = < 0x02 >;
	#size-cells = < 0x02 >;
	model = "FSL i.MX8MM EVK board";

	cpus {
		#address-cells = < 0x02 >;
		#size-cells = < 0x00 >;

		idle-states {
			entry-method = "psci";

			cpu-sleep {
				compatible = "arm,idle-state";
				arm,psci-suspend-param = < 0x10033 >;
				entry-latency-us = < 0x61a8 >;
				exit-latency-us = < 0x2710 >;
				min-residency-us = < 0x7530 >;
				local-timer-stop;
				wakeup-latency-us = < 0x3a98 >;
				linux,phandle = < 0x03 >;
				phandle = < 0x03 >;
			};

			cluster-sleep {
				compatible = "arm,idle-state";
				arm,psci-suspend-param = < 0x1000000 >;
				entry-latency-us = < 0x3e8 >;
				exit-latency-us = < 0x2bc >;
				min-residency-us = < 0xa8c >;
				wakeup-latency-us = < 0x5dc >;
			};
		};

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = < 0x00 0x00 >;
			enable-method = "psci";
			next-level-cache = < 0x02 >;
			cpu-idle-states = < 0x03 >;
			operating-points = < 0x1b7740 0xf4240 0x186a00 0xdbba0 0x124f80 0xc3500 >;
			clocks = < 0x04 0x4c 0x04 0x42 0x04 0x18 0x04 0x2c 0x04 0x38 >;
			clock-names = "a53\0arm_a53_src\0arm_pll\0arm_pll_out\0sys1_pll_800m";
			clock-latency = < 0xee6c >;
			#cooling-cells = < 0x02 >;
			arm-supply = < 0x05 >;
			linux,phandle = < 0x06 >;
			phandle = < 0x06 >;
		};

		cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = < 0x00 0x01 >;
			enable-method = "psci";
			next-level-cache = < 0x02 >;
			cpu-idle-states = < 0x03 >;
			linux,phandle = < 0x07 >;
			phandle = < 0x07 >;
		};

		cpu@2 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = < 0x00 0x02 >;
			enable-method = "psci";
			next-level-cache = < 0x02 >;
			cpu-idle-states = < 0x03 >;
			linux,phandle = < 0x08 >;
			phandle = < 0x08 >;
		};

		cpu@3 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = < 0x00 0x03 >;
			enable-method = "psci";
			next-level-cache = < 0x02 >;
			cpu-idle-states = < 0x03 >;
			linux,phandle = < 0x09 >;
			phandle = < 0x09 >;
		};

		l2-cache0 {
			compatible = "cache";
			linux,phandle = < 0x02 >;
			phandle = < 0x02 >;
		};
	};

	psci {
		compatible = "arm,psci-1.0";
		method = "smc";
		cpu_suspend = < 0xc4000001 >;
		cpu_off = < 0xc4000002 >;
		cpu_on = < 0xc4000003 >;
	};

	pmu {
		compatible = "arm,armv8-pmuv3";
		interrupts = < 0x01 0x07 0x3f04 >;
		interrupt-affinity = < 0x06 0x07 0x08 0x09 >;
		interrupt-parent = < 0x0a >;
	};

	aliases {
		ethernet0 = "/ethernet@30be0000";
		i2c0 = "/i2c@30a20000";
		i2c1 = "/i2c@30a30000";
		i2c2 = "/i2c@30a40000";
		i2c3 = "/i2c@30a50000";
		serial0 = "/serial@30860000";
		serial1 = "/serial@30890000";
		serial2 = "/serial@30880000";
		serial3 = "/serial@30a60000";
		spi0 = "/ecspi@30820000";
		spi1 = "/ecspi@30830000";
		spi2 = "/ecspi@30840000";
		mmc0 = "/mmc@30b40000";
		mmc1 = "/mmc@30b50000";
		mmc2 = "/mmc@30b60000";
		gpio0 = "/gpio@30200000";
		gpio1 = "/gpio@30210000";
		gpio2 = "/gpio@30220000";
		gpio3 = "/gpio@30230000";
		gpio4 = "/gpio@30240000";
	};

	memory@40000000 {
		device_type = "memory";
		reg = < 0x00 0x40000000 0x00 0x80000000 >;
	};

	reserved-memory {
		#address-cells = < 0x02 >;
		#size-cells = < 0x02 >;
		ranges;

		linux,cma {
			compatible = "shared-dma-pool";
			reusable;
			size = < 0x00 0x28000000 >;
			alloc-ranges = < 0x00 0x40000000 0x00 0x60000000 >;
			linux,cma-default;
		};

		rpmsg@0xb8000000 {
			no-map;
			reg = < 0x00 0xb8000000 0x00 0x400000 >;
			linux,phandle = < 0x52 >;
			phandle = < 0x52 >;
		};
	};

	interrupt-controller@38800000 {
		compatible = "arm,gic-v3";
		reg = < 0x00 0x38800000 0x00 0x10000 0x00 0x38880000 0x00 0xc0000 >;
		#interrupt-cells = < 0x03 >;
		interrupt-controller;
		interrupts = < 0x01 0x09 0x04 >;
		interrupt-parent = < 0x0a >;
		linux,phandle = < 0x0a >;
		phandle = < 0x0a >;
	};

	timer {
		compatible = "arm,armv8-timer";
		interrupts = < 0x01 0x0d 0x3f08 0x01 0x0e 0x3f08 0x01 0x0b 0x3f08 0x01 0x0a 0x3f08 >;
		clock-frequency = < 0x7a1200 >;
		arm,no-tick-in-suspend;
		interrupt-parent = < 0x0a >;
	};

	busfreq {
		compatible = "fsl,imx_busfreq";
		clocks = < 0x04 0x29 0x04 0x90 0x04 0x91 0x04 0x10b 0x04 0x1c5 0x04 0x1c6 0x04 0x30 0x04 0x32 0x04 0x3f 0x04 0x7f 0x04 0x8a 0x04 0x51 0x04 0x02 0x04 0x38 >;
		clock-names = "dram_pll\0dram_alt_src\0dram_apb_src\0dram_apb_pre_div\0dram_core\0dram_alt_root\0sys_pll1_40m\0sys_pll1_100m\0sys_pll2_333m\0noc_div\0ahb_div\0main_axi_src\0osc_24m\0sys_pll1_800m";
		interrupts = < 0x00 0x4a 0x04 0x00 0x4b 0x04 0x00 0x4c 0x04 0x00 0x4d 0x04 >;
		interrupt-name = "irq_busfreq_0\0irq_busfreq_1\0irq_busfreq_2\0irq_busfreq_3";
	};

	ddr_pmu@3d800000 {
		compatible = "fsl,imx8m-ddr-pmu\0fsl,imx8-ddr-pmu";
		reg = < 0x00 0x3d800000 0x00 0x400000 >;
		interrupts = < 0x00 0x62 0x04 >;
	};

	clocks {
		#address-cells = < 0x01 >;
		#size-cells = < 0x00 >;

		clock@0 {
			compatible = "fixed-clock";
			reg = < 0x00 >;
			#clock-cells = < 0x00 >;
			clock-frequency = < 0x8000 >;
			clock-output-names = "osc_32k";
			linux,phandle = < 0x14 >;
			phandle = < 0x14 >;
		};

		clock@1 {
			compatible = "fixed-clock";
			reg = < 0x01 >;
			#clock-cells = < 0x00 >;
			clock-frequency = < 0x16e3600 >;
			clock-output-names = "osc_24m";
			linux,phandle = < 0x15 >;
			phandle = < 0x15 >;
		};

		clock@2 {
			compatible = "fixed-clock";
			reg = < 0x03 >;
			#clock-cells = < 0x00 >;
			clock-frequency = < 0x7ed6b40 >;
			clock-output-names = "clk_ext1";
			linux,phandle = < 0x16 >;
			phandle = < 0x16 >;
		};

		clock@3 {
			compatible = "fixed-clock";
			reg = < 0x04 >;
			#clock-cells = < 0x00 >;
			clock-frequency = < 0x7ed6b40 >;
			clock-output-names = "clk_ext2";
			linux,phandle = < 0x17 >;
			phandle = < 0x17 >;
		};

		clock@4 {
			compatible = "fixed-clock";
			reg = < 0x05 >;
			#clock-cells = < 0x00 >;
			clock-frequency = < 0x7ed6b40 >;
			clock-output-names = "clk_ext3";
			linux,phandle = < 0x18 >;
			phandle = < 0x18 >;
		};

		clock@5 {
			compatible = "fixed-clock";
			reg = < 0x06 >;
			#clock-cells = < 0x00 >;
			clock-frequency = < 0x7ed6b40 >;
			clock-output-names = "clk_ext4";
			linux,phandle = < 0x19 >;
			phandle = < 0x19 >;
		};
	};

	power-domains {
		compatible = "simple-bus";
		#address-cells = < 0x01 >;
		#size-cells = < 0x00 >;

		power-domain@0 {
			compatible = "fsl,imx8mm-pm-domain";
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			domain-id = < 0x00 >;
			#power-domain-cells = < 0x00 >;
			domain-name = "HSIO_PD";
			clocks = < 0x04 0x1a5 >;

			power-domain@1 {
				domain-id = < 0x01 >;
				#power-domain-cells = < 0x00 >;
				domain-name = "PCIE0_PD";
				clocks = < 0x04 0x18e >;
				linux,phandle = < 0x53 >;
				phandle = < 0x53 >;
			};

			power-domain@2 {
				domain-id = < 0x02 >;
				#power-domain-cells = < 0x00 >;
				domain-name = "USB_OTG1_PD";
				linux,phandle = < 0x2f >;
				phandle = < 0x2f >;
			};

			power-domain@3 {
				domain-id = < 0x03 >;
				#power-domain-cells = < 0x00 >;
				domain-name = "USB_OTG2_PD";
				linux,phandle = < 0x33 >;
				phandle = < 0x33 >;
			};
		};

		power-domain@4 {
			compatible = "fsl,imx8mm-pm-domain";
			domain-id = < 0x04 >;
			#power-domain-cells = < 0x00 >;
			domain-name = "GPUMIX_PD";
			clocks = < 0x04 0x1ad 0x04 0x1be 0x04 0x1a6 0x04 0x7e >;
			linux,phandle = < 0x59 >;
			phandle = < 0x59 >;
		};

		power-domain@5 {
			compatible = "fsl,imx8mm-pm-domain";
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			domain-id = < 0x05 >;
			#power-domain-cells = < 0x00 >;
			domain-name = "VPUMIX_PD";
			clocks = < 0x04 0x1b7 >;

			power-domain@6 {
				domain-id = < 0x06 >;
				#power-domain-cells = < 0x00 >;
				domain-name = "VPU_G1_PD";
				clocks = < 0x04 0x1ac >;
				linux,phandle = < 0x57 >;
				phandle = < 0x57 >;
			};

			power-domain@7 {
				domain-id = < 0x07 >;
				#power-domain-cells = < 0x00 >;
				domain-name = "VPU_G2_PD";
				clocks = < 0x04 0x1af >;
				linux,phandle = < 0x58 >;
				phandle = < 0x58 >;
			};

			power-domain@8 {
				domain-id = < 0x08 >;
				#power-domain-cells = < 0x00 >;
				domain-name = "VPU_H1_PD";
				clocks = < 0x04 0x1ae >;
				linux,phandle = < 0x56 >;
				phandle = < 0x56 >;
			};
		};

		power-domain@9 {
			compatible = "fsl,imx8mm-pm-domain";
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;
			domain-id = < 0x09 >;
			#power-domain-cells = < 0x00 >;
			domain-name = "DISPMIX_PD";
			clocks = < 0x04 0x1b1 >;
			linux,phandle = < 0x0b >;
			phandle = < 0x0b >;

			power-domain@10 {
				domain-id = < 0x0a >;
				#power-domain-cells = < 0x00 >;
				domain-name = "MIPI_PD";
				linux,phandle = < 0x0e >;
				phandle = < 0x0e >;
			};
		};
	};

	csi1_bridge@32e20000 {
		compatible = "fsl,imx8mm-csi\0fsl,imx8mq-csi\0fsl,imx6s-csi";
		reg = < 0x00 0x32e20000 0x00 0x10000 >;
		interrupts = < 0x00 0x10 0x04 >;
		clocks = < 0x04 0x1b2 0x04 0x1c0 0x04 0x1b3 >;
		clock-names = "disp-axi\0csi_mclk\0disp_dcic";
		power-domains = < 0x0b >;
		status = "okay";
		fsl,mipi-mode;

		port {

			endpoint {
				remote-endpoint = < 0x0c >;
				linux,phandle = < 0x10 >;
				phandle = < 0x10 >;
			};
		};
	};

	mipi_csi@32e30000 {
		compatible = "fsl,imx8mm-mipi-csi";
		reg = < 0x00 0x32e30000 0x00 0x1000 >;
		interrupts = < 0x00 0x11 0x04 >;
		clock-frequency = < 0x13d92d40 >;
		clocks = < 0x04 0x178 0x04 0x179 0x04 0x1b2 0x04 0x1b3 >;
		clock-names = "mipi_clk\0phy_clk\0disp_axi\0disp_apb";
		bus-width = < 0x04 >;
		csi-gpr = < 0x0d >;
		power-domains = < 0x0e >;
		status = "okay";
		#address-cells = < 0x01 >;
		#size-cells = < 0x00 >;

		port {

			endpoint1 {
				remote-endpoint = < 0x0f >;
				data-lanes = < 0x02 >;
				csis-hs-settle = < 0x0d >;
				csis-clk-settle = < 0x02 >;
				csis-wclk;
				linux,phandle = < 0x2c >;
				phandle = < 0x2c >;
			};

			endpoint2 {
				remote-endpoint = < 0x10 >;
				linux,phandle = < 0x0c >;
				phandle = < 0x0c >;
			};
		};
	};

	gpio@30200000 {
		compatible = "fsl,imx8mm-gpio\0fsl,imx35-gpio";
		reg = < 0x00 0x30200000 0x00 0x10000 >;
		interrupts = < 0x00 0x40 0x04 0x00 0x41 0x04 >;
		gpio-controller;
		#gpio-cells = < 0x02 >;
		interrupt-controller;
		#interrupt-cells = < 0x02 >;
		linux,phandle = < 0x21 >;
		phandle = < 0x21 >;
	};

	gpio@30210000 {
		compatible = "fsl,imx8mm-gpio\0fsl,imx35-gpio";
		reg = < 0x00 0x30210000 0x00 0x10000 >;
		interrupts = < 0x00 0x42 0x04 0x00 0x43 0x04 >;
		gpio-controller;
		#gpio-cells = < 0x02 >;
		interrupt-controller;
		#interrupt-cells = < 0x02 >;
		linux,phandle = < 0x25 >;
		phandle = < 0x25 >;
	};

	gpio@30220000 {
		compatible = "fsl,imx8mm-gpio\0fsl,imx35-gpio";
		reg = < 0x00 0x30220000 0x00 0x10000 >;
		interrupts = < 0x00 0x44 0x04 0x00 0x45 0x04 >;
		gpio-controller;
		#gpio-cells = < 0x02 >;
		interrupt-controller;
		#interrupt-cells = < 0x02 >;
		linux,phandle = < 0x5c >;
		phandle = < 0x5c >;
	};

	gpio@30230000 {
		compatible = "fsl,imx8mm-gpio\0fsl,imx35-gpio";
		reg = < 0x00 0x30230000 0x00 0x10000 >;
		interrupts = < 0x00 0x46 0x04 0x00 0x47 0x04 >;
		gpio-controller;
		#gpio-cells = < 0x02 >;
		interrupt-controller;
		#interrupt-cells = < 0x02 >;
		linux,phandle = < 0x55 >;
		phandle = < 0x55 >;
	};

	gpio@30240000 {
		compatible = "fsl,imx8mm-gpio\0fsl,imx35-gpio";
		reg = < 0x00 0x30240000 0x00 0x10000 >;
		interrupts = < 0x00 0x48 0x04 0x00 0x49 0x04 >;
		gpio-controller;
		#gpio-cells = < 0x02 >;
		interrupt-controller;
		#interrupt-cells = < 0x02 >;
		linux,phandle = < 0x5d >;
		phandle = < 0x5d >;
	};

	tmu@0x30260000 {
		compatible = "fsl,imx8mm-tmu";
		reg = < 0x00 0x30260000 0x00 0x10000 >;
		clocks = < 0x04 0x1b6 >;
		interrupt = < 0x00 0x31 0x04 >;
		#thermal-sensor-cells = < 0x00 >;
		linux,phandle = < 0x11 >;
		phandle = < 0x11 >;
	};

	thermal-zones {

		cpu-thermal {
			polling-delay-passive = < 0xfa >;
			polling-delay = < 0x7d0 >;
			thermal-sensors = < 0x11 >;

			trips {

				trip0 {
					temperature = < 0x14c08 >;
					hysteresis = < 0x7d0 >;
					type = "passive";
					linux,phandle = < 0x12 >;
					phandle = < 0x12 >;
				};

				trip1 {
					temperature = < 0x17318 >;
					hysteresis = < 0x7d0 >;
					type = "critical";
				};
			};

			cooling-maps {

				map0 {
					trip = < 0x12 >;
					cooling-device = < 0x06 0xffffffff 0xffffffff >;
				};
			};
		};
	};

	pinctrl@30330000 {
		compatible = "fsl,imx8mm-iomuxc";
		reg = < 0x00 0x30330000 0x00 0x10000 >;
		pinctrl-names = "default";

		imx8mm-evk {

			csi_pwn_grp {
				fsl,pins = < 0x44 0x2ac 0x00 0x00 0x00 0x19 >;
				linux,phandle = < 0x2a >;
				phandle = < 0x2a >;
			};

			csi_rst_grp {
				fsl,pins = < 0x40 0x2a8 0x00 0x00 0x00 0x19 0x60 0x2c8 0x00 0x06 0x00 0x59 >;
				linux,phandle = < 0x2b >;
				phandle = < 0x2b >;
			};

			mipi_dsi_en {
				fsl,pins = < 0x48 0x2b0 0x00 0x00 0x00 0x16 >;
			};

			synaptics_dsx_iogrp {
				fsl,pins = < 0x4c 0x2b4 0x00 0x00 0x00 0x19 >;
			};

			fec1grp {
				fsl,pins = < 0x68 0x2d0 0x00 0x00 0x00 0x03 0x6c 0x2d4 0x4c0 0x00 0x01 0x03 0x70 0x2d8 0x00 0x00 0x00 0x1f 0x74 0x2dc 0x00 0x00 0x00 0x1f 0x78 0x2e0 0x00 0x00 0x00 0x1f 0x7c 0x2e4 0x00 0x00 0x00 0x1f 0x9c 0x304 0x00 0x00 0x00 0x91 0x98 0x300 0x00 0x00 0x00 0x91 0x94 0x2fc 0x00 0x00 0x00 0x91 0x90 0x2f8 0x00 0x00 0x00 0x91 0x84 0x2ec 0x00 0x00 0x00 0x1f 0x8c 0x2f4 0x00 0x00 0x00 0x91 0x88 0x2f0 0x00 0x00 0x00 0x91 0x80 0x2e8 0x00 0x00 0x00 0x1f 0x1b4 0x41c 0x00 0x05 0x00 0x19 >;
				linux,phandle = < 0x4c >;
				phandle = < 0x4c >;
			};

			flexspi0grp {
				fsl,pins = < 0xf4 0x35c 0x00 0x01 0x00 0x1c2 0xf8 0x360 0x00 0x01 0x00 0x82 0x10c 0x374 0x00 0x01 0x00 0x82 0x110 0x378 0x00 0x01 0x00 0x82 0x114 0x37c 0x00 0x01 0x00 0x82 0x118 0x380 0x00 0x01 0x00 0x82 >;
				linux,phandle = < 0x4a >;
				phandle = < 0x4a >;
			};

			gpioledgrp {
				fsl,pins = < 0x134 0x39c 0x00 0x05 0x00 0x19 >;
				linux,phandle = < 0x5b >;
				phandle = < 0x5b >;
			};

			i2c1grp {
				fsl,pins = < 0x214 0x47c 0x00 0x00 0x00 0x400001c3 0x218 0x480 0x00 0x00 0x00 0x400001c3 >;
				linux,phandle = < 0x1f >;
				phandle = < 0x1f >;
			};

			i2c2grp {
				fsl,pins = < 0x21c 0x484 0x00 0x00 0x00 0x400001c3 0x220 0x488 0x00 0x00 0x00 0x400001c3 >;
				linux,phandle = < 0x22 >;
				phandle = < 0x22 >;
			};

			i2c3grp {
				fsl,pins = < 0x224 0x48c 0x00 0x00 0x00 0x400001c3 0x228 0x490 0x00 0x00 0x00 0x400001c3 >;
				linux,phandle = < 0x27 >;
				phandle = < 0x27 >;
			};

			pcie0grp {
				fsl,pins = < 0x22c 0x494 0x524 0x12 0x00 0x61 0x3c 0x2a4 0x00 0x00 0x00 0x41 0x1b0 0x418 0x00 0x05 0x00 0x41 >;
				linux,phandle = < 0x54 >;
				phandle = < 0x54 >;
			};

			pmicirq {
				fsl,pins = < 0x34 0x29c 0x00 0x00 0x00 0x41 >;
				linux,phandle = < 0x20 >;
				phandle = < 0x20 >;
			};

			typec1grp {
				fsl,pins = < 0xcc 0x334 0x00 0x05 0x00 0x159 >;
				linux,phandle = < 0x24 >;
				phandle = < 0x24 >;
			};

			typec2grp {
				fsl,pins = < 0xd0 0x338 0x00 0x05 0x00 0x159 >;
				linux,phandle = < 0x26 >;
				phandle = < 0x26 >;
			};

			sai1grp {
				fsl,pins = < 0x1ac 0x414 0x00 0x00 0x00 0xd6 0x184 0x3ec 0x4cc 0x00 0x03 0xd6 0x180 0x3e8 0x4cc 0x02 0x04 0xd6 0x188 0x3f0 0x4c8 0x00 0x01 0xd6 0x18c 0x3f4 0x00 0x00 0x00 0xd6 0x190 0x3f8 0x00 0x00 0x00 0xd6 0x194 0x3fc 0x00 0x00 0x00 0xd6 0x198 0x400 0x00 0x00 0x00 0xd6 0x19c 0x404 0x00 0x00 0x00 0xd6 0x1a0 0x408 0x00 0x00 0x00 0xd6 0x1a4 0x40c 0x00 0x00 0x00 0xd6 0x1a8 0x410 0x00 0x00 0x00 0xd6 >;
				linux,phandle = < 0x43 >;
				phandle = < 0x43 >;
			};

			sai1grp_dsd {
				fsl,pins = < 0x1ac 0x414 0x00 0x00 0x00 0xd6 0x184 0x3ec 0x4cc 0x00 0x03 0xd6 0x180 0x3e8 0x00 0x03 0x00 0xd6 0x188 0x3f0 0x4c8 0x00 0x01 0xd6 0x18c 0x3f4 0x00 0x00 0x00 0xd6 0x190 0x3f8 0x00 0x00 0x00 0xd6 0x194 0x3fc 0x00 0x00 0x00 0xd6 0x198 0x400 0x00 0x00 0x00 0xd6 0x19c 0x404 0x00 0x00 0x00 0xd6 0x1a0 0x408 0x00 0x00 0x00 0xd6 0x1a4 0x40c 0x00 0x00 0x00 0xd6 0x1a8 0x410 0x00 0x00 0x00 0xd6 >;
				linux,phandle = < 0x44 >;
				phandle = < 0x44 >;
			};

			sai3grp {
				fsl,pins = < 0x1d8 0x440 0x00 0x00 0x00 0xd6 0x1dc 0x444 0x00 0x00 0x00 0xd6 0x1e4 0x44c 0x00 0x00 0x00 0xd6 0x1e0 0x448 0x00 0x00 0x00 0xd6 0x230 0x498 0x00 0x05 0x00 0xd6 >;
				linux,phandle = < 0x45 >;
				phandle = < 0x45 >;
			};

			sai5grp {
				fsl,pins = < 0x158 0x3c0 0x52c 0x00 0x00 0xd6 0x144 0x3ac 0x4d0 0x00 0x00 0xd6 0x140 0x3a8 0x4e4 0x00 0x00 0xd6 0x148 0x3b0 0x4d4 0x00 0x00 0xd6 0x14c 0x3b4 0x4d8 0x00 0x00 0xd6 0x150 0x3b8 0x4dc 0x00 0x00 0xd6 0x154 0x3bc 0x4e0 0x00 0x00 0xd6 >;
				linux,phandle = < 0x46 >;
				phandle = < 0x46 >;
			};

			pdmgrp {
				fsl,pins = < 0x158 0x3c0 0x52c 0x00 0x00 0xd6 0x144 0x3ac 0x00 0x04 0x00 0xd6 0x140 0x3a8 0x4e4 0x00 0x00 0xd6 0x148 0x3b0 0x534 0x04 0x00 0xd6 0x14c 0x3b4 0x538 0x04 0x00 0xd6 0x150 0x3b8 0x53c 0x04 0x00 0xd6 0x154 0x3bc 0x540 0x04 0x00 0xd6 >;
				linux,phandle = < 0x47 >;
				phandle = < 0x47 >;
			};

			spdif1grp {
				fsl,pins = < 0x1e8 0x450 0x00 0x00 0x00 0xd6 0x1ec 0x454 0x00 0x00 0x00 0xd6 >;
				linux,phandle = < 0x48 >;
				phandle = < 0x48 >;
			};

			uart1grp {
				fsl,pins = < 0x234 0x49c 0x4f4 0x00 0x00 0x140 0x238 0x4a0 0x00 0x00 0x00 0x140 0x244 0x4ac 0x00 0x01 0x00 0x140 0x248 0x4b0 0x4f0 0x01 0x01 0x140 0xb8 0x320 0x00 0x05 0x00 0x19 >;
				linux,phandle = < 0x1b >;
				phandle = < 0x1b >;
			};

			uart2grp {
				fsl,pins = < 0x23c 0x4a4 0x4fc 0x00 0x00 0x140 0x240 0x4a8 0x00 0x00 0x00 0x140 >;
				linux,phandle = < 0x1e >;
				phandle = < 0x1e >;
			};

			uart3grp {
				fsl,pins = < 0x1f4 0x45c 0x504 0x01 0x00 0x140 0x1f8 0x460 0x00 0x01 0x00 0x140 0x200 0x468 0x500 0x01 0x01 0x140 0x1fc 0x464 0x00 0x01 0x00 0x140 >;
				linux,phandle = < 0x1d >;
				phandle = < 0x1d >;
			};

			usdhc1grpgpio {
				fsl,pins = < 0xc8 0x330 0x00 0x05 0x00 0x41 >;
				linux,phandle = < 0x36 >;
				phandle = < 0x36 >;
			};

			usdhc1grp {
				fsl,pins = < 0xa0 0x308 0x00 0x00 0x00 0x190 0xa4 0x30c 0x00 0x00 0x00 0x1d0 0xa8 0x310 0x00 0x00 0x00 0x1d0 0xac 0x314 0x00 0x00 0x00 0x1d0 0xb0 0x318 0x00 0x00 0x00 0x1d0 0xb4 0x31c 0x00 0x00 0x00 0x1d0 >;
				linux,phandle = < 0x35 >;
				phandle = < 0x35 >;
			};

			usdhc1grp100mhz {
				fsl,pins = < 0xa0 0x308 0x00 0x00 0x00 0x194 0xa4 0x30c 0x00 0x00 0x00 0x1d4 0xa8 0x310 0x00 0x00 0x00 0x1d4 0xac 0x314 0x00 0x00 0x00 0x1d4 0xb0 0x318 0x00 0x00 0x00 0x1d4 0xb4 0x31c 0x00 0x00 0x00 0x1d4 >;
				linux,phandle = < 0x37 >;
				phandle = < 0x37 >;
			};

			usdhc1grp200mhz {
				fsl,pins = < 0xa0 0x308 0x00 0x00 0x00 0x196 0xa4 0x30c 0x00 0x00 0x00 0x1d6 0xa8 0x310 0x00 0x00 0x00 0x1d6 0xac 0x314 0x00 0x00 0x00 0x1d6 0xb0 0x318 0x00 0x00 0x00 0x1d6 0xb4 0x31c 0x00 0x00 0x00 0x1d6 >;
				linux,phandle = < 0x38 >;
				phandle = < 0x38 >;
			};

			usdhc2grpgpio {
				fsl,pins = < 0x64 0x2cc 0x00 0x00 0x00 0x1c4 0xec 0x354 0x00 0x05 0x00 0x41 >;
				linux,phandle = < 0x3b >;
				phandle = < 0x3b >;
			};

			usdhc2grp {
				fsl,pins = < 0xd4 0x33c 0x00 0x00 0x00 0x190 0xd8 0x340 0x00 0x00 0x00 0x1d0 0xdc 0x344 0x00 0x00 0x00 0x1d0 0xe0 0x348 0x00 0x00 0x00 0x1d0 0xe4 0x34c 0x00 0x00 0x00 0x1d0 0xe8 0x350 0x00 0x00 0x00 0x1d0 0x38 0x2a0 0x00 0x01 0x00 0x1d0 >;
				linux,phandle = < 0x3a >;
				phandle = < 0x3a >;
			};

			usdhc2grp100mhz {
				fsl,pins = < 0xd4 0x33c 0x00 0x00 0x00 0x194 0xd8 0x340 0x00 0x00 0x00 0x1d4 0xdc 0x344 0x00 0x00 0x00 0x1d4 0xe0 0x348 0x00 0x00 0x00 0x1d4 0xe4 0x34c 0x00 0x00 0x00 0x1d4 0xe8 0x350 0x00 0x00 0x00 0x1d4 0x38 0x2a0 0x00 0x01 0x00 0x1d0 >;
				linux,phandle = < 0x3c >;
				phandle = < 0x3c >;
			};

			usdhc2grp200mhz {
				fsl,pins = < 0xd4 0x33c 0x00 0x00 0x00 0x196 0xd8 0x340 0x00 0x00 0x00 0x1d6 0xdc 0x344 0x00 0x00 0x00 0x1d6 0xe0 0x348 0x00 0x00 0x00 0x1d6 0xe4 0x34c 0x00 0x00 0x00 0x1d6 0xe8 0x350 0x00 0x00 0x00 0x1d6 0x38 0x2a0 0x00 0x01 0x00 0x1d0 >;
				linux,phandle = < 0x3d >;
				phandle = < 0x3d >;
			};

			usdhc3grp {
				fsl,pins = < 0x138 0x3a0 0x00 0x12 0x00 0x190 0x13c 0x3a4 0x00 0x02 0x00 0x1d0 0x11c 0x384 0x00 0x02 0x00 0x1d0 0x120 0x388 0x00 0x02 0x00 0x1d0 0x124 0x38c 0x00 0x02 0x00 0x1d0 0x128 0x390 0x00 0x02 0x00 0x1d0 0x130 0x398 0x00 0x02 0x00 0x1d0 0x100 0x368 0x00 0x02 0x00 0x1d0 0x104 0x36c 0x00 0x02 0x00 0x1d0 0x108 0x370 0x00 0x02 0x00 0x1d0 0xfc 0x364 0x00 0x02 0x00 0x190 >;
				linux,phandle = < 0x3f >;
				phandle = < 0x3f >;
			};

			usdhc3grp100mhz {
				fsl,pins = < 0x138 0x3a0 0x00 0x12 0x00 0x194 0x13c 0x3a4 0x00 0x02 0x00 0x1d4 0x11c 0x384 0x00 0x02 0x00 0x1d4 0x120 0x388 0x00 0x02 0x00 0x1d4 0x124 0x38c 0x00 0x02 0x00 0x1d4 0x128 0x390 0x00 0x02 0x00 0x1d4 0x130 0x398 0x00 0x02 0x00 0x1d4 0x100 0x368 0x00 0x02 0x00 0x1d4 0x104 0x36c 0x00 0x02 0x00 0x1d4 0x108 0x370 0x00 0x02 0x00 0x1d4 0xfc 0x364 0x00 0x02 0x00 0x194 >;
				linux,phandle = < 0x40 >;
				phandle = < 0x40 >;
			};

			usdhc3grp200mhz {
				fsl,pins = < 0x138 0x3a0 0x00 0x12 0x00 0x196 0x13c 0x3a4 0x00 0x02 0x00 0x1d6 0x11c 0x384 0x00 0x02 0x00 0x1d6 0x120 0x388 0x00 0x02 0x00 0x1d6 0x124 0x38c 0x00 0x02 0x00 0x1d6 0x128 0x390 0x00 0x02 0x00 0x1d6 0x130 0x398 0x00 0x02 0x00 0x1d6 0x100 0x368 0x00 0x02 0x00 0x1d6 0x104 0x36c 0x00 0x02 0x00 0x1d6 0x108 0x370 0x00 0x02 0x00 0x1d6 0xfc 0x364 0x00 0x02 0x00 0x196 >;
				linux,phandle = < 0x41 >;
				phandle = < 0x41 >;
			};

			wdoggrp {
				fsl,pins = < 0x30 0x298 0x00 0x01 0x00 0xc6 >;
				linux,phandle = < 0x49 >;
				phandle = < 0x49 >;
			};
		};
	};

	iomuxc-gpr@30340000 {
		compatible = "fsl,imx8mm-iomuxc-gpr\0fsl,imx7d-iomuxc-gpr\0syscon";
		reg = < 0x00 0x30340000 0x00 0x10000 >;
		linux,phandle = < 0x4b >;
		phandle = < 0x4b >;
	};

	anatop@30360000 {
		compatible = "fsl,imx8mm-anatop\0syscon\0simple-bus";
		reg = < 0x00 0x30360000 0x00 0x10000 >;
	};

	snvs@30370000 {
		compatible = "fsl,sec-v4.0-mon\0syscon\0simple-mfd";
		reg = < 0x00 0x30370000 0x00 0x10000 >;
		linux,phandle = < 0x13 >;
		phandle = < 0x13 >;

		snvs-rtc-lp {
			compatible = "fsl,sec-v4.0-mon-rtc-lp";
			regmap = < 0x13 >;
			offset = < 0x34 >;
			interrupts = < 0x00 0x13 0x04 0x00 0x14 0x04 >;
		};

		snvs-powerkey {
			compatible = "fsl,sec-v4.0-pwrkey";
			regmap = < 0x13 >;
			interrupts = < 0x00 0x04 0x04 >;
			linux,keycode = < 0x74 >;
			wakeup-source;
		};
	};

	clock-controller@30380000 {
		compatible = "fsl,imx8mm-ccm";
		reg = < 0x00 0x30380000 0x00 0x10000 >;
		#clock-cells = < 0x01 >;
		clocks = < 0x14 0x15 0x16 0x17 0x18 0x19 >;
		clock-names = "osc_32k\0osc_24m\0clk_ext1\0clk_ext2\0clk_ext3\0clk_ext4";
		assigned-clocks = < 0x04 0x12 0x04 0x13 >;
		assigned-clock-rates = < 0x2ee00000 0x2b110000 >;
		linux,phandle = < 0x04 >;
		phandle = < 0x04 >;
	};

	src@30390000 {
		compatible = "fsl,imx8mm-src\0fsl,imx8mq-src\0syscon";
		reg = < 0x00 0x30390000 0x00 0x10000 >;
		interrupts = < 0x00 0x59 0x04 >;
		#reset-cells = < 0x01 >;
	};

	gpc@303a0000 {
		compatible = "fsl,imx8mm-gpc\0fsl,imx8mq-gpc\0syscon";
		reg = < 0x00 0x303a0000 0x00 0x10000 >;
		interrupt-controller;
		interrupts = < 0x00 0x57 0x04 >;
		#interrupt-cells = < 0x03 >;
		interrupt-parent = < 0x0a >;
		linux,phandle = < 0x01 >;
		phandle = < 0x01 >;
	};

	timer@306a0000 {
		compatible = "nxp,sysctr-timer";
		reg = < 0x00 0x306a0000 0x00 0x10000 0x00 0x306b0000 0x00 0x10000 0x00 0x306c0000 0x00 0x10000 >;
		clock-frequency = < 0x7a1200 >;
		interrupts = < 0x00 0x2f 0x04 0x00 0x30 0x04 >;
	};

	serial@30860000 {
		compatible = "fsl,imx8mm-uart\0fsl,imx6q-uart\0fsl,imx21-uart";
		reg = < 0x00 0x30860000 0x00 0x10000 >;
		interrupts = < 0x00 0x1a 0x04 >;
		clocks = < 0x04 0x1a1 0x04 0x1a1 >;
		clock-names = "ipg\0per";
		dmas = < 0x1a 0x16 0x04 0x00 0x1a 0x17 0x04 0x00 >;
		dma-names = "rx\0tx";
		status = "okay";
		pinctrl-names = "default";
		pinctrl-0 = < 0x1b >;
		assigned-clocks = < 0x04 0xae >;
		assigned-clock-parents = < 0x04 0x31 >;
		fsl,uart-has-rtscts;
		resets = < 0x1c >;
	};

	serial@30880000 {
		compatible = "fsl,imx8mm-uart\0fsl,imx6q-uart\0fsl,imx21-uart";
		reg = < 0x00 0x30880000 0x00 0x10000 >;
		interrupts = < 0x00 0x1c 0x04 >;
		clocks = < 0x04 0x1a3 0x04 0x1a3 >;
		clock-names = "ipg\0per";
		dmas = < 0x1a 0x1a 0x04 0x00 0x1a 0x1b 0x04 0x00 >;
		dma-names = "rx\0tx";
		status = "okay";
		pinctrl-names = "default";
		pinctrl-0 = < 0x1d >;
		assigned-clocks = < 0x04 0xb0 >;
		assigned-clock-parents = < 0x04 0x31 >;
		fsl,uart-has-rtscts;
	};

	serial@30890000 {
		compatible = "fsl,imx8mm-uart\0fsl,imx6q-uart\0fsl,imx21-uart";
		reg = < 0x00 0x30890000 0x00 0x10000 >;
		interrupts = < 0x00 0x1b 0x04 >;
		clocks = < 0x04 0x1a2 0x04 0x1a2 >;
		clock-names = "ipg\0per";
		status = "okay";
		pinctrl-names = "default";
		pinctrl-0 = < 0x1e >;
	};

	i2c@30a20000 {
		#address-cells = < 0x01 >;
		#size-cells = < 0x00 >;
		compatible = "fsl,imx8mm-i2c\0fsl,imx21-i2c";
		reg = < 0x00 0x30a20000 0x00 0x10000 >;
		interrupts = < 0x00 0x23 0x04 >;
		clocks = < 0x04 0x189 >;
		status = "okay";
		clock-frequency = < 0x61a80 >;
		pinctrl-names = "default";
		pinctrl-0 = < 0x1f >;

		bd71837@4b {
			reg = < 0x4b >;
			compatible = "rohm,bd71840\0rohm,bd71837";
			pinctrl-0 = < 0x20 >;
			gpio_intr = < 0x21 0x03 0x01 >;

			gpo {
				rohm,drv = < 0x0c >;
			};

			regulators {
				#address-cells = < 0x01 >;
				#size-cells = < 0x00 >;
				bd71837,pmic-buck2-uses-i2c-dvs;
				bd71837,pmic-buck2-dvs-voltage = < 0xf4240 0xdbba0 0x00 >;

				regulator@0 {
					reg = < 0x00 >;
					regulator-compatible = "buck1";
					regulator-min-microvolt = < 0xaae60 >;
					regulator-max-microvolt = < 0x13d620 >;
					regulator-boot-on;
					regulator-always-on;
					regulator-ramp-delay = < 0x4e2 >;
				};

				regulator@1 {
					reg = < 0x01 >;
					regulator-compatible = "buck2";
					regulator-min-microvolt = < 0xaae60 >;
					regulator-max-microvolt = < 0x13d620 >;
					regulator-boot-on;
					regulator-always-on;
					regulator-ramp-delay = < 0x4e2 >;
					linux,phandle = < 0x05 >;
					phandle = < 0x05 >;
				};

				regulator@2 {
					reg = < 0x02 >;
					regulator-compatible = "buck3";
					regulator-min-microvolt = < 0xaae60 >;
					regulator-max-microvolt = < 0x13d620 >;
				};

				regulator@3 {
					reg = < 0x03 >;
					regulator-compatible = "buck4";
					regulator-min-microvolt = < 0xaae60 >;
					regulator-max-microvolt = < 0x13d620 >;
				};

				regulator@4 {
					reg = < 0x04 >;
					regulator-compatible = "buck5";
					regulator-min-microvolt = < 0xaae60 >;
					regulator-max-microvolt = < 0x149970 >;
					regulator-boot-on;
					regulator-always-on;
				};

				regulator@5 {
					reg = < 0x05 >;
					regulator-compatible = "buck6";
					regulator-min-microvolt = < 0x2dc6c0 >;
					regulator-max-microvolt = < 0x325aa0 >;
					regulator-boot-on;
					regulator-always-on;
				};

				regulator@6 {
					reg = < 0x06 >;
					regulator-compatible = "buck7";
					regulator-min-microvolt = < 0x187d88 >;
					regulator-max-microvolt = < 0x1e70f8 >;
					regulator-boot-on;
					regulator-always-on;
				};

				regulator@7 {
					reg = < 0x07 >;
					regulator-compatible = "buck8";
					regulator-min-microvolt = < 0xc3500 >;
					regulator-max-microvolt = < 0x155cc0 >;
					regulator-boot-on;
					regulator-always-on;
				};

				regulator@8 {
					reg = < 0x08 >;
					regulator-compatible = "ldo1";
					regulator-min-microvolt = < 0x2dc6c0 >;
					regulator-max-microvolt = < 0x325aa0 >;
					regulator-boot-on;
					regulator-always-on;
				};

				regulator@9 {
					reg = < 0x09 >;
					regulator-compatible = "ldo2";
					regulator-min-microvolt = < 0xdbba0 >;
					regulator-max-microvolt = < 0xdbba0 >;
					regulator-boot-on;
					regulator-always-on;
				};

				regulator@10 {
					reg = < 0x0a >;
					regulator-compatible = "ldo3";
					regulator-min-microvolt = < 0x1b7740 >;
					regulator-max-microvolt = < 0x325aa0 >;
					regulator-boot-on;
					regulator-always-on;
				};

				regulator@11 {
					reg = < 0x0b >;
					regulator-compatible = "ldo4";
					regulator-min-microvolt = < 0xdbba0 >;
					regulator-max-microvolt = < 0x1b7740 >;
					regulator-boot-on;
					regulator-always-on;
				};

				regulator@13 {
					reg = < 0x0d >;
					regulator-compatible = "ldo6";
					regulator-min-microvolt = < 0xdbba0 >;
					regulator-max-microvolt = < 0x1b7740 >;
					regulator-boot-on;
					regulator-always-on;
				};
			};
		};
	};

	i2c@30a30000 {
		#address-cells = < 0x01 >;
		#size-cells = < 0x00 >;
		compatible = "fsl,imx8mm-i2c\0fsl,imx21-i2c";
		reg = < 0x00 0x30a30000 0x00 0x10000 >;
		interrupts = < 0x00 0x24 0x04 >;
		clocks = < 0x04 0x18a >;
		status = "okay";
		clock-frequency = < 0x61a80 >;
		pinctrl-names = "default";
		pinctrl-0 = < 0x22 >;

		adv7535@3d {
			compatible = "adi,adv7533";
			reg = < 0x3d >;
			adi,addr-cec = < 0x3b >;
			adi,dsi-lanes = < 0x04 >;
			status = "okay";

			port {

				endpoint {
					remote-endpoint = < 0x23 >;
					linux,phandle = < 0x50 >;
					phandle = < 0x50 >;
				};
			};
		};

		tcpci@50 {
			compatible = "usb,tcpci";
			pinctrl-names = "default";
			pinctrl-0 = < 0x24 >;
			reg = < 0x50 >;
			interrupt-parent = < 0x25 >;
			interrupts = < 0x0b 0x08 >;
			src-pdos = < 0x380190c8 >;
			snk-pdos = < 0x380190c8 >;
			max-snk-mv = < 0x1388 >;
			max-snk-ma = < 0xbb8 >;
			op-snk-mw = < 0x2710 >;
			max-snk-mw = < 0x3a98 >;
			port-type = "drp";
			default-role = "sink";
			status = "okay";
			linux,phandle = < 0x30 >;
			phandle = < 0x30 >;
		};

		tcpci@52 {
			compatible = "usb,tcpci";
			pinctrl-names = "default";
			pinctrl-0 = < 0x26 >;
			reg = < 0x52 >;
			interrupt-parent = < 0x25 >;
			interrupts = < 0x0c 0x08 >;
			src-pdos = < 0x380190c8 >;
			snk-pdos = < 0x380190c8 >;
			max-snk-mv = < 0x1388 >;
			max-snk-ma = < 0xbb8 >;
			op-snk-mw = < 0x2710 >;
			max-snk-mw = < 0x3a98 >;
			port-type = "drp";
			default-role = "sink";
			status = "okay";
			linux,phandle = < 0x34 >;
			phandle = < 0x34 >;
		};
	};

	i2c@30a40000 {
		#address-cells = < 0x01 >;
		#size-cells = < 0x00 >;
		compatible = "fsl,imx8mm-i2c\0fsl,imx21-i2c";
		reg = < 0x00 0x30a40000 0x00 0x10000 >;
		interrupts = < 0x00 0x25 0x04 >;
		clocks = < 0x04 0x18b >;
		status = "okay";
		clock-frequency = < 0x186a0 >;
		pinctrl-names = "default";
		pinctrl-0 = < 0x27 >;

		gpio@20 {
			compatible = "ti,tca6416";
			reg = < 0x20 >;
			gpio-controller;
			#gpio-cells = < 0x02 >;
			linux,phandle = < 0x29 >;
			phandle = < 0x29 >;
		};

		ak4458@10 {
			compatible = "asahi-kasei,ak4458";
			reg = < 0x10 >;
			AVDD-supply = < 0x28 >;
			DVDD-supply = < 0x28 >;
			linux,phandle = < 0x61 >;
			phandle = < 0x61 >;
		};

		ak4458@12 {
			compatible = "asahi-kasei,ak4458";
			reg = < 0x12 >;
			AVDD-supply = < 0x28 >;
			DVDD-supply = < 0x28 >;
			linux,phandle = < 0x62 >;
			phandle = < 0x62 >;
		};

		ak5558@13 {
			compatible = "asahi-kasei,ak5558";
			reg = < 0x13 >;
			ak5558,pdn-gpio = < 0x29 0x03 0x00 >;
			AVDD-supply = < 0x28 >;
			DVDD-supply = < 0x28 >;
			linux,phandle = < 0x64 >;
			phandle = < 0x64 >;
		};

		ak4497@11 {
			compatible = "asahi-kasei,ak4497";
			reg = < 0x11 >;
			ak4497,pdn-gpio = < 0x29 0x05 0x00 >;
			AVDD-supply = < 0x28 >;
			DVDD-supply = < 0x28 >;
			linux,phandle = < 0x65 >;
			phandle = < 0x65 >;
		};

		ov5640_mipi@3c {
			compatible = "ovti,ov5640_mipi";
			reg = < 0x3c >;
			status = "okay";
			pinctrl-names = "default";
			pinctrl-0 = < 0x2a 0x2b >;
			clocks = < 0x04 0x1c4 >;
			clock-names = "csi_mclk";
			assigned-clocks = < 0x04 0x1c1 0x04 0x1c4 >;
			assigned-clock-parents = < 0x04 0x02 >;
			assigned-clock-rates = < 0x00 0x16e3600 >;
			csi_id = < 0x00 >;
			pwn-gpios = < 0x21 0x07 0x00 >;
			mclk = < 0x16e3600 >;
			mclk_source = < 0x00 >;

			port {

				endpoint {
					remote-endpoint = < 0x2c >;
					linux,phandle = < 0x0f >;
					phandle = < 0x0f >;
				};
			};
		};
	};

	i2c@30a50000 {
		#address-cells = < 0x01 >;
		#size-cells = < 0x00 >;
		compatible = "fsl,imx8mm-i2c\0fsl,imx21-i2c";
		reg = < 0x00 0x30a50000 0x00 0x10000 >;
		interrupts = < 0x00 0x26 0x04 >;
		clocks = < 0x04 0x18c >;
		status = "disabled";
	};

	serial@30a60000 {
		compatible = "fsl,imx8mq-uart\0fsl,imx6q-uart\0fsl,imx21-uart";
		reg = < 0x00 0x30a60000 0x00 0x10000 >;
		interrupts = < 0x00 0x1d 0x04 >;
		clocks = < 0x04 0x1a4 0x04 0x1a4 >;
		clock-names = "ipg\0per";
		dmas = < 0x1a 0x1c 0x04 0x00 0x1a 0x1d 0x04 0x00 >;
		dma-names = "rx\0tx";
		status = "disabled";
	};

	imx_rpmsg {
		compatible = "fsl,rpmsg-bus\0simple-bus";
		#address-cells = < 0x02 >;
		#size-cells = < 0x02 >;
		ranges;

		mu@30aa0000 {
			compatible = "fsl,imx8mq-mu\0fsl,imx6sx-mu";
			reg = < 0x00 0x30aa0000 0x00 0x10000 >;
			interrupts = < 0x00 0x58 0x04 >;
			clocks = < 0x04 0x1bf >;
			clock-names = "mu";
			status = "okay";
		};

		rpmsg {
			compatible = "fsl,imx8qm-rpmsg";
			status = "okay";
			vdev-nums = < 0x01 >;
			reg = < 0x00 0xb8000000 0x00 0x10000 >;
		};
	};

	ocotp-ctrl@30350000 {
		compatible = "fsl,imx8mq-ocotp\0fsl,imx7d-ocotp\0syscon";
		reg = < 0x00 0x30350000 0x00 0x10000 >;
		clocks = < 0x04 0x18d >;
		#address-cells = < 0x01 >;
		#size-cells = < 0x01 >;
	};

	display-gpr@32e28000 {
		compatible = "fsl, imx8mm-iomuxc-gpr\0syscon";
		reg = < 0x00 0x32e28000 0x00 0x100 >;
		linux,phandle = < 0x0d >;
		phandle = < 0x0d >;
	};

	usb@32e40000 {
		compatible = "fsl,imx8mm-usb\0fsl,imx7d-usb\0fsl,imx27-usb";
		reg = < 0x00 0x32e40000 0x00 0x200 >;
		interrupts = < 0x00 0x28 0x04 >;
		clocks = < 0x04 0x1a5 >;
		clock-names = "usb1_ctrl_root_clk";
		assigned-clocks = < 0x04 0x58 0x04 0xb2 >;
		assigned-clock-parents = < 0x04 0x40 0x04 0x32 >;
		fsl,usbphy = < 0x2d >;
		fsl,usbmisc = < 0x2e 0x00 >;
		power-domains = < 0x2f >;
		status = "okay";
		dr_mode = "otg";
		extcon = < 0x00 0x30 >;
		picophy,pre-emp-curr-control = < 0x03 >;
		picophy,dc-vol-level-adjust = < 0x07 >;
	};

	usbphynop1 {
		compatible = "usb-nop-xceiv";
		clocks = < 0x04 0xb3 >;
		assigned-clocks = < 0x04 0xb3 >;
		assigned-clock-parents = < 0x04 0x32 >;
		clock-names = "main_clk";
		linux,phandle = < 0x2d >;
		phandle = < 0x2d >;
	};

	usbmisc@32e40200 {
		#index-cells = < 0x01 >;
		compatible = "fsl,imx7d-usbmisc\0fsl,imx6q-usbmisc";
		reg = < 0x00 0x32e40200 0x00 0x200 >;
		linux,phandle = < 0x2e >;
		phandle = < 0x2e >;
	};

	usb@32e50000 {
		compatible = "fsl,imx8mm-usb\0fsl,imx7d-usb\0fsl,imx27-usb";
		reg = < 0x00 0x32e50000 0x00 0x200 >;
		interrupts = < 0x00 0x29 0x04 >;
		clocks = < 0x04 0x1a5 >;
		clock-names = "usb1_ctrl_root_clk";
		assigned-clocks = < 0x04 0x58 0x04 0xb2 >;
		assigned-clock-parents = < 0x04 0x40 0x04 0x32 >;
		fsl,usbphy = < 0x31 >;
		fsl,usbmisc = < 0x32 0x00 >;
		power-domains = < 0x33 >;
		status = "disabled";
		dr_mode = "otg";
		extcon = < 0x00 0x34 >;
		picophy,pre-emp-curr-control = < 0x03 >;
		picophy,dc-vol-level-adjust = < 0x07 >;
	};

	usbphynop2 {
		compatible = "usb-nop-xceiv";
		clocks = < 0x04 0xb3 >;
		assigned-clocks = < 0x04 0xb3 >;
		assigned-clock-parents = < 0x04 0x32 >;
		clock-names = "main_clk";
		linux,phandle = < 0x31 >;
		phandle = < 0x31 >;
	};

	usbmisc@32e50200 {
		#index-cells = < 0x01 >;
		compatible = "fsl,imx7d-usbmisc\0fsl,imx6q-usbmisc";
		reg = < 0x00 0x32e50200 0x00 0x200 >;
		linux,phandle = < 0x32 >;
		phandle = < 0x32 >;
	};

	mmc@30b40000 {
		compatible = "fsl,imx8mq-usdhc\0fsl,imx7d-usdhc";
		reg = < 0x00 0x30b40000 0x00 0x10000 >;
		interrupts = < 0x00 0x16 0x04 >;
		clocks = < 0x04 0x00 0x04 0x77 0x04 0x1a7 >;
		clock-names = "ipg\0ahb\0per";
		assigned-clocks = < 0x04 0x15f >;
		assigned-clock-rates = < 0x17d78400 >;
		fsl,tuning-start-tap = < 0x14 >;
		fsl,tuning-step = < 0x02 >;
		bus-width = < 0x04 >;
		status = "okay";
		pinctrl-names = "default\0state_100mhz\0state_200mhz";
		pinctrl-0 = < 0x35 0x36 >;
		pinctrl-1 = < 0x37 0x36 >;
		pinctrl-2 = < 0x38 0x36 >;
		vmmc-supply = < 0x39 >;
		pm-ignore-notify;
		keep-power-in-suspend;
		non-removable;
	};

	mmc@30b50000 {
		compatible = "fsl,imx8mq-usdhc\0fsl,imx7d-usdhc";
		reg = < 0x00 0x30b50000 0x00 0x10000 >;
		interrupts = < 0x00 0x17 0x04 >;
		clocks = < 0x04 0x00 0x04 0x77 0x04 0x1a8 >;
		clock-names = "ipg\0ahb\0per";
		fsl,tuning-start-tap = < 0x14 >;
		fsl,tuning-step = < 0x02 >;
		bus-width = < 0x04 >;
		status = "okay";
		pinctrl-names = "default\0state_100mhz\0state_200mhz";
		pinctrl-0 = < 0x3a 0x3b >;
		pinctrl-1 = < 0x3c 0x3b >;
		pinctrl-2 = < 0x3d 0x3b >;
		cd-gpios = < 0x21 0x0f 0x01 >;
		vmmc-supply = < 0x3e >;
	};

	mmc@30b60000 {
		compatible = "fsl,imx8mq-usdhc\0fsl,imx7d-usdhc";
		reg = < 0x00 0x30b60000 0x00 0x10000 >;
		interrupts = < 0x00 0x18 0x04 >;
		clocks = < 0x04 0x00 0x04 0x77 0x04 0x1b5 >;
		clock-names = "ipg\0ahb\0per";
		assigned-clocks = < 0x04 0x1b5 >;
		assigned-clock-rates = < 0x17d78400 >;
		fsl,tuning-start-tap = < 0x14 >;
		fsl,tuning-step = < 0x02 >;
		bus-width = < 0x08 >;
		status = "okay";
		pinctrl-names = "default\0state_100mhz\0state_200mhz";
		pinctrl-0 = < 0x3f >;
		pinctrl-1 = < 0x40 >;
		pinctrl-2 = < 0x41 >;
		non-removable;
	};

	sai@30010000 {
		compatible = "fsl,imx8mq-sai\0fsl,imx6sx-sai";
		reg = < 0x00 0x30010000 0x00 0x10000 >;
		interrupts = < 0x00 0x5f 0x04 >;
		clocks = < 0x04 0x196 0x04 0x00 0x04 0x195 0x04 0x00 0x04 0x00 0x04 0x26 0x04 0x27 >;
		clock-names = "bus\0mclk0\0mclk1\0mclk2\0mclk3\0pll8k\0pll11k";
		dmas = < 0x42 0x00 0x1a 0x00 0x42 0x01 0x1a 0x00 >;
		dma-names = "rx\0tx";
		fsl,dataline = < 0x00 0xff 0xff >;
		status = "okay";
		pinctrl-names = "default\0dsd";
		pinctrl-0 = < 0x43 >;
		pinctrl-1 = < 0x44 >;
		assigned-clocks = < 0x04 0x9b 0x04 0x152 >;
		assigned-clock-parents = < 0x04 0x26 >;
		assigned-clock-rates = < 0x00 0x2ee0000 >;
		fsl,sai-multi-lane;
		fsl,dataline,dsd = < 0x00 0xff 0xff 0x02 0xff 0x11 >;
		linux,phandle = < 0x60 >;
		phandle = < 0x60 >;
	};

	sai@30020000 {
		compatible = "fsl,imx8mq-sai\0fsl,imx6sx-sai";
		reg = < 0x00 0x30020000 0x00 0x10000 >;
		interrupts = < 0x00 0x60 0x04 >;
		clocks = < 0x04 0x198 0x04 0x00 0x04 0x197 0x04 0x00 0x04 0x00 >;
		clock-names = "bus\0mclk0\0mclk1\0mclk2\0mclk3";
		dmas = < 0x42 0x02 0x02 0x00 0x42 0x03 0x02 0x00 >;
		dma-names = "rx\0tx";
		status = "disabled";
	};

	sai@30030000 {
		compatible = "fsl,imx8mm-sai\0fsl,imx8mq-sai\0fsl,imx6sx-sai";
		reg = < 0x00 0x30030000 0x00 0x10000 >;
		interrupts = < 0x00 0x32 0x04 >;
		clocks = < 0x04 0x19a 0x04 0x00 0x04 0x199 0x04 0x00 0x04 0x00 >;
		clock-names = "bus\0mclk0\0mclk1\0mclk2\0mclk3";
		dmas = < 0x42 0x04 0x02 0x00 0x42 0x05 0x02 0x00 >;
		dma-names = "rx\0tx";
		status = "okay";
		pinctrl-names = "default";
		pinctrl-0 = < 0x45 >;
		assigned-clocks = < 0x04 0x9d 0x04 0x154 >;
		assigned-clock-parents = < 0x04 0x26 >;
		assigned-clock-rates = < 0x00 0x1770000 >;
		linux,phandle = < 0x5e >;
		phandle = < 0x5e >;
	};

	sai@30050000 {
		compatible = "fsl,imx8mm-sai\0fsl,imx8mq-sai\0fsl,imx6sx-sai";
		reg = < 0x00 0x30050000 0x00 0x10000 >;
		interrupts = < 0x00 0x5a 0x04 >;
		clocks = < 0x04 0x19e 0x04 0x00 0x04 0x19d 0x04 0x00 0x04 0x00 0x04 0x26 0x04 0x27 >;
		clock-names = "bus\0mclk0\0mclk1\0mclk2\0mclk3\0pll8k\0pll11k";
		dmas = < 0x42 0x08 0x02 0x00 0x42 0x09 0x02 0x00 >;
		dma-names = "rx\0tx";
		fsl,shared-interrupt;
		fsl,dataline = < 0x00 0x0f 0x0f >;
		status = "disabled";
		pinctrl-names = "default";
		pinctrl-0 = < 0x46 >;
		assigned-clocks = < 0x04 0x9f 0x04 0x156 >;
		assigned-clock-parents = < 0x04 0x26 >;
		assigned-clock-rates = < 0x00 0x2ee0000 >;
		fsl,sai-asynchronous;
		linux,phandle = < 0x63 >;
		phandle = < 0x63 >;
	};

	sai@30060000 {
		compatible = "fsl,imx8mq-sai\0fsl,imx6sx-sai";
		reg = < 0x00 0x30060000 0x00 0x10000 >;
		interrupts = < 0x00 0x5a 0x04 >;
		clocks = < 0x04 0x1a0 0x04 0x00 0x04 0x19f 0x04 0x00 0x04 0x00 >;
		clock-names = "bus\0mclk0\0mclk1\0mclk2\0mclk3";
		dmas = < 0x42 0x0a 0x02 0x00 0x42 0x0b 0x02 0x00 >;
		dma-names = "rx\0tx";
		fsl,shared-interrupt;
		status = "disabled";
	};

	micfil@30080000 {
		compatible = "fsl,imx8mm-micfil";
		reg = < 0x00 0x30080000 0x00 0x10000 >;
		interrupts = < 0x00 0x2c 0x04 0x00 0x2d 0x04 0x00 0x6d 0x04 0x00 0x6e 0x04 >;
		clocks = < 0x04 0x1bd 0x04 0x1b0 0x04 0x26 0x04 0x27 0x04 0x06 >;
		clock-names = "ipg_clk\0ipg_clk_app\0pll8k\0pll11k\0clkext3";
		dmas = < 0x42 0x18 0x1a 0x80000000 >;
		dma-names = "rx";
		status = "okay";
		pinctrl-names = "default";
		pinctrl-0 = < 0x47 >;
		assigned-clocks = < 0x04 0xcb 0x04 0x182 >;
		assigned-clock-parents = < 0x04 0x26 >;
		assigned-clock-rates = < 0x00 0xbb80000 >;
		linux,phandle = < 0x67 >;
		phandle = < 0x67 >;
	};

	spdif@30090000 {
		compatible = "fsl,imx8mm-spdif";
		reg = < 0x00 0x30090000 0x00 0x10000 >;
		interrupts = < 0x00 0x06 0x04 >;
		clocks = < 0x04 0x8b 0x04 0x02 0x04 0x158 0x04 0x00 0x04 0x00 0x04 0x00 0x04 0x8b 0x04 0x00 0x04 0x00 0x04 0x00 0x04 0x26 0x04 0x27 >;
		clock-names = "core\0rxtx0\0rxtx1\0rxtx2\0rxtx3\0rxtx4\0rxtx5\0rxtx6\0rxtx7\0spba\0pll8k\0pll11k";
		dmas = < 0x42 0x1c 0x12 0x00 0x42 0x1d 0x12 0x00 >;
		dma-names = "rx\0tx";
		status = "okay";
		pinctrl-names = "default";
		pinctrl-0 = < 0x48 >;
		assigned-clocks = < 0x04 0xa1 0x04 0x158 >;
		assigned-clock-parents = < 0x04 0x26 >;
		assigned-clock-rates = < 0x00 0x1770000 >;
		linux,phandle = < 0x66 >;
		phandle = < 0x66 >;
	};

	dma-controller@30bd0000 {
		compatible = "fsl,imx8mm-sdma\0fsl,imx8mq-sdma\0fsl,imx7d-sdma";
		reg = < 0x00 0x30bd0000 0x00 0x10000 >;
		interrupts = < 0x00 0x02 0x04 >;
		clocks = < 0x04 0x1b8 0x04 0x1b8 >;
		clock-names = "ipg\0ahb";
		#dma-cells = < 0x03 >;
		fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
		status = "okay";
		linux,phandle = < 0x1a >;
		phandle = < 0x1a >;
	};

	dma-controller@302c0000 {
		compatible = "fsl,imx8mm-sdma\0fsl,imx8mq-sdma\0fsl,imx7d-sdma";
		reg = < 0x00 0x302c0000 0x00 0x10000 >;
		interrupts = < 0x00 0x67 0x04 >;
		clocks = < 0x04 0x1b9 0x04 0x1b9 >;
		clock-names = "ipg\0ahb";
		#dma-cells = < 0x03 >;
		fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
		fsl,ratio-1-1;
		status = "okay";
		linux,phandle = < 0x42 >;
		phandle = < 0x42 >;
	};

	dma-controller@302b0000 {
		compatible = "fsl,imx8mm-sdma\0fsl,imx8mq-sdma\0fsl,imx7d-sdma";
		reg = < 0x00 0x302b0000 0x00 0x10000 >;
		interrupts = < 0x00 0x22 0x04 >;
		clocks = < 0x04 0x1ba 0x04 0x1ba >;
		clock-names = "ipg\0ahb";
		#dma-cells = < 0x03 >;
		fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
		fsl,ratio-1-1;
		status = "okay";
	};

	wdog@30280000 {
		compatible = "fsl,imx21-wdt";
		reg = < 0x00 0x30280000 0x00 0x10000 >;
		interrupts = < 0x00 0x4e 0x04 >;
		clocks = < 0x04 0x1a9 >;
		status = "okay";
		pinctrl-names = "default";
		pinctrl-0 = < 0x49 >;
		fsl,ext-reset-output;
	};

	wdog@30290000 {
		compatible = "fsl,imx21-wdt";
		reg = < 0x00 0x30290000 0x00 0x10000 >;
		interrupts = < 0x00 0x4f 0x04 >;
		clocks = < 0x04 0x1aa >;
		status = "disabled";
	};

	wdog@302a0000 {
		compatible = "fsl,imx21-wdt";
		reg = < 0x00 0x302a0000 0x00 0x10000 >;
		interrupts = < 0x00 0x0a 0x04 >;
		clocks = < 0x04 0x1ab >;
		status = "disabled";
	};

	flexspi@30bb0000 {
		#address-cells = < 0x01 >;
		#size-cells = < 0x00 >;
		compatible = "fsl,imx8mm-flexspi";
		reg = < 0x00 0x30bb0000 0x00 0x10000 0x00 0x8000000 0x00 0x10000000 >;
		reg-names = "FlexSPI\0FlexSPI-memory";
		interrupts = < 0x00 0x6b 0x04 >;
		clocks = < 0x04 0x193 >;
		clock-names = "fspi";
		status = "okay";
		pinctrl-names = "default";
		pinctrl-0 = < 0x4a >;

		mt25qu256aba@0 {
			reg = < 0x00 >;
			#address-cells = < 0x01 >;
			#size-cells = < 0x01 >;
			compatible = "micron,mt25qu256aba";
			spi-max-frequency = < 0x1ba8140 >;
			spi-nor,ddr-quad-read-dummy = < 0x06 >;
		};
	};

	ecspi@30820000 {
		#address-cells = < 0x01 >;
		#size-cells = < 0x00 >;
		compatible = "fsl,imx8mm-ecspi\0fsl,imx51-ecspi";
		reg = < 0x00 0x30820000 0x00 0x10000 >;
		interrupts = < 0x00 0x1f 0x04 >;
		clocks = < 0x04 0x184 0x04 0x184 >;
		clock-names = "ipg\0per";
		dmas = < 0x1a 0x00 0x07 0x01 0x1a 0x01 0x07 0x02 >;
		dma-names = "rx\0tx";
		status = "disabled";
	};

	ecspi@30830000 {
		#address-cells = < 0x01 >;
		#size-cells = < 0x00 >;
		compatible = "fsl,imx8mm-ecspi\0fsl,imx51-ecspi";
		reg = < 0x00 0x30830000 0x00 0x10000 >;
		interrupts = < 0x00 0x20 0x04 >;
		clocks = < 0x04 0x185 0x04 0x185 >;
		clock-names = "ipg\0per";
		dmas = < 0x1a 0x02 0x07 0x01 0x1a 0x03 0x07 0x02 >;
		dma-names = "rx\0tx";
		status = "disabled";
	};

	ecspi@30840000 {
		#address-cells = < 0x01 >;
		#size-cells = < 0x00 >;
		compatible = "fsl,imx8mm-ecspi\0fsl,imx51-ecspi";
		reg = < 0x00 0x30840000 0x00 0x10000 >;
		interrupts = < 0x00 0x21 0x04 >;
		clocks = < 0x04 0x186 0x04 0x186 >;
		clock-names = "ipg\0per";
		dmas = < 0x1a 0x04 0x07 0x01 0x1a 0x05 0x07 0x02 >;
		dma-names = "rx\0tx";
		status = "disabled";
	};

	ethernet@30be0000 {
		compatible = "fsl,imx8mm-fec\0fsl,imx8mq-fec\0fsl,imx6sx-fec";
		reg = < 0x00 0x30be0000 0x00 0x10000 >;
		interrupts = < 0x00 0x76 0x04 0x00 0x77 0x04 0x00 0x78 0x04 >;
		clocks = < 0x04 0x187 0x04 0x187 0x04 0x15b 0x04 0x15a 0x04 0x15c >;
		clock-names = "ipg\0ahb\0ptp\0enet_clk_ref\0enet_out";
		assigned-clocks = < 0x04 0x52 0x04 0xa4 0x04 0xa3 0x04 0x15b >;
		assigned-clock-parents = < 0x04 0x36 0x04 0x3a 0x04 0x3b >;
		assigned-clock-rates = < 0x00 0x00 0x7735940 0x5f5e100 >;
		stop-mode = < 0x4b 0x10 0x03 >;
		fsl,num-tx-queues = < 0x03 >;
		fsl,num-rx-queues = < 0x03 >;
		fsl,wakeup_irq = < 0x02 >;
		status = "okay";
		pinctrl-names = "default";
		pinctrl-0 = < 0x4c >;
		phy-mode = "rgmii-id";
		phy-handle = < 0x4d >;
		fsl,magic-packet;

		mdio {
			#address-cells = < 0x01 >;
			#size-cells = < 0x00 >;

			ethernet-phy@0 {
				compatible = "ethernet-phy-ieee802.3-c22";
				reg = < 0x00 >;
				at803x,led-act-blind-workaround;
				at803x,eee-okay;
				at803x,vddio-1p8v;
				linux,phandle = < 0x4d >;
				phandle = < 0x4d >;
			};
		};
	};

	dma_cap {
		compatible = "dma-capability";
		only-dma-mask32 = < 0x01 >;
	};

	imx_ion {
		compatible = "fsl,mxc-ion";
		fsl,heap-id = < 0x00 >;
	};

	lcdif@32E00000 {
		#address-cells = < 0x01 >;
		#size-cells = < 0x00 >;
		compatible = "fsl,imx8mm-lcdif";
		reg = < 0x00 0x32e00000 0x00 0x10000 >;
		clocks = < 0x04 0x151 0x04 0x1b2 0x04 0x1b3 >;
		clock-names = "pix\0disp-axi\0disp-apb";
		assigned-clocks = < 0x04 0x9a 0x04 0x55 0x04 0x56 >;
		assigned-clock-parents = < 0x04 0x28 0x04 0x41 0x04 0x38 >;
		assigned-clock-rate = < 0x2367b880 0x1dcd6500 0xbebc200 >;
		interrupts = < 0x00 0x05 0x04 >;
		lcdif-gpr = < 0x0d >;
		power-domains = < 0x0b >;
		status = "okay";

		port@0 {
			reg = < 0x00 >;
			linux,phandle = < 0x51 >;
			phandle = < 0x51 >;

			endpoint {
				remote-endpoint = < 0x4e >;
				linux,phandle = < 0x4f >;
				phandle = < 0x4f >;
			};
		};
	};

	mipi_dsi@32E10000 {
		#address-cells = < 0x01 >;
		#size-cells = < 0x00 >;
		compatible = "fsl,imx8mm-mipi-dsim";
		reg = < 0x00 0x32e10000 0x00 0x400 >;
		clocks = < 0x04 0x174 0x04 0x175 >;
		clock-names = "cfg\0pll-ref";
		assigned-clocks = < 0x04 0xbd 0x04 0xbe >;
		assigned-clock-parents = < 0x04 0x36 0x04 0x28 >;
		assigned-clock-rates = < 0xfdad680 0x2367b880 >;
		interrupts = < 0x00 0x12 0x04 >;
		dsi-gpr = < 0x0d >;
		power-domains = < 0x0e >;
		status = "okay";

		port@0 {

			endpoint {
				remote-endpoint = < 0x4f >;
				linux,phandle = < 0x4e >;
				phandle = < 0x4e >;
			};
		};

		port@1 {

			endpoint {
				remote-endpoint = < 0x50 >;
				linux,phandle = < 0x23 >;
				phandle = < 0x23 >;
			};
		};
	};

	display-subsystem {
		compatible = "fsl,imx-display-subsystem";
		ports = < 0x51 >;
	};

	pcie@0x33800000 {
		compatible = "fsl,imx8mm-pcie\0snps,dw-pcie";
		reg = < 0x00 0x33800000 0x00 0x400000 0x00 0x32f00000 0x00 0x10000 0x00 0x1ff00000 0x00 0x80000 >;
		reg-names = "dbi\0phy\0config";
		reserved-region = < 0x52 >;
		#address-cells = < 0x03 >;
		#size-cells = < 0x02 >;
		device_type = "pci";
		ranges = < 0x81000000 0x00 0x00 0x00 0x1ff80000 0x00 0x10000 0x82000000 0x00 0x18000000 0x00 0x18000000 0x00 0x7f00000 >;
		num-lanes = < 0x01 >;
		interrupts = < 0x00 0x7a 0x04 0x00 0x7f 0x04 >;
		interrupt-names = "msi";
		#interrupt-cells = < 0x01 >;
		interrupt-map-mask = < 0x00 0x00 0x00 0x07 >;
		interrupt-map = < 0x00 0x00 0x00 0x01 0x0a 0x00 0x7d 0x04 0x00 0x00 0x00 0x02 0x0a 0x00 0x7c 0x04 0x00 0x00 0x00 0x03 0x0a 0x00 0x7b 0x04 0x00 0x00 0x00 0x04 0x0a 0x00 0x7a 0x04 >;
		clocks = < 0x04 0x18e 0x04 0xd5 0x04 0xd4 >;
		clock-names = "pcie\0pcie_bus\0pcie_phy";
		fsl,max-link-speed = < 0x02 >;
		ctrl-id = < 0x00 >;
		power-domains = < 0x53 >;
		status = "okay";
		pinctrl-names = "default";
		pinctrl-0 = < 0x54 >;
		disable-gpio = < 0x21 0x05 0x01 >;
		reset-gpio = < 0x55 0x15 0x01 >;
		ext_osc = < 0x01 >;
	};

	pwm@30660000 {
		compatible = "fsl,imx8mm-pwm\0fsl,imx27-pwm";
		reg = < 0x00 0x30660000 0x00 0x10000 >;
		interrupts = < 0x00 0x51 0x04 >;
		clocks = < 0x04 0x18f 0x04 0x18f >;
		clock-names = "ipg\0per";
		#pwm-cells = < 0x02 >;
		status = "disabled";
	};

	pwm@30670000 {
		compatible = "fsl,imx8mm-pwm\0fsl,imx27-pwm";
		reg = < 0x00 0x30670000 0x00 0x10000 >;
		interrupts = < 0x00 0x52 0x04 >;
		clocks = < 0x04 0x190 0x04 0x190 >;
		clock-names = "ipg\0per";
		#pwm-cells = < 0x02 >;
		status = "disabled";
	};

	pwm@30680000 {
		compatible = "fsl,imx8mm-pwm\0fsl,imx27-pwm";
		reg = < 0x00 0x30680000 0x00 0x10000 >;
		interrupts = < 0x00 0x53 0x04 >;
		clocks = < 0x04 0x191 0x04 0x191 >;
		clock-names = "ipg\0per";
		#pwm-cells = < 0x02 >;
		status = "disabled";
	};

	pwm@30690000 {
		compatible = "fsl,imx8mm-pwm\0fsl,imx27-pwm";
		reg = < 0x00 0x30690000 0x00 0x10000 >;
		interrupts = < 0x00 0x54 0x04 >;
		clocks = < 0x04 0x192 0x04 0x192 >;
		clock-names = "ipg\0per";
		#pwm-cells = < 0x02 >;
		status = "disabled";
	};

	vpu_h1@38320000 {
		compatible = "nxp,imx8mm-hantro-h1";
		reg = < 0x00 0x38320000 0x00 0x10000 >;
		reg-names = "regs_hantro_h1";
		interrupts = < 0x00 0x1e 0x04 >;
		interrupt-names = "irq_hantro_h1";
		clocks = < 0x04 0x1ae 0x04 0x1b7 >;
		clock-names = "clk_hantro_h1\0clk_hantro_h1_bus";
		assigned-clocks = < 0x04 0xcc 0x04 0x54 >;
		assigned-clock-parents = < 0x04 0x2b 0x04 0x38 >;
		assigned-clock-rates = < 0x23c34600 0x2faf0800 >;
		power-domains = < 0x56 >;
		status = "okay";
	};

	vpu_g1@38300000 {
		compatible = "nxp,imx8mm-hantro";
		reg = < 0x00 0x38300000 0x00 0x100000 >;
		reg-names = "regs_hantro";
		interrupts = < 0x00 0x07 0x04 >;
		interrupt-names = "irq_hantro";
		clocks = < 0x04 0x1ac 0x04 0x1b7 >;
		clock-names = "clk_hantro\0clk_hantro_bus";
		assigned-clocks = < 0x04 0x92 0x04 0x54 >;
		assigned-clock-parents = < 0x04 0x2b 0x04 0x38 >;
		assigned-clock-rates = < 0x23c34600 0x2faf0800 >;
		power-domains = < 0x57 >;
		status = "okay";
	};

	vpu_g2@38310000 {
		compatible = "nxp,imx8mm-hantro";
		reg = < 0x00 0x38310000 0x00 0x100000 >;
		reg-names = "regs_hantro";
		interrupts = < 0x00 0x08 0x04 >;
		interrupt-names = "irq_hantro";
		clocks = < 0x04 0x1af 0x04 0x1b7 >;
		clock-names = "clk_hantro\0clk_hantro_bus";
		assigned-clocks = < 0x04 0x93 0x04 0x54 >;
		assigned-clock-parents = < 0x04 0x2b 0x04 0x38 >;
		assigned-clock-rates = < 0x23c34600 0x2faf0800 >;
		power-domains = < 0x58 >;
		status = "okay";
	};

	gpu@38000000 {
		compatible = "fsl,imx8mm-gpu\0fsl,imx6q-gpu";
		reg = < 0x00 0x38000000 0x00 0x8000 0x00 0x38008000 0x00 0x8000 0x00 0x40000000 0x00 0x80000000 0x00 0x00 0x00 0x8000000 >;
		reg-names = "iobase_3d\0iobase_2d\0phys_baseaddr\0contiguous_mem";
		interrupts = < 0x00 0x03 0x04 0x00 0x19 0x04 >;
		interrupt-names = "irq_3d\0irq_2d";
		clocks = < 0x04 0x1a6 0x04 0x00 0x04 0x1ad 0x04 0x7e 0x04 0x1be 0x04 0x1ad 0x04 0x7e >;
		clock-names = "gpu3d_clk\0gpu3d_shader_clk\0gpu3d_axi_clk\0gpu3d_ahb_clk\0gpu2d_clk\0gpu2d_axi_clk\0gpu2d_ahb_clk";
		assigned-clocks = < 0x04 0x45 0x04 0x46 0x04 0x59 0x04 0x5a 0x04 0x2a 0x04 0x7e >;
		assigned-clock-parents = < 0x04 0x2a 0x04 0x2a 0x04 0x38 0x04 0x38 >;
		assigned-clock-rates = < 0x00 0x00 0x00 0x00 0x3b9aca00 0x17d78400 >;
		power-domains = < 0x59 >;
		status = "okay";
	};

	caam@30900000 {
		compatible = "fsl,sec-v4.0";
		#address-cells = < 0x01 >;
		#size-cells = < 0x01 >;
		reg = < 0x00 0x30900000 0x00 0x40000 >;
		ranges = < 0x00 0x00 0x30900000 0x40000 >;
		interrupts = < 0x00 0x5b 0x04 >;

		jr0@1000 {
			compatible = "fsl,sec-v4.0-job-ring";
			reg = < 0x1000 0x1000 >;
			interrupts = < 0x00 0x69 0x04 >;
		};

		jr1@2000 {
			compatible = "fsl,sec-v4.0-job-ring";
			reg = < 0x2000 0x1000 >;
			interrupts = < 0x00 0x6a 0x04 >;
		};

		jr2@3000 {
			compatible = "fsl,sec-v4.0-job-ring";
			reg = < 0x3000 0x1000 >;
			interrupts = < 0x00 0x72 0x04 >;
		};
	};

	caam-sm@00100000 {
		compatible = "fsl,imx6q-caam-sm";
		reg = < 0x00 0x100000 0x00 0x8000 >;
	};

	caam-snvs@30370000 {
		compatible = "fsl,imx6q-caam-snvs";
		reg = < 0x00 0x30370000 0x00 0x10000 >;
	};

	caam_secvio {
		compatible = "fsl,imx7d-caam-secvio\0fsl,imx6q-caam-secvio";
		interrupts = < 0x00 0x14 0x04 >;
		jtag-tamper = "disabled";
		watchdog-tamper = "enabled";
		internal-boot-tamper = "enabled";
		external-pin-tamper = "disabled";
	};

	dma-apbh@33000000 {
		compatible = "fsl,imx7d-dma-apbh\0fsl,imx28-dma-apbh";
		reg = < 0x00 0x33000000 0x00 0x2000 >;
		interrupts = < 0x00 0x0c 0x04 0x00 0x0c 0x04 0x00 0x0c 0x04 0x00 0x0c 0x04 >;
		interrupt-names = "gpmi0\0gpmi1\0gpmi2\0gpmi3";
		#dma-cells = < 0x01 >;
		dma-channels = < 0x04 >;
		clocks = < 0x04 0x1c7 >;
		linux,phandle = < 0x5a >;
		phandle = < 0x5a >;
	};

	gpmi-nand@33002000 {
		compatible = "fsl,imx7d-gpmi-nand";
		#address-cells = < 0x01 >;
		#size-cells = < 0x01 >;
		reg = < 0x00 0x33002000 0x00 0x2000 0x00 0x33004000 0x00 0x4000 >;
		reg-names = "gpmi-nand\0bch";
		interrupts = < 0x00 0x0e 0x04 >;
		interrupt-names = "bch";
		clocks = < 0x04 0x194 0x04 0x1c7 >;
		clock-names = "gpmi_io\0gpmi_bch_apb";
		dmas = < 0x5a 0x00 >;
		dma-names = "rx-tx";
		status = "disabled";
	};

	chosen {
		bootargs = "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200";
		stdout-path = "/serial@30890000";
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = < 0x5b >;

		status {
			label = "status";
			gpios = < 0x5c 0x10 0x00 >;
			default-state = "on";
		};
	};

	modem-reset {
		compatible = "gpio-reset";
		reset-gpios = < 0x25 0x06 0x01 >;
		reset-delay-us = < 0x7d0 >;
		reset-post-delay-ms = < 0x28 >;
		#reset-cells = < 0x00 >;
		linux,phandle = < 0x1c >;
		phandle = < 0x1c >;
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = < 0x01 >;
		#size-cells = < 0x00 >;

		sd1_regulator {
			compatible = "regulator-fixed";
			regulator-name = "WLAN_EN";
			regulator-min-microvolt = < 0x325aa0 >;
			regulator-max-microvolt = < 0x325aa0 >;
			gpio = < 0x25 0x0a 0x00 >;
			off-on-delay = < 0x4e20 >;
			startup-delay-us = < 0x64 >;
			enable-active-high;
			linux,phandle = < 0x39 >;
			phandle = < 0x39 >;
		};

		regulator-usdhc2 {
			compatible = "regulator-fixed";
			regulator-name = "VSD_3V3";
			regulator-min-microvolt = < 0x325aa0 >;
			regulator-max-microvolt = < 0x325aa0 >;
			gpio = < 0x25 0x13 0x00 >;
			off-on-delay = < 0x4e20 >;
			enable-active-high;
			linux,phandle = < 0x3e >;
			phandle = < 0x3e >;
		};

		regulator-audio-board {
			compatible = "regulator-fixed";
			regulator-name = "EXT_PWREN";
			regulator-min-microvolt = < 0x325aa0 >;
			regulator-max-microvolt = < 0x325aa0 >;
			enable-active-high;
			startup-delay-us = < 0x493e0 >;
			gpio = < 0x29 0x01 0x00 >;
			linux,phandle = < 0x28 >;
			phandle = < 0x28 >;
		};
	};

	wm8524 {
		compatible = "wlf,wm8524";
		clocks = < 0x04 0x199 >;
		clock-names = "mclk";
		wlf,mute-gpios = < 0x5d 0x15 0x01 >;
		linux,phandle = < 0x5f >;
		phandle = < 0x5f >;
	};

	sound-wm8524 {
		compatible = "fsl,imx-audio-wm8524";
		model = "wm8524-audio";
		audio-cpu = < 0x5e >;
		audio-codec = < 0x5f >;
		audio-routing = "Line Out Jack\0LINEVOUTL\0Line Out Jack\0LINEVOUTR";
	};

	sound-ak4458 {
		compatible = "fsl,imx-audio-ak4458";
		model = "ak4458-audio";
		audio-cpu = < 0x60 >;
		audio-codec = < 0x61 0x62 >;
		ak4458,pdn-gpio = < 0x29 0x04 0x00 >;
	};

	sound-ak5558 {
		compatible = "fsl,imx-audio-ak5558";
		model = "ak5558-audio";
		audio-cpu = < 0x63 >;
		audio-codec = < 0x64 >;
		status = "disabled";
	};

	sound-ak4497 {
		compatible = "fsl,imx-audio-ak4497";
		model = "ak4497-audio";
		audio-cpu = < 0x60 >;
		audio-codec = < 0x65 >;
		status = "disabled";
	};

	sound-spdif {
		compatible = "fsl,imx-audio-spdif";
		model = "imx-spdif";
		spdif-controller = < 0x66 >;
		spdif-out;
		spdif-in;
	};

	sound-micfil {
		compatible = "fsl,imx-audio-micfil";
		model = "imx-audio-micfil";
		cpu-dai = < 0x67 >;
	};
};